Method for fabricating high-density IC board by selectively electroplating without electrical conductive route

Abstract

A method for fabricating the high-density IC substrate by selectively electroplating without the electrically conductive route is provided. In this method, the specific resin layer with thickness of 1-5 μm is coated on the matte side of the copper clad, and then the compound layer of the copper clad and the resin is attached to the build up material layer, such as glass-fiber reinforced resin layer by hot pressing technique. The specific resin layer has good adhesion to the electrically conductive layer so that the subsequent process can be performed well. In such a way, a very thin electrically conductive plating layer can be applied on the IC substrate to form high density lines, and another selectively plating can be performed on the IC substrate without the electrically conductive route by applying another electrically conductive layer on the IC substrate.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to a method for fabricating the high-density IC substrate by selective electroplating, and in particular to a method for fabricating the higher-density IC substrate by selective electroplating without the electrical conductive route.

2. The Prior Arts

To meet the requirements of various kinds of existing electronic apparatus to be thin, light, small, and compact, all electronic components and the IC substrate in the electronic apparatus for the electronic components to mount thereon are correspondingly reduced in size and weight. In other words, it is an increasingly urgent requirement for the IC substrate to have higher densely distributed circuits thereon.

Conventionally, a circuit layer with line pitch of 50 μm is formed on the build up material layer such as a glass-fiber reinforced resin layer by using a copper clad with thickness of 1.5-5.0 μm as an electrically conductive plating layer, and removing the copper clad with thickness of 1.5-5.0 μm by flash etching. The flash etching is further performed in order to remove the roughened copper clad side, which cause the loss of the linewidth because the copper clad side need to be roughened for attaching to the glass-fiber reinforced resin,. Therefore, the higher density IC substrate with finer line pitch less than 50 μm cannot be fabricated because the etching cannot be further performed due to the thickness of the copper clad.

Furthermore, when the nickel/gold is formed on the circuit layer of the IC substrate by electroplating, the electric current is introduced to the circuit layer to be electroplated of the IC substrate via the electrically conductive route connected to the circuit. The electrically conductive plating layer are remained on the IC substrate after electroplating although the nickel/gold layer can cover the circuit layer. The remained electrically conductive route will occupy the layout space, and thereby the width of the electrically conductive route is narrowed to reduce the occupied layout space, which cause the unevenness of the thickness of the nickel/gold layer. Therefore, the reduction of the width of the electrically conductive plating layer is not the preferred way for increasing the layout density.

Other conventional methods for fabricating the IC substrate without the electrically conductive route are provided. However, the electroplated nickel/gold layer is unable to completely cover the circuit layer when omitting the step of forming the electrically conductive route. That is, the nickel/gold layer is only formed on the top of the circuit layer, but not on the sidewall of the circuit layer. Therefore, there is a need to provide a method in which the circuit layer can be completely covered by nickel/gold layer using electroplating process, and the electrically conductive plating layer used for electroplating or analogous elements will be removed after electroplating.

SUMMARY OF THE INVENTION

The objective of the present invention is to provide a method for fabricating the higher-density IC substrate by selectively electroplating without the electrically conductive route. In this method, a 1.0-5.0 μm specific resin, which is a organic polymer material, is coated on the matte side of 12 μm copper clad. Then the combined layer of the specific resin layer and the copper clad are is attached to the glass-fiber reinforced resin layer by hot pressing technique while the specific resin layer in the combined layer faces the glass-fiber reinforced resin layer. Then, the copper clad is removed to expose the specific resin. Afterwards, the electrically conductive plating layer is formed on the matte side (which is formed due to attaching to the matte side of the copper clad) of the specific resin. The subsequent fabricating process can be performed well because the specific resin layer has good adhesion to the electrically conductive layer.

The matte side of the specific resin provides a interface suitable for forming the electrically conductive layer. The electrically conductive layer is formed by sputtering or electroless deposition. For example, an electroless copper layer with thickness of 0.6-2.0 μm is formed. Then, a via hole is formed by laser drilling. Then, The desmear step is performed using the electroless copper as a mask. Afterwards, the surface of the specific resin is exposed after micro-etching to remove the electroless copper layer. Consequently, the circuit layer can be firmly formed over the specific resin because the surface of the specific resin has good adhesion to the electroless copper layer. The fine circuit can be formed by semi-additive process(SAP), and the thin electroless copper layer can be removed by flash etching. By such a fabricating method, a circuit with line pitch of 30 μm can be formed. However, the conventional high Tg glass-fiber reinforced resin, such as BT prepreg, used in the IC substrate does not have the suitable interface so that it cannot provide a good adhesion to the electrically conductive layer formed thereon. Consequently, the circuit with line pitch of 30 μm cannot be formed on the electrically conductive layer by the semi-additive process. The fine circuit layers can be formed, and the yield is increased when using the method of the present invention.

Moreover, a thin electroless copper layer used as the electrically conductive layer is formed on the circuits and on the specific resin between the circuits after the high density circuit is formed by flash etching. The patterned photoresist, such as the dry film or the wet film, is formed on the circuits , and then the current flows from the outside of the circuit board to the inside of the circuit board to electroplate the portions of these circuits to be selectively electroplated. By such a method, the selective planting metal layer can completely cover the circuits. The layout space can be increased because the electroless copper used as the electrically conductive layer can be removed after forming the circuits.

To achieve the foregoing objective, the present invention provides a method for fabricating the high-density IC substrate by selectively electroplating without the electrically conductive route. In this method, the specific resin layer has good adhesion to the electroless copper layer, and the electrically conductive plating layer can be formed and removed for several times. Finally, the circuit layer is electroplated on the electroless copper layer.

The electroless copper will not be peeled off during the fabricating process due to the good adhesion of the resin to the electrically conductive layer in accordance with the present invention. Therefore, the layout requires less space when using the fabricating method of the present invention as compared with using the conventional fabricating method in which the electrically conductive route will not be removed, and thereby the effective layout density of the IC board is increased in the present invention.

The foregoing and other objects, features, aspects and advantages of the present invention will become better understood from a careful reading of a detailed description provided herein below with appropriate reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-1P are schematic views showing a method for fabricating the high-density IC board by selectively electroplating without the electrically conductive route in accordance with the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

FIGS. 1A-1P are schematic views showing a method for fabricating the high-density IC substrate by selectively electroplating without the electrically conductive route in accordance with the present invention. As shown in FIGS. 1A-1P, an IC substrate 10 is provided as shown in FIG 1A. The IC substrate 10 is characterized in that the resin layer 15 made of a specific material is formed on the fiberglass reinforced material 14 provided on the inner circuit layer 12. The resin layer 15 is coated on the copper clad 16. The compound layer of the copper clad 16 and the resin layer 15 are attached to the reinforcing fiberglass reinforced material 14 by conventional hot-pressing technique. The resin layer 15 is roughened because the backside of the copper clad 16 is matte side. The roughened side of the resin layer 15 provides good adhesion to the material subsequently formed thereon (in particular, electroless copper such as electroless metal layer 18, 22 as shown in FIGS. 1C-1F; and the electrically conductive plating layer 26 as shown in FIG. 1K), and the resin layer 15 has good adhesion to the material so that the subsequent fabricating process can be performed well.

As shown in FIGS.1A-1J, the circuit layers 24 which are to be electroplated are formed on the resin layer 15 provided on the ball side and the die side, respectively (see FIG. 1J). The electroplated nickel/gold layers 30 each is selectively formed on the circuit layers 24 on the ball side and on the die side, respectively (see FIG. 1P) without the electrically conductive plating layer.

When the electroplating is performed on the circuit layer 24 formed on the resin layer 15 as shown in FIG. 1J without the electrically conductive route, the electric current is required to flow in the circuit board 10. Therefore, as shown in FIG. 1K, the electrically conductive layer 26 (the sputtering metal or the chemical deposition metal, the electroless copper as an example hereinafter) is required to be formed on the resin material layer 15 when the circuit layer 24 is electroplated. The electric current flows in the circuit board 10 via the electrically conductive layer 26. The circuit layer 24 is completely enclosed by the electroplated nickel/gold layer 30 using the selectively plating. Finally, the second dry film 28, and the electrically conductive layer 26 are removed as shown in FIG. 1P. The resin material layer 15 has good adhesion to the electrically conductive layer 26 so that the above-mentioned fabricating method can be accomplished in high yield. Furthermore, the layout space is spared because the electrically conductive layer is not left after electroplating in the present invention.

The electrically conductive layer 26, which is to be kept, is covered by the second dry film 28 as shown in FIG IL before the electroplating process as shown in FIG. 1N. The unnecessary electrically conductive layer 26 is removed as shown in FIG 1M. The nickel/gold layer 30 is formed by electroplating as shown in FIG. 1N. Finally, the second dry film 28, and the electrically conductive layer 26 is removed as shown in FIG IP. The electrically conductive layer 26 can be an electroless copper layer, or a sputtering copper layer. The nickel/gold layer 30 can be an electroplated nickel, an electroplated gold, or combination thereof.

Because the resin layer 15 has good adhesion to the electrically conductive layer 26, such as a sputtering metal or a chemical deposition metal so that after the chemical deposition metals 18, 22 as shown in FIGS. 1C-1F and the electrically conductive layer 26 as shown in FIG. 1K are coated/removed for several times, the electrically conductive layer 26 which is to be kept can still remain on the resin layer 15. Therefore, the selectively electroplating process can still be performed without the electrically conductive layer in the present invention.

The resin layer 15 which is a organic polymer material is coated on 12 μm the copper clad 16 with one matte side to have a thickness of 1 μm to 5 μm. Then, the copper clad 16 together with the resin layer 15 which faces towards the glass-fiber reinforced resin is attached to the reinforced glass-fiber-resin material (prepreg) by hot-pressing technique. Subsequently, the copper clad 16 is removed to expose the resin layer 15 as shown in FIG. 1B. Then, the conductive layer 24 is formed utilizing the matte side of the copper clad 16 by the fabricating process as shown in FIGS 1C-1J. The subsequent fabricating process can be performed well because the resin layer 15 has good adhesion to the conductive layer 24.

Although the circuit layer 24 can be formed by the conventional fabricating method, the fine circuit layer 24 with line pitch of 30 μm is formed by the semi additive process as following.

As shown in FIG. 1D, the micro-via is formed in the circuit board as shown in FIG IF by mechanical drilling or laser drilling. Then, the electroless metal layer 18 is completely removed as shown in FIG. 1E, followed by forming the electroless metal layer 22 with thickness ranging from 0.6-2 μm as shown in FIG. 1F. Finally, by using the patterned first dry film 23 as shown in FIG. 1G, electroplating is performed on the electroless metal layer 22 uncovered by the patterned first dry film 23 with copper to form the circuit 24 (as shown in FIG. 1H). The patterned first dry film 23 (as shown in FIG. 11) is then removed, followed by removing the electroless copper covered by the patterned first dry film 23 by flash etching to form a circuit layer 24 with line pitch of 30 μm.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the present invention. Thus, it is intended that the present invention cover the modifications and the variations of this invention provided they come within the scope of the appended claims and their equivalents.

Claims

1. A method for fabricating the high-density IC substrate by selectively electroplating without the electrically conductive route comprising:

forming an electrically conductive layer on a resin layer, the resin layer having good adhesion to the electrically conductive plating layer;

flash etching a conductive layer to form high-density circuit layers; forming an electroless copper on the resin between the circuit layers and the circuit layers;

forming a pattern to be selectively electroplated on the circuit layers using a photoresist; and

selectively electroplating a metal layer on an selected circuit by introducing an electric current from an outside of an substrate to an inside of an substrate via the electrically conductive layer, wherein the selected circuit is enclosed by the selectively electroplated metal layer.

2. The method as claimed in claim 1, wherein a method for fabricating the high density circuit layers of the IC substrate, comprising:

providing a substrate formed with a resin layer coated on a copper clad, an inner circuit layer being covered by a glass-fiber reinforced resin covered by the resin layer;

removing the copper clad to expose the resin layer;

forming a micro-via connected to the inner circuit in the resin layer and the glass-fiber reinforced resin layer, forming an electroless metal layer on an wall of the micro-via, the inner circuit layer under the micro-via, and the resin layer,

wherein the micro-via is formed by mechanically drilling or laser drilling a predetermined region on the resin layer and the glass-fiber reinforced resin layer until portions of the inner circuit layer are exposed;

forming a patterned dry film on the electroless metal layer; and

performing an electroplating process on the electroless metal layer uncovered by the patterned dry film, removing the dry film, and removing the electroless metal covered by the dry film by flash etching to form high density circuit layers.

3. The method as claimed in claim 1, wherein the electrically conductive layer is made of an electroless meta, 1 or a sputtered metal.

4. The method as claimed in claim 1, wherein the metal layer on the selected circuit is made of a material selected from the group consisting of electroplated nickel, electroplated gold, electroplated tin, electroplated silver, electroplated silver, and any combination thereof.