Liquid crystal display having gate delay compensator
A liquid crystal display (400) includes a liquid crystal panel (430), a scanning driver (410), a data driver (420), and a compensator (440). The liquid crystal panel includes gate lines (401) parallel to each other, data lines (402) intersecting the gate lines, and TFTs (403) arranged at each intersection. The scanning driver is configured for providing scanning signals. The compensator is configured for compensating the scanning signals. The compensator comprises switching elements (450) connected to tail ends of the gate lines respectively. When one gate line is scanned, a high compensating voltage is applied to the tail end through a corresponding switching element to accelerate to turn on the TFTs adjacent to the tail end. And at an end of the scanning time, a low compensating voltage is applied to the tail end through the corresponding switching element to accelerate to turn off the TFTs adjacent to the tail end.
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The present invention relates to liquid crystal displays (LCDs) having compensator for reducing gate delays, and driving methods thereof.
GENERAL BACKGROUNDWith the LCDs applied to more and more fields, the LCDs have a trend to become larger in size, which means larger viewing area and high definition. Generally, LCDs employing thin film transistors (TFTs), which are called TFT-LCDs, have a problem of gate delay due to the long gate lines. Gate delay usually results in image flicker or other problems.
Referring to
The liquid crystal panel 130 includes a plurality of gate lines 101 parallel to each other, a plurality of data lines 102 which are parallel to each other and intersect the gate lines 101, a plurality of TFTs 103 arranged at each cross of the gate line 101 and the data line 102, a plurality of pixel electrodes 104, and a plurality of common electrodes 105 opposite to the pixel electrodes 104. A minimal area constituted by two adjacent gate lines 101 and two adjacent data lines 102 is defined as a pixel area. The scanning driver 110 outputs a plurality of scanning signals to the gate lines 101 sequencially. The data driver 120 applies a plurality of gray scale voltages to the pixel electrodes 104 through corresponding TFTs 103 when a gate line 101 is scanned.
Referring also to
Referring also to
Because a gray scale voltage is not be applied to the pixel electrode 104 until the corresponding TFT 103 is turned on, the pixel electrode 104 which is away from the scanning driver 110 is lack of charging of the gray scale voltage. Thus, the display image is deteriorated in the corresponding pixel area. Actually, many pixel areas are affected because the corresponding TFTs 103 lack of charging of gray scale voltages. In this case, the image of the LCD 100 has flickers.
What is more, the TFTs 103 adjacent to the tail end can also be delayed to turned off by the distorted waveform of the scanning signal, for example, “t2” seconds as shown in
What is needed, therefore, is a liquid crystal display and driving method for the liquid crystal display which can overcome the above-described deficiencies.
SUMMARYAn exemplary liquid crystal display includes a liquid crystal panel, a scanning driver, a data driver, and a compensator. The liquid crystal panel includes a plurality of gate lines parallel to each other, a plurality of data lines parallel to each other and intersecting the gate lines, and a plurality of TFTs arranged at each intersection of the gate line and the data line. Each gate line includes a front end and a tail end. The scanning driver is configured for providing a plurality of scanning signals to the gate lines in sequence, and the scanning driver are connected to the front ends of the gate lines. The data driver is configured for providing a plurality of gray scale voltages to the data lines. The compensator is configured for compensating the scanning signals. Wherein the compensator comprises a plurality of switching elements connected to the tail ends of the gate lines respectively. When one gate line is scanned, a high compensating voltage is applied to the tail end through a corresponding switching element to accelerate to turn on the TFTs adjacent to the tail end. And at an end of the scanning time of the gate line, a low compensating voltage is applied to the tail end through the corresponding switching element to accelerate to turn off the TFTs adjacent to the tail end.
Novel features and advantages of the liquid crystal display will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.
Reference will now be made to the drawings to describe preferred and exemplary embodiments of the present invention in detail.
Referring to
The liquid crystal panel 430 includes a plurality gate lines 401 (G1˜G2n, n is a natural number) which are parallel to each other, a plurality of data lines 402 which are parallel to each other and intersecting the gate lines 401, a plurality of TFTs 403 arranged at each intersection of the gate line 401 and the data line 402, a plurality of pixel electrodes 404 and a plurality of common electrodes 405 opposite to the pixel electrodes 404. A minimal area constituted by two adjacent gate lines 401 and two adjacent data lines 402 is defined as a pixel area. Each gate line 401 includes a front end adjacent to the scanning driver, and a tail end distal from the scanning driver. The front end of the gate line 401 is connected to the scanning driver 410, and the tail end is connected to the compensator 440. The data lines 402 are connected to the data driver 420.
Each of TFTs 403 includes a gate electrode connected to the gate line 401, a source electrode connected to the data line 402, and a drain electrode connected to the pixel electrode 404. The scanning driver 410 outputs a plurality of scanning signals to the gate lines 401 in sequence. The data driver 120 applies a plurality of gray scale voltages to pixel electrodes 404 through corresponding TFTs 403 when a gate line 401 is scanned.
The compensator 440 includes a plurality of switching elements 450, a first input 460, and a second input 470. The switching elements 450 here are TFTs (T1˜T2n, n is a natural number), especially are metal-oxide semiconductor field effect transistors. And the TFTs Ti has a lower turn-on threshold voltage than those TFTs 403. The first input 460 and the second input 470 are configured for providing compensating voltages to the gate lines 401 via the switching elements 450. The compensating voltages are square waveforms, and an amplitude of the square waveform is equal to an amplitude of the square waveform of the scanning signals. Each switching element 450 includes a gate electrode 451, a source electrode 452, and a drain electrode 453. The plurality of switching elements 450 are connected to the plurality of the gate lines 401 respectively. In detail, the source electrode 452 and the gate electrode 451 of the TFT Ti (i is a natural number, and 1≦i≦n) are both connected to the tail end of the gate line Gi (i is a natural number, and 1≦i≦n). All drain electrodes 453 of the TFT T2i−1 (1≦i≦n) are connected to the first input 460, and all drain electrodes 453 of the TFT T2i (1≦i≦n) are connected to the input 470. That is, the odd-numbered TFTs 453 are connected to the first input 460, and the even-numbered TFTs 453 are connected to the input 470.
Referring also to
Working principle of the LCD 400 is now described as follows. In the description, G2i−1 represents anyone of odd-numbered gate lines 401, and the G2i represents anyone of even-numbered gate lines 401 adjacent to the gate line G2i−1. T2i−1 represents a corresponding TFT connected to G2i−1, and T2i represents a corresponding TFT connected to G2i.
During a period t0˜t1, the gate line G2i−1 is scanned, that is, the gate line G2i−1 is applied a scanning signal Vgh to turn on the TFTs 403 connected thereto, especially the TFTs 403 adjacent to the front end, and the TFT T2i−1 is also turned on. At the same time as the gate line G2i−1 being scanned, that is a beginning of the scanning of the gate line G2i−1, the first input 460 provides a high compensating voltage Vgh0 to the tail end of the gate line G2i−1 through the turned-on TFT T2i−1. The compensating voltage Vgh0 turns on the TFTs 403 adjacent to the tail end. Thus, the whole TFTs 403 connected to the gate line G2i−1 are turned on almost at the same time, the data driver 420 provides gray scale voltages to the pixel electrodes 404 through the corresponding TFTs 403.
During a period t1˜t2, the gate line G2i is scanned, that is, the gate line G2i is applied a scanning signal Vgh to turn on the TFTs 403 connected thereto. Simultaneously, that is an end time of the scanning of the gate line G2i−1, the first input 460 provides a low compensating voltage Vg10 to the tail end of the gate line G2i−1 through the TFT T2i−1. The low compensating voltage accelerates the TFTs 403 adjacent to the tail end to turn off. Thereafter, the TFT T2i−1 is also turned off.
Similarly to an operation of the gate line G2i−1 being scanned, when the gate line G2i is scanned, the second input 470 supplies a high compensating voltage Vgh0 to the tail end of the gate line G2i through the TFT T2i for accelerating to turn on the TFTs 403 adjacent to the tail end. At an end of the period t1˜t2, the second input 470 supplies a low compensating voltage Vg10 to the tail end of the gate line G2i through the TFT T2i for accelerating to turn off the TFTs 403 adjacent to the tail end.
Unlike in a conventional LCD, the LCD 400 includes the compensator 440 which includes the plurality of switching elements 450, and the first and second inputs 460, 470. When the gate line G2i−1 is scanned, the first input 460 supplies a high compensating voltage through the switching element 450 to accelerate to turn on the TFTs 403 adjacent to the tail end of the gate line G2i−1. When a next adjacent gate line G2i is scanned, the first input switches to supply a low compensating voltage to accelerate to turn off the TFTs 403 adjacent to the tail end of the gate line G2i−1. Simultaneously, the second input 470 supplies a high compensating voltage through the switching element 450 to accelerate to turn on the TFTs 403 adjacent to the tail end of the gate line G2i. Therefore, charging and discharging time of the pixel electrodes 404 adjacent to the tail end is not be shortened or delayed. The LCD 400 therefore can overcome the flicker phenomenon and has satisfactory quality.
It is to be understood, however, that even though numerous characteristics and advantages of preferred embodiments have been set out in the foregoing description, together with details of the structures and functions of the embodiments, the disclosure is illustrative only; and that changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
Claims
1. A liquid crystal display comprising:
- a liquid crystal panel comprising a plurality of gate lines parallel to each other, a plurality of data lines parallel to each other and intersecting the gate lines, each gate line comprising a front end and a tail end;
- a plurality of TFTs arranged at each intersection of the gate line and the data line;
- a scanning driver configured for providing a plurality of scanning signals to the gate lines in sequence, the scanning driver being connected to the front ends of the gate lines;
- a data driver configured for providing a plurality of gray scale voltages to the data lines; and
- a compensator configured for compensating the scanning signals, wherein the compensator comprises a plurality of switching elements connected to the tail ends of the gate lines respectively, when one gate line is scanned, a high compensating voltage being applied to the tail end through a corresponding switching element to accelerate to turn on the TFTs adjacent to the tail end, and at an end of the scanning time of the gate line, a low compensating voltage being applied to the tail end through the corresponding switching element to accelerate to turn off the TFTs adjacent to the tail end.
2. The liquid crystal display in claim 1, wherein the switching element comprises a thin film transistor (TFT), and the switching elements have a lower turn on threshold voltage than the TFTs arranged at each intersection of the gate line and the data line.
3. The liquid crystal display in claim 2, wherein the compensator further comprises a first input and a second input, the TFT further comprises a gate electrode, a source electrode and a drain electrode, the source electrode being connected to the tail ends of the gate lines, the first input being connected to the odd-numbered gate lines through the TFTs, and the second input being connected to the even-numbered gate lines through the TFTs.
4. The liquid crystal display in claim 3, wherein the compensating voltages comprises square waveforms.
5. The liquid crystal display in claim 4, wherein an amplitude of the compensating voltage is equal to an amplitude of a scanning signal.
6. The liquid crystal display in claim 2, wherein the TFTs are metal-oxide semiconductor field effect transistors.
7. A liquid crystal display comprising:
- a plurality of gate lines (G1˜G2n, n is a natural number), each comprising a front end and a tail end;
- a scanning driver connected to the front ends of the gate lines, the scanning driver being configured for providing a plurality of scanning signals to the gate lines; and
- a compensator connected to the tail ends of the gate lines, the compensator being configured for providing a compensating voltages to the tail ends of the gate lines, wherein when the gate line Gi (1≦i≦2n, and i is a natural number) is scanned, the compensator applies a high compensating voltage to the gate line Gi, substantially simultaneously, the compensator applies a low compensating voltage to the former gate line Gi−1.
8. The liquid crystal display in claim 7, wherein the liquid crystal panel further comprises a plurality of data lines cross the plurality of gate lines, and a plurality of TFTs arranged at each intersection thereat.
9. The liquid crystal display in claim 8, wherein the compensator comprises a plurality of switching elements, a first and a second inputs, the plurality of switching elements being connected to the gate lines respectively.
10. The liquid crystal display in claim 9, wherein the switching elements comprises TFTs, each of the TFTs comprising a gate electrode, a source electrode and a drain electrode, the gate electrode and the source electrode are connected to the tail end of the gate line, and the switching elements have a lower turn on threshold voltage than the TFTs arranged at each intersection of the gate line and the data line.
11. The liquid crystal display in claim 10, wherein the first input provides compensating voltages to the odd-numbered gate lines G2i−1 (i is a natural number and 1≦i≦n) through the TFTs, and the second input provides compensating voltages to the even-numbered gate lines G2i (i is a natural number and 1≦i≦n) through the TFTs.
12. The liquid crystal display in claim 11, wherein the compensating voltage supplied by the first input is a high voltage, the compensating voltage supplied by the second input is a low voltage.
13. The liquid crystal display in claim 7, wherein an amplitude of the compensating voltage is equal to an amplitude of the scanning signal.
14. The liquid crystal display in claim 7, wherein the compensating voltage are square waveforms.
15. A driving method for a liquid crystal display, the liquid crystal display comprising gate driver, a liquid crystal panel, and a compensator, the liquid crystal panel comprising a plurality of gate lines (G1˜G2n, n is a natural number), the method comprising the following: when the gate driver applies a high scanning voltage to the gate line Gi (1≦i≦2n, and i is a natural number), the compensator applying a high compensating voltage to an end of the gate line Gi distal from the gate driver, simultaneously, the gate driver applying a low voltage to the gate line Gi−1, and the compensator applying a low voltage to an end of the gate line Gi−1 distal from the gate driver.
16. The driving method for a liquid crystal display in claim 15, wherein an amplitude of the scanning voltage is equal to an amplitude of the compensating voltage.
17. The driving method for a liquid crystal display in claim 16, wherein compensator further comprises a first input and a second input, the compensating voltages applied to Gi and Gi−1 are provided by the first and second input respectively.
Type: Application
Filed: Nov 27, 2007
Publication Date: May 29, 2008
Patent Grant number: 8026883
Applicants: ,
Inventors: Kai Meng (Shenzhen), Xiao-Jing Qi (Shenzhen)
Application Number: 11/998,022
International Classification: G06F 3/038 (20060101); G09G 5/10 (20060101);