FAN CONTROL SYSTEM
A fan control system for a fan on a motherboard includes an I/O controller installed on the motherboard and a control circuit electrically connected to the I/O controller. The fan includes a motor and a rotation speed detecting chip. The I/O controller outputs a rotation speed control signal and a pulse width modulation (PWM) signal. The rotation speed detecting chip detects a rotation speed of the fan, and outputs a rotation speed feedback signal according to the rotation speed of the fan. The I/O controller receives the rotation speed feedback signal, and adjusts a duty cycle of the PWM signal accordingly to change the rotation speed of the fan. The control circuit receives the rotation speed control signal, and outputs a fan driving signal accordingly. The motor receives the fan driving signal, and drives the fan to rotate in a direction according to the fan driving signal.
1. Technical Field
The present disclosure relates to a fan control system.
2. Description of Related Art
A heat dissipation apparatus includes a conventional heat sink mounted on a CPU to remove heat, and a fan fixed on the heat sink to generate airflow through the heat dissipation apparatus. A conventional fan control system controls rotation speed of the fan by pulse width modulation (PWM) signals from a super I/O chip. The fan control system is usually embedded with driving chips and auxiliary circuits, which occupies large amount of space in the fan and increases the costs.
Therefore, there is a need for improvement in the art.
Many aspects of the embodiments can be better understood with reference to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one.”
The first control signal output terminal 111 receives a first DC voltage via the resistor R1. The first control signal output terminal 111 is electrically connected to a base of the transistor T1 via the resistor R2. An emitter of the transistor T1 is grounded. A collector of the transistor T1 is electrically connected to a gate of the MOSFET Q1. The collector of the transistor T1 receives a second DC voltage via the resistor R3. A drain of the MOSFET Q1 receives the second DC voltage. The drain of the MOSFET Q1 is electrically connected to a cathode of the diode D1. An anode of the diode D1 is electrically connected to a source of the MOSFET Q1.
The second control signal output terminal 112 receives the first DC voltage via the resistor R4. The second control signal output terminal 112 is electrically connected to a base of the transistor T2 via the resistor R5. An emitter of the transistor T2 is grounded. A collector of the transistor T2 is electrically connected to a gate of the MOSFET Q2. The collector of the transistor T2 receives the second DC voltage via the resistor R6. A drain of the MOSFET Q2 receives the second DC voltage. The drain of the MOSFET Q2 is electrically connected to a cathode of the diode D2. An anode of the diode D2 is electrically connected to a source of the MOSFET Q2.
The third control signal output terminal 113 receives the first DC voltage via the resistor R7. The third control signal output terminal 113 is electrically connected to a base of the transistor T3 via the resistor R8. An emitter of the transistor T3 is grounded. A collector of the transistor T3 is electrically connected to a gate of the MOSFET Q3. The collector of the transistor T3 receives the second DC voltage via the resistor R9. A drain of the MOSFET Q3 is electrically connected to the source of the MOSFET Q1. The drain of the MOSFET Q3 is electrically connected to a cathode of the diode D3. An anode of the diode D3 is electrically connected to a source of the MOSFET Q3.
The fourth control signal output terminal 114 receives the first DC voltage via the resistor R10. The fourth control signal output terminal 114 is electrically connected to a base of the transistor T4 via the resistor R11. An emitter of the transistor T4 is grounded. A collector of the transistor T4 is electrically connected to a gate of the MOSFET Q4. The collector of the transistor T4 receives the second DC voltage via the resistor R12. A drain of the MOSFET Q4 is electrically connected to the source of the MOSFET Q2. The drain of the MOSFET Q4 is electrically connected to a cathode of the diode D4. An anode of the diode D4 is electrically connected to a source of the MOSFET Q4. The sources of the MOSFETs Q3 and Q4 are electrically connected and grounded via the resistor R13. The sources of the MOSFETs Q3 and Q4 are electrically connected to the current signal input terminal 116.
The motor 210 includes a first input terminal 211 and a second input terminal 212. The first input terminal 211 is electrically connected to the source of the MOSFET Q1 and the drain of the MOSFET Q3. The second input terminal 212 is electrically connected to the source of the MOSFET Q2 and the drain of the MOSFET Q4. The rotation speed detecting chip 220 includes a rotation speed signal output terminal 221 and a ground terminal 222. The rotation speed signal output terminal 221 is electrically connected to the feedback signal input terminal 115. The ground terminal 222 is grounded. In one embodiment, the first DC voltage is a +3V standby voltage. The second DC voltage is a +12V voltage. The transistors T1-T4 are NPN type transistors. The MOSFETs Q1-Q4 are N-channel MOSFETs.
In operation, when the I/O controller 110 outputs low voltage level control signals at the first control signal output terminal 111 and the fourth control signal output terminal 114, and outputs high voltage level control signals at the second control signal output terminal 112 and the third control signal output terminal 113, the transistors T1 and T4 turn off. The transistors T2 and T3 turn on. The gates of the MOSFETs Q1 and Q4 receive high voltage level second DC voltages. The MOSFETs Q1 and Q4 turn on. The gates of the MOSFETs Q2 and Q3 re grounded via the transistors T2 and T3 respectively. The MOSFETs Q2 and Q3 turn off. The second DC voltage is input in the first input terminal 211 of the motor 210 via the MOSFET Q1, and is output to the MOSFET Q4 by the second input terminal 212 of the motor 210. The motor 210 is powered on and drives the fan 200 to rotate along a first direction. The I/O controller 110 then outputs the PWM signal to adjust an amplitude of the second DC voltage. The fan 200 rotates in the corresponding rotation speed according to the second DC voltage along the first direction.
When the I/O controller 110 outputs high voltage level control signals at the first control signal output terminal 111 and the fourth control signal output terminal 114, and outputs low voltage level control signals at the second control signal output terminal 112 and the third control signal output terminal 113, the transistors T1 and T4 turn on. The transistors T2 and T3 turn off. The gates of the MOSFETs Q2 and Q3 receive high voltage level second DC voltages. The MOSFETs Q2 and Q3 turn on. The second DC voltage is input in the first input terminal 212 of the motor 210 via the MOSFET Q2, and is output to the MOSFET Q3 by the second input terminal 211 of the motor 210. The motor 210 is powered on and drives the fan 200 to rotate along a second direction in the corresponding rotation speed. In one embodiment, the second direction is opposite to the first direction.
When the fan 200 rotates, the rotation speed detecting chip 220 detects the rotation speed of the fan 200. The rotation speed detecting chip 220 outputs the rotation speed feedback signal at the rotation speed signal output terminal 221. The feedback signal input terminal 115 of the I/O controller 110 receives the rotation speed feedback signal. The I/O controller 110 adjusts the duty cycle of the PWM signal according to the rotation speed feedback signal. The amplitude of the second DC voltage is changed according to the duty cycle of the PWM signal. The rotation speed of the fan 200 is then changed. Meanwhile, the current signal input terminal 116 of the I/O controller 110 collects current signals flowing through the fan 200. In one embodiment, the diodes D1-D4 are used to protect the MOSFETs Q1-Q4. The diodes D1-D4 eliminate negative voltages on the MOSFETs Q1-Q4 when the motor 210 is power off.
Even though numerous characteristics and advantages of the present disclosure have been set forth in the foregoing description, together with details of the structure and function of the disclosure, the disclosure is illustrative only, and changes may be made in detail, especially in the matters of shape, size, and the arrangement of parts within the principles of the disclosure to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
Claims
1. A fan controlling system comprising:
- an I/O controller adapted to output a rotation speed control signal and a pulse width modulation (PWM) signal; and
- a fan comprises a motor and a rotation speed detecting chip; wherein the rotation speed detecting chip detects a rotation speed of the fan, and outputs a rotation speed feedback signal according to the rotation speed of the fan; the I/O controller receives the rotation speed feedback signal, and adjusts a duty cycle of the PWM signal accordingly to change the rotation speed of the fan;
- a control circuit electrically connected to the I/O controller; wherein the control circuit receives the rotation speed control signal, and outputs a fan driving signal accordingly; the motor receives the fan driving signal, and drives the fan to rotate in a direction according to the fan driving signal.
2. The fan controlling system of claim 1, wherein the I/O controller comprises a first control signal output terminal; the control circuit comprises a first transistor, a first resistor, a second resistor, and a first MOSFET; the motor comprises a first input terminal; the first control signal output terminal receives a first DC voltage via the first resistor; the first control signal output terminal is electrically connected to a base of the first transistor; an emitter of the first transistor is grounded; a collector of the first transistor is electrically connected to a gate of the first MOSFET; the collector of the first transistor receives a second DC voltage via the second resistor; a drain of the first MOSFET receives the second DC voltage; and a source of the first MOSFET is electrically connected to the first input terminal.
3. The fan controlling system of claim 2, wherein the I/O controller further comprises a fourth control signal output terminal; the control circuit further comprises a second transistor, a third resistor, a fourth resistor, a fifth resistor, and a second MOSFET; the motor further comprises a second input terminal; the fourth control signal output terminal receives the first DC voltage via the third resistor; the fourth control signal output terminal is electrically connected to a base of the second transistor; an emitter of the second transistor is grounded; a collector of the second transistor is electrically connected to a gate of the second MOSFET; the collector of the second transistor receives the second DC voltage via the fourth resistor; a drain of the second MOSFET is electrically connected to the second input terminal; and a source of the second MOSFET is grounded via the fifth resistor.
4. The fan controlling system of claim 3, wherein the I/O controller further comprises a second control signal output terminal; the control circuit further comprises a third transistor, a sixth resistor, a seventh resistor, and a third MOSFET; the second control signal output terminal receives the first DC voltage via the sixth resistor; the second control signal output terminal is electrically connected to a base of the third transistor; an emitter of the third transistor is grounded; a collector of the third transistor is electrically connected to a gate of the third MOSFET; the collector of the third transistor receives the second DC voltage via the seventh resistor; a drain of the third MOSFET receives the second DC voltage; and a source of the third MOSFET is electrically connected to the drain of the second MOSFET.
5. The fan controlling system of claim 4, wherein the I/O controller further comprises a third control signal output terminal; the control circuit further comprises a fourth transistor, a eighth resistor, a ninth resistor, and a fourth MOSFET; the third control signal output terminal receives the first DC voltage via the eighth resistor; the third control signal output terminal is electrically connected to a base of the fourth transistor; an emitter of the fourth transistor is grounded; a collector of the fourth transistor is electrically connected to a gate of the fourth MOSFET; the collector of the fourth transistor receives the second DC voltage via the ninth resistor; a drain of the fourth MOSFET is electrically connected to the source of the first MOSFET; and a source of the fourth MOSFET is electrically connected to the source of the second MOSFET and the fifth resistor.
6. The fan controlling system of claim 1, wherein the I/O controller further comprises a feedback signal input terminal; the rotation speed detecting chip comprises a rotation speed signal output terminal; and the rotation speed signal output terminal is electrically connected to the feedback signal input terminal to output the rotation speed feedback signal.
7. The fan controlling system of claim 3, wherein the I/O controller further comprises a current signal input terminal; and the current signal input terminal is electrically connected to the source of the second MOSFET and the fifth resistor to collect current signals flowing through the fan.
8. The fan controlling system of claim 5, wherein the first DC voltage is a +3V standby voltage; the second DC voltage is a +12V voltage; the first transistor, the second transistor, the third transistor, and the fourth transistor are NPN type transistors; and the first MOSFET, the second MOSFET, the third MOSFET, and the fourth MOSFET are N-channel MOSFETs.
9. A fan controlling system for a fan on a motherboard comprising:
- an I/O controller adapted to be installed on the motherboard; wherein the I/O controller outputs a rotation speed control signal and a pulse width modulation (PWM) signal; and
- a control circuit electrically connected to the I/O controller; wherein the fan comprises a motor and a rotation speed detecting chip; the rotation speed detecting chip detects a rotation speed of the fan, and outputs a rotation speed feedback signal according to the rotation speed of the fan; the I/O controller receives the rotation speed feedback signal, and adjusts a duty cycle of the PWM signal accordingly to change the rotation speed of the fan; the control circuit receives the rotation speed control signal, and outputs a fan driving signal accordingly; the motor receives the fan driving signal, and drives the fan to rotate in a direction according to the fan driving signal.
10. The fan controlling system of claim 9, wherein the I/O controller comprises a first control signal output terminal; the control circuit comprises a first transistor, a first resistor, a second resistor, and a first MOSFET; the motor comprises a first input terminal; the first control signal output terminal receives a first DC voltage via the first resistor; the first control signal output terminal is electrically connected to a base of the first transistor; an emitter of the first transistor is grounded; a collector of the first transistor is electrically connected to a gate of the first MOSFET; the collector of the first transistor receives a second DC voltage via the second resistor; a drain of the first MOSFET receives the second DC voltage; and a source of the first MOSFET is electrically connected to the first input terminal.
11. The fan controlling system of claim 10, wherein the I/O controller further comprises a fourth control signal output terminal; the control circuit further comprises a second transistor, a third resistor, a fourth resistor, a fifth resistor, and a second MOSFET; the motor further comprises a second input terminal; the fourth control signal output terminal receives the first DC voltage via the third resistor; the fourth control signal output terminal is electrically connected to a base of the second transistor; an emitter of the second transistor is grounded; a collector of the second transistor is electrically connected to a gate of the second MOSFET; the collector of the second transistor receives the second DC voltage via the fourth resistor; a drain of the second MOSFET is electrically connected to the second input terminal; and a source of the second MOSFET is grounded via the fifth resistor.
12. The fan controlling system of claim 11, wherein the I/O controller further comprises a second control signal output terminal; the control circuit further comprises a third transistor, a sixth resistor, a seventh resistor, and a third MOSFET; the second control signal output terminal receives the first DC voltage via the sixth resistor; the second control signal output terminal is electrically connected to a base of the third transistor; an emitter of the third transistor is grounded; a collector of the third transistor is electrically connected to a gate of the third MOSFET; the collector of the third transistor receives the second DC voltage via the seventh resistor; a drain of the third MOSFET receives the second DC voltage; and a source of the third MOSFET is electrically connected to the drain of the second MOSFET.
13. The fan controlling system of claim 12, wherein the I/O controller further comprises a third control signal output terminal; the control circuit further comprises a fourth transistor, a eighth resistor, a ninth resistor, and a fourth MOSFET; the third control signal output terminal receives the first DC voltage via the eighth resistor; the third control signal output terminal is electrically connected to a base of the fourth transistor; an emitter of the fourth transistor is grounded; a collector of the fourth transistor is electrically connected to a gate of the fourth MOSFET; the collector of the fourth transistor receives the second DC voltage via the ninth resistor; a drain of the fourth MOSFET is electrically connected to the source of the first MOSFET; and a source of the fourth MOSFET is electrically connected to the source of the second MOSFET and the fifth resistor.
14. The fan controlling system of claim 9, wherein the I/O controller further comprises a feedback signal input terminal; the rotation speed detecting chip comprises a rotation speed signal output terminal; and the rotation speed signal output terminal is electrically connected to the feedback signal input terminal to output the rotation speed feedback signal.
15. The fan controlling system of claim 11, wherein the I/O controller further comprises a current signal input terminal; and the current signal input terminal is electrically connected to the source of the second MOSFET and the fifth resistor to collect current signals flowing through the fan.
16. The fan controlling system of claim 13, wherein the first DC voltage is a +3V standby voltage; the second DC voltage is a +12V voltage; the first transistor, the second transistor, the third transistor, and the fourth transistor are NPN type transistors; and the first MOSFET, the second MOSFET, the third MOSFET, and the fourth MOSFET are N-channel MOSFETs.
Type: Application
Filed: Jun 10, 2013
Publication Date: Mar 13, 2014
Inventors: ZHI-JIANG YAO (Wuhan), WEN-CHANG GAO (Wuhan)
Application Number: 13/913,619
International Classification: F04D 27/00 (20060101);
