DIFFERENTIATOR BASED SPREAD SPECTRUM MODULATOR
A spread spectrum clock generator which includes a pulse train generator circuit and a modulating circuit configured to produce a modulating signal relating to a time derivative of an output of the pulse train generator circuit. In one embodiment the modulating circuit includes a active differentiator circuit and in another embodiment the modulating circuit includes a passive differentiator circuit. A modulator is included which is configured to produce a spread spectrum clock output which is frequency modulated by the modulating signal.
1. Field of the Invention
The present invention relates generally to signal modulators and in particular to spread spectrum modulators for use in clock generators.
2. Description of Related Art
Many electronic devices include some kind of stable clocking circuitry for producing clock signals which allow the devices to operate internally and to co-operate with other devices. The use of highly stable clocks frequently results in electromagnetic interference (EMI). As a result, regulatory agencies such as the Federal Communication Commission (FCC) have established regulations limiting EMI radiation. One approach is to provide shielding and the like, but this approach increases costs and weight. Another approach to reducing EMI emissions is to dynamically vary the clock frequency so as to spread the interference energy over a range of frequencies so as to limit the energy at any one frequency. The approach is known as spread spectrum frequency modulation.
At this point, a brief review of some of the relevant terminology may be helpful. In a typical spread spectrum system, the average system clock frequency (frequency fc) is dithered to some degree, with the peak frequency deviation (Δf) being expressed as ±freq or ±%. The spreading rate (δ) is defined as the range of spreading frequency over the native system clock frequency (Δf/fc). The actual spreading rate δ style can be center-spreading where the frequency deviation Δf is centered around fc (δ=±Δf/2fc×100%); down-spreading where the frequency deviation Δf extends from fc to a lower frequency (δ=−Δf/fc×100%) and up-spreading where the frequency deviation Δf extends from fc to a higher frequency (δ=+Δf/fc×100%). The modulation rate (fm) is the frequency used to determine the system clock frequency spreading-cycling rate. Thus, 1/fm is the period or time during which the clock frequency varies through Δf and returns to the original native frequency. The modulation index (β) is equal to Δf/fm and, finally, the phrase modulation waveform refers to the profile of the clock frequency variation curve as a function of time, with a simple example of a modulation waveform being a saw tooth ramp. Referring to the drawings,
As can be seen form
The output Vc′ of the modulator 16 is applied to the control input of a voltage controlled oscillator (VCO) 18. The frequency of VCO is divided down by an optional divider 20 so that the frequency of Fd matches that of Fin. The modulation waveform Mod applied to the modulator 16 causes Vc′ to vary so that the control signal Vc′ applied to VCO 18 causes Fout to be spread spectrum modulated. Although the
ROM 34 of the
There is a need for a spread spectrum clock generator that provides relatively high performance and yet can be implemented utilizing relatively simple analog circuitry while providing reduced power consumption.
Referring again to the drawings,
A differentiator based modulating circuit 48 provides a modulating output V2 which is combined by summing circuit 56 with the output V1 of the low pass filter 54 to produce a third output Vc. Vc constitutes a control signal that is applied to the control input of a voltage controlled oscillator (VCO) 58. VCO 58 provides an output having a frequency/phase determined by the magnitude of the control signal input. The output of VCO 58 forms the output Fout of the clock generator and is also divided down by divider 60 to provide the feedback input Fd to the phase detector 50. The relatively low frequency output V1 operates to set the center frequency of VCO 58, with the modulator 48 output V2 being at a somewhat higher frequency which operates to modulate output V1 to produce control signal Vc. Thus, clock output Fout has a center frequency set by V1 and is frequency modulated by V2, with Fout being a spread spectrum modulated clock.
The details of one embodiment of the differentiating modulator 48 of
The shaped pulses of
vO(t)=−RFC1[dvI(t)/dt] (1)
where
-
- vO(t) is the output,
- RF is the feedback resistance which changes in value depending upon the state of transistor 76;
- C1 is the input capacitance; and
- dvI(t)/dt is the time derivative of the input applied to capacitor C1.
The output voltage vO(t) has a DC component set at Vref. The value −RFC1 is referred to as the differentiator gain or time constant.
One exemplary output V2 of the differentiator circuit, the sum of vO(t)+Vref, is shown in
As can be seen, the
The input impedance of the
A second embodiment spread spectrum clock generator 90 is depicted in
Vo(t)=IC*RP
or
Vo(t)≈C2(dVin/dt)*Rp (2)
assuming
ω1/(Rp*C2)
The DC voltage at node 94, Vdc, is equal to Vref(RB)/(RB+RA) so that the composite voltage Vout based upon superposition is as follows:
Vout≈Vdc+Vo(t)
or
Vout≈Vref(RB)/(RB+RA)+C2*Rp(dVin/dt) (3)
As previously noted, signal Vout is applied to the control input In of a VCO 96. In the present exemplary embodiment, VCO 96 is based upon a ring oscillator which includes an odd number of inverting stages 98A to 98B. The output of stage 98B is connected back to the input of stage 98A so as to provide a positive feedback path which results in oscillation. The frequency of oscillation is inversely related to the total propagation delay of each stage, with the delay being controlled by the way of the control input In. Low values of input In result in reduced current to each stage thereby increasing the propagation delay of the stages and hence producing a lower frequency of oscillation. Conversely, a higher value of input In results in a larger current to the stages thereby reducing the delay and increasing the frequency. An output buffer stage 98C buffers the output of the ring oscillator to produce the output Fout.
The center frequency fc of oscillation of VCO 96 is determined by the DC voltage component of equation (3), namely Vdc=Vref*RB/(RB+RA). The frequency deviation from the center frequency is determined by the AC component of equation (3), namely Vo(t)≈C2*Rp(dVin/dt). Thus, the output of VCO 96, clock Fout comprises a spread spectrum modulated signal. The frequency modulating signal is Vo(t) can be modified by altering the characteristics of the passive differentiator circuit and the characteristics of the pulse train produced by clock generator 92 so as to provide a modulating signal similar to that depicted in
Thus, various embodiments of the present invention have been disclosed. Although these embodiments have been described in some detail, it is to be understood that various changes can be made by those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.
Claims
1. A spread spectrum clock generator comprising:
- a pulse train generator circuit;
- a modulating circuit configured to produce a modulating signal relating to a time derivative of an output of the pulse train generator circuit; and
- a modulator configured to produce a spread spectrum clock output which is frequency modulated by the modulating signal.
2. The spread spectrum clock generator of claim 1 wherein the modulating circuit includes an active differentiator circuit which includes an amplifier, a feedback resistance connected between an output of the amplifier and an inverting input of the amplifier and an input capacitance disposed intermediate the inverting input of the amplifier and the pulse generator circuit.
3. The spread spectrum clock generator of claim 2 further including feedback resistance control circuitry configured to control a magnitude of the feedback resistance in response to the pulse train generator circuit.
4. The spread spectrum clock generator of claim 3 wherein the feedback resistance includes at least two resistors and wherein the feedback resistance control circuitry includes a transistor switch connected across one of the at least two resistors.
5. The spread spectrum clock generator of claim 4 wherein the transistor is switchable between an ON and an OFF state in response to a level of the output of the pulse train generator circuit.
6. The spread spectrum clock generator of claim 1 wherein the modulator includes a voltage controlled oscillator.
7. The spread spectrum clock generator of claim 1 wherein the pulse train generator circuit includes control circuitry configured to control at least one of the rise and fall time durations of the output of the pulse train generator circuit.
8. The spread spectrum clock generator of claim 7 wherein the control circuitry is further configured to control both the rise and fall time durations of the output of the pulse train generator circuit.
9. The spread spectrum clock generator circuit of claim 8 wherein the control circuitry includes a first current source and a capacitor connected to be charged by the first current source and a second current source connected to discharge the capacitor.
10. The spread spectrum clock generator of claim 9 wherein the first current source operates to begin charging the capacitor in response to one of a rising and falling edge of a clock and wherein the second current source operates to begin discharging the capacitor in response to another one of the rising and falling edge of the clock.
11. The spread spectrum clock generator of claim 10 wherein the control circuitry includes delay circuitry for delaying a time at which the first current source operates to begin charging the capacitor and for delaying a time at which the second current source operates to begin discharging the capacitor.
12. A spread spectrum clock generator comprising:
- a modulating circuit including an active differentiator circuit comprising an amplifier, a resistance connected between an inverting input of the amplifier and the amplifier output and an input capacitance connected between the inverting input of the amplifier and a source of sequential pulses; and
- a voltage controlled oscillator having a control input responsive to an output of the amplifier, with the voltage controlled oscillator providing a spread spectrum clock output.
13. The spread spectrum clock generator of claim 12 further including a pulse train generator circuit configured to produce the sequential pulses, with the pulse train generator circuit including a limiter circuit that limits the magnitude of the sequential pulses.
14. The spread spectrum clock generator of claim 12 further including a pulse train generator circuit configured to produce the sequential pulses, with the pulse train generator circuit including rise and fall time control circuitry configure to control the rise and fall time durations of the sequential pulses.
15. The spread spectrum clock generator of claim 12 wherein the voltage control oscillator control input is further responsive to a primary frequency input which sets a primary frequency of the spread spectrum clock output, with the clock output being frequency modulated in response to the output of the amplifier.
16. The spread spectrum clock generator of claim 15 wherein a magnitude of the resistance is controllable with response to changes in a level of the sequential pulses.
17. A method of generating a spread spectrum clock comprising:
- receiving a pulse train;
- producing a modulating signal relating to a time differential of the pulse train; and
- modulating a clock signal with the modulating signal to produce the spread spectrum clock.
18. The method of claim 17 wherein the producing the modulating signal includes providing an active differentiator circuit which includes an amplifier, a feedback resistance and an input capacitance.
19. The method of claim 18 further including providing the pulse train, with the pulses of the pulse train having controllable rise times and controllable fall times.
20. The method of claim 18 wherein the feedback resistance magnitude is controllable in response to levels of the pulse train.
Type: Application
Filed: Apr 15, 2014
Publication Date: Jan 15, 2015
Inventor: Kern Wai Wong (Sunnyvale, CA)
Application Number: 14/253,544