Elastic Positioning Structure for a Semiconductor Carrier

An elastic positioning structure for a semiconductor carrier is provided with a plurality of stop blocks formed on and extending along the walls of the semiconductor carrier, the fixed end and the elastic free end of the respective stop blocks are located at the same level, so that the fixed end can still serve as a restricting structure to restrict the semiconductor, even when the free end of the stop blocks lose elasticity. The positioning structure has a narrow top and wide bottom, and the recess of the semiconductor carrier is narrow at the top and wide at the bottom, so that the semiconductor can be easily taken out and put into the recess, and can be well restricted in recess without disengaging therefrom.

Skip to: Description  ·  Claims  · Patent History  ·  Patent History
Description
BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a semiconductor carrier, and more particularly to an elastic positioning structure for a semiconductor carrier.

2. Description of the Prior Art

FIG. 1 shows a conventional semiconductor carrier structure 10 includes a plurality of walls 11 arranged in a matrix manner to define a plurality of recesses 12 for holding and protecting semiconductors. For better positioning of micro semiconductor and preventing the semiconductor from disengaging from the recess, the semiconductor carrier structure 10 is made of elastic material and integrally formed with an elastic positioning structure which is located on the walls 11 which are L-shaped in cross section. The elastic positioning structure includes an opening 13 partially formed in the transverse portion 112, the longitudinal portion 111 of the walls 11 and partially in the bottom of the recess 12. In the opening 13 is formed a stop block 14 which is L-shaped in cross section and extends from the transverse portion 112 toward the recess 12. The stop block 14 includes a transverse deformation portion 141 connected to the transverse portion 112 of the walls 11 and a longitudinal abutting portion 142 with an end located toward the bottom of the recess 12. When the semiconductor is received in the recess 12, the peripheral side of the semiconductor will be restricted by the longitudinal abutting portion 142 of the stop block 14, so as to prevent the semiconductor from disengaging from the recess 12. Pressing the stop block 14 make the deformation portion 141 deform, the abutting portion 142 will retreat into the opening 13 for facilitating putting semiconductor into and taking it out of the recess 12.

It is to be noted that the upper end of the elastic stop block 14 of the conventional semiconductor carrier structure 10 is fixed to the wall 11 via the deformation portion 141, and the lower end of the elastic stop block 14 retreats back into the opening 13 through deformation. The upper width W1 of the elastic stop block 14 is bigger than the lower width W2 of the elastic stop block 14. The deformation portion 141 itself is elastically deformable, and it is also formed with an aperture 143 to improve elasticity. However, the deformation portion 141 still has to provide a push force for the abutting portion 142 to fix the semiconductor, plus the upper width W1 of the elastic stop block 14 being bigger than the lower width W2 of the elastic stop block 14, as a result, the deformability of the deformation portion 141 is limited, which makes it not easy to put in or take out the semiconductor. Furthermore, the deformation portion 141 and the abutting portion 142 of the stop block 14 are not located at the same level, when the stop block 14 loses elasticity after long period of use, clearance will appear between the semiconductor and the stop block 14, and the semiconductor will get loose and cannot be fixed anymore.

The present invention has arisen to mitigate and/or obviate the afore-described disadvantages.

SUMMARY OF THE INVENTION

The primary objective of the present invention is to provide an elastic positioning structure for a semiconductor carrier, wherein a plurality of stop blocks is formed on and extends along the walls of the semiconductor carrier, the fixed end and the elastic free end of the respective stop blocks are located at the same level, so that the fixed end can still serve as a restricting structure to restrict the semiconductor, even when the free end of the stop blocks lose elasticity.

Another objective of the present invention is to provide an elastic positioning structure for a semiconductor carrier, wherein the positioning structure has a narrow top and wide bottom, and the recess of the semiconductor carrier is narrow at the top and wide at the bottom, so that the semiconductor can be easily taken out and put into the recess, and can be well restricted in recess without disengaging therefrom.

To achieve the above objectives, an elastic positioning structure for a semiconductor carrier in accordance with present invention is provided, wherein the semiconductor carrier comprises a plurality of transversely and longitudinally arranged walls, and a plurality of recesses defined by the walls, the elastic positioning structure is formed on the walls and located in the recesses; the elastic positioning structure in the respective recesses comprises: a plurality of stop blocks each include a connecting section which is connected to the walls, and an abutting section which is connected to the connecting section and extends toward the walls. Each of the stop blocks includes a top surface, a bottom surface, and an oblique surface extending from the bottom surface to the top surface in an inclined manner, and the bottom surface has a width bigger than a width of the top surface.

Preferably, the walls are first walls and second walls which are perpendicular to the first walls, and on a same first wall are provided two stop blocks. Or, on a same first wall are provided two stop blocks, and on a same second wall are provided another two stop blocks.

Preferably, the oblique surface of the stop block is provided at the abutting section with a protrusion protruding toward the recess, and the protrusion has an inclined guide surface which is connected to the top surface of the stop block and inclined toward the recess. The protrusion is used to elastically restrict the semiconductor, and the inclined guide surface facilitates insertion of the semiconductor into the recess.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view of a conventional elastic positioning structure for a semiconductor carrier;

FIG. 2 is a perspective view of an elastic positioning structure for a semiconductor carrier in accordance with the present invention;

FIG. 3 is a top view of the elastic positioning structure for a semiconductor carrier in accordance with the present invention;

FIG. 4 is a cross sectional view of FIG. 3; and

FIG. 5 is another top view of the elastic positioning structure for a semiconductor carrier in accordance with the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

The present invention will be clearer from the following description when viewed together with the accompanying drawings, which show, for purpose of illustrations only, the preferred embodiment in accordance with the present invention.

Referring to FIGS. 2-5, an elastic positioning structure for a semiconductor carrier 20 in accordance with the present invention is shown, wherein the semiconductor carrier 20 comprises a plurality of transversely and longitudinally arranged walls 21, 22, wherein the walls 21 are defined as first walls 21 and the walls 22 are defined as second walls 22 which are perpendicular to the first walls 21. The first walls 21 cooperate with the second walls 22 to define a plurality of recesses 30. The elastic positioning structure is formed on the walls 21, 22 and located in the recesses 30. The elastic positioning structure in the respective recesses 30 includes a plurality of stop blocks 40. In this embodiment, the semiconductor carrier 20 is made of elastic material, and the elastic positioning structure is integrally formed on the walls 21, 22 of the semiconductor carrier 20. Each of the recesses 30 is provided on two opposite walls 21, 22 with two gaps 221. In this embodiment, as shown in FIGS. 2-5, the gaps 221 are formed in the second walls 22 for enabling the semiconductor A to be put into or taken out of the recess 30.

Each of the stop blocks 40 includes a connecting section 41 which is connected to the first walls 21, and an abutting section 42 which is connected to the connecting section 41 and extends toward the first walls 21. The connecting section 41 is formed with a fixed end of the stop block 40, and the abutting section 42 is formed with an elastic free end of the stop block 40. Each of the stop blocks 40 includes a top surface 43, a bottom surface 44, and an oblique surface 45 which extends from the bottom surface 44 to the top surface 43 in an inclined manner. The bottom surface 44 has a width W44 bigger than a width W43 of the top surface 43. When received in the recess 30, the semiconductor A will come into contact synchronously at two points (the fixed end and the elastic free end of the stop block 40) with the stop block 40, thus enhancing he semiconductor positioning function of the semiconductor carrier 20, while ensuring that the semiconductor A can be easily put in or taken out of the recess 30.

To further improve the capability of the stop block 40 in positioning and restricting the semiconductor A, the oblique surface 45 of the stop block 40 is provided at the abutting section 42 with a protrusion 46 protruding toward the recess 30. The protrusion 46 has an inclined guide surface 461 which is connected to the top surface 43 of the stop block 40 and inclined toward the recess 30. The protrusion 46 is used to elastically restrict the semiconductor A, and the inclined guide surface 461 facilitates insertion of the semiconductor A into the recess 30. As shown in FIG. 3, an angle θ (30°θ90°) is defined between the connecting section 41 of the stop block 40 and the walls 21, 22 to provide the connecting section 41 a better deformability, and the angle θ in FIG. 3 is 45 degrees.

There can be two stop blocks 40 on a same first wall 21 of each of the recesses 30, as shown in FIG. 3. Or, two stop blocks 40 on a same first wall 21, and another two stop blocks 40 on a same second wall 22, as shown in FIG. 5, and the abutting sections 42 of two neighboring stop blocks 40 on the same wall 21, 22 extends toward an opposite wall 21, 22, so as to provide better elastic positioning of the semiconductor A.

While we have shown and described various embodiments in accordance with the present invention, it is clear to those skilled in the art that further embodiments may be made without departing from the scope of the present invention.

Claims

1. An elastic positioning structure for a semiconductor carrier, the semiconductor carrier comprising a plurality of transversely and longitudinally arranged walls, and a plurality of recesses defined by the walls, the elastic positioning structure being formed on the walls and located in the recesses; the elastic positioning structure in the respective recesses comprising:

a plurality of stop blocks each including a connecting section which is connected to the walls, and an abutting section which is connected to the connecting section and extends toward the walls, each of the stop blocks including a top surface, a bottom surface, and an oblique surface extending from the bottom surface to the top surface in an inclined manner, and the bottom surface having a width bigger than a width of the top surface.

2. The elastic positioning structure for the semiconductor carrier as claimed in claim 1, wherein the walls are first walls and second walls which are perpendicular to the first walls, and on a same first wall are provided two stop blocks.

3. The elastic positioning structure for the semiconductor carrier as claimed in claim 1, wherein the walls are first walls and second walls which are perpendicular to the first walls, on a same first wall are provided two stop blocks, and on a same second wall are provided another two stop blocks.

4. The elastic positioning structure for the semiconductor carrier as claimed in claim 1, wherein the oblique surface of the stop block is provided at the abutting section with a protrusion protruding toward the recess, and the protrusion has an inclined guide surface which is connected to the top surface of the stop block and inclined toward the recess.

5. The elastic positioning structure for the semiconductor carrier as claimed in claim 1, wherein an angle of 30˜90 degrees is defined between the connecting section of each of the stop block and the walls.

6. The elastic positioning structure for the semiconductor carrier as claimed in claim 1, wherein the abutting sections of two of the stop blocks extend toward an opposite wall.

7. The elastic positioning structure for the semiconductor carrier as claimed in claim 1, wherein each of the recesses is provided on two opposite walls with two gaps.

Patent History
Publication number: 20150114878
Type: Application
Filed: Oct 31, 2013
Publication Date: Apr 30, 2015
Inventor: Yu-Nan LO (Taichung City)
Application Number: 14/068,157
Classifications
Current U.S. Class: For A Semiconductor Wafer (206/710)
International Classification: B65D 1/36 (20060101);