OPTOELECTRONIC DEVICE STRUCTURE
The application is related to an optoelectronic device structure including a stress-balancing layer. The optoelectronic device structure comprises a high thermal conductive substrate, a stress-balancing layer on the high thermal conductive substrate, a reflective layer on the stress-balancing layer and an epitaxial structure on the reflective layer.
This application is a Divisional of co-pending application Ser. No. 12/617,413, filed on Nov. 12, 2009, for which priority is claimed under 35 U.S.C. §120; and this application claims the right of priority based on Taiwan Patent Application No. 097144439 entitled “Optoelectronic Device Structure”, filed on Nov. 13, 2008, which is incorporated herein by reference and assigned to the assignee herein.
TECHNICAL FIELDThe present application generally relates to an optoelectronic device structure and method for manufacturing thereof, and more particularly to a high thermal conductive light-emitting diode structure and method for manufacturing.
BACKGROUNDSapphire is commonly used as the substrate for supporting the blue light-emitting diode (LED) and is a low thermal conductive material (the coefficient of the thermal conductivity is about 40 W/mK). It is difficult for sapphire to deliver the heat efficiently when the blue LED is operated under high current condition. Therefore, the heat is accumulated and the reliability of the blue LED is affected.
Copper with high coefficient of thermal conductivity (˜400 W/mK) is later introduced to be the substrate of the LED by electro-plating or adhesion method so it can dissipate the heat efficiently. However, after removing the growth substrate, the internal stress compresses the whole piece of copper substrate and results in a warp in the wafer, and the reliability in the following processes is therefore influenced.
SUMMARYThe present application is to provide an optoelectronic device structure containing a substrate which is high thermal conductive and can be made of copper, aluminum, molybdenum, silicon, germanium, metal matrix composite material, copper alloy, aluminum alloy, or molybdenum alloy.
The present application is to provide an optoelectronic device structure containing a substrate which is high thermal conductive and can be formed by electroless plating, electro-plating, and electroform.
The present application is to provide an optoelectronic device structure containing a stress-balancing layer of a single layer structure or multiple layers structure.
The present application is to provide an optoelectronic device structure wherein the material of the stress-balancing layer can be nickel, tungsten, molybdenum, cobalt, platinum, gold, or copper.
The present application is to provide an optoelectronic device structure wherein the stress-balancing layer can be formed by electroless plating, electro-plating, and electroform.
The present application is to provide an optoelectronic device structure containing a substrate that is high thermal conductive, and the difference between the thermal expansion coefficient of the high thermal conductive substrate and that of the stress-balancing layer is not smaller than 5 ppm/° C.
The present application is to provide an optoelectronic device structure wherein the thickness of the stress-balancing layer is not smaller than 0.01 time and not greater than 0.6 time that of the high thermal conductive substrate.
The present application is to provide an optoelectronic device structure wherein the stress-balancing layer has a regularly patterned structure.
The present application is to provide an optoelectronic device structure wherein the width of each pattern of the regularly patterned structure of the stress-balancing layer is not smaller than 0.01 time and not greater than 1 time that of the optoelectronic device.
The present application is to provide an optoelectronic device structure wherein the thickness of the stress-balancing layer with a regularly patterned structure is not smaller than 0.01 time and not greater than 1.5 times that of the high thermal conductive substrate.
The present application is to provide an optoelectronic device structure wherein the width of the stress-balancing layer is greater than that of the high thermal conductive substrate.
The present application is to provide an optoelectronic device structure wherein the material of the epitaxial structure including one or more elements selected from a group consisting of gallium, aluminum, indium, arsenic, phosphorous, and nitrogen.
The foregoing aspects and many of the attendant advantages of this application will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
The present application discloses an optoelectronic device structure with a stress-balancing layer and method for manufacturing thereof.
The Embodiment 1A light-emitting diode is described in the following to exemplify the embodiment of the optoelectronic device structure of the present application where the structure and the method for manufacturing thereof are shown in
A second contact layer 26 and a reflective layer 27 are later formed on the epitaxial structure 22. The material of the second contact layer 26 can be indium tin oxide, indium oxide, tin oxide, cadmium tin oxide, zinc oxide, magnesium oxide, or titanium nitride. The material of the reflective layer 27 can be metal material such as silver, aluminum, titanium, chromium, platinum, or gold.
Next, the epitaxial structure with the reflective layer 27 is immersed in the chemical basin with the growth substrate 21 oriented up and the reflective layer 27 oriented down for the electro chemical deposition process such as electro-plating or electroform, or the electroless chemical deposition process such as electroless plating, and a stress-balancing layer 28 is formed under the reflective layer 27. The material of the stress-balancing layer can be nickel, tungsten, molybdenum, cobalt, platinum, gold, or copper. The structure is shown in
As the
Next, as
A light-emitting diode is described in the following to exemplify another embodiment of the optoelectronic device structure of the present application where the structure and the method for manufacturing thereof are shown in
Referring to the
Next, as
A light-emitting diode is described in the following to exemplify further another embodiment optoelectronic device structure of the present application where the structure and the method for manufacturing thereof as shown in
Beside, the light-emitting diode chips 100-300 described in the embodiments 1 to 3 can further combine with other devices to form a light-emitting apparatus.
Although specific embodiments have been illustrated and described, it will be apparent that various modifications may fall within the scope of the appended claims.
Claims
1. A method of making an optoelectronic device, comprising:
- providing an epitaxial structure having a first surface and a second surface opposite to the first surface;
- forming a layer on the epitaxial structure, the layer comprising a first portion covering the second surface and a second portion exposing the second surface; and
- forming a conductive layer on the second portion, the conductive layer having a width narrower than that of the epitaxial structure.
2. The method according to claim 1, further comprising separating the epitaxial structure along the first portion.
3. The method according to claim 1, further comprising a contact layer directly sandwiched between the epitaxial structure and the conductive layer.
4. The method according to claim 1, wherein a thermal expansion coefficient difference between the conductive layer and the epitaxial structure is not smaller than 5 ppm/° C.
5. The method according to claim 1, wherein the layer comprises a photoresist.
6. The method according to claim 1, further comprising forming an electrode on the first surface at a position right above to the second portion.
7. The method according to claim 1, further comprising etching the epitaxial structure from the second surface to the first surface along the first portion.
8. The method according to claim 1, further comprising removing the first portion.
9. The method according to claim 1, further comprising providing a submount for supporting the conductive layer.
10. The method according to claim 1, further comprising forming a plurality of dicing channels penetrating the epitaxial structure. (FIG. 11 channel 32)
11. The method according to claim 1, further comprising forming a contact layer on the epitaxial structure.
12. The method according to claim 1, further comprising forming a reflective layer between the epitaxial structure and the conductive layer.
13. The method according to claim 1, further comprising removing a part of the first portion, wherein the part is directly connected to the conductive layer.
14. The method according to claim 1, wherein the first portion has a width different from that of the second portion.
15. The method according to claim 1, further comprising sequentially removing the first portion and the epitaxial structure while substantially retaining the second portion.
Type: Application
Filed: Feb 13, 2015
Publication Date: Jun 4, 2015
Inventors: CHIEN-FU HUANG (HSINCHU), CHIA-LIANG HSU (HSINCHU)
Application Number: 14/622,300