MICROPHONE WITH AUTOMATIC BIAS CONTROL
A microphone comprising an automatic bias control providing a better signal quality is proposed. The microphone comprises a bias control circuit that can provide two or more voltages to the microphone's capacitor. The bias control circuit increases the voltage if the collapse frequency is low and decreases the voltage if the collapse frequency is high.
Latest EPCOS AG Patents:
- Method for producing a piezoelectric transformer and piezoelectric transformer
- Control circuit and method for controlling a piezoelectric transformer
- Sensor element, sensor arrangement, and method for manufacturing a sensor element and a sensor arrangement
- Electrical component and a method for producing an electrical component
- Electronic component for limiting the inrush current
The present invention refers to condenser microphones, e.g. MEMS microphones, in which the voltage between the microphone's capacitor is controlled to obtain an improved sound quality and to methods for manufacturing microphones.
Condenser microphones comprise a backplate and a membrane which act as electrodes of a capacitor. A voltage is applied to the capacitor. Received sound signals cause the membrane to oscillate. By evaluating the capacitor's capacity depending on the distance between the backplate and the membrane, the sound signals can, thus, be converted into electrical signals.
The sensitivity of a microphone depends on factors such as the distance between the capacitor's electrodes and the applied voltage. In order to increase the microphone's sensitivity, the distance between the capacitor's electrodes can be reduced and the voltage can be increased. However, at high sound pressure levels, electrostatic collapses can occur. Then, the membrane and the backplate come into mechanical contact. As the electrostatic force between the electrodes depends reciprocally on the distance d between the electrodes, the restoring force of the—flexible—membrane is usually not large enough to restore the capacitor's air gap. Thus, the bias voltage has to be removed in order to restore an equilibrium distance. For that, conventional microphones can comprise an anti-collapse circuit. However, each time the bias voltage is removed, the microphone is unable to convert sound signals into electrical signals. Thus, audible artifacts are obtained whenever such a collapse occurs. Especially at high sound pressure levels, these artifacts strongly reduce the microphone's sound quality.
A further means to prevent the membrane being “pulled in” towards the backplate is to provide protrusions on the backplate in order to maintain a minimum distance between the membrane and the backplate's main surface. However, such protrusions limit the amplitude of the membrane's oscillation resulting in a reduced dynamic range.
It is an object of the present invention to provide a microphone with reduced audible artifacts, especially at high sound pressure levels, which has high sensitivity at normal sound pressure levels. It is a further object to provide a microphone in which the probability of future collapses is reduced. Another object is to provide a method for driving such a microphone.
Therefore, a microphone according to independent claim 1 is provided. Dependent claims provide advantageous embodiments.
For that, a microphone comprises a capacitor with a backplate and a membrane. The microphone further comprises a voltage source applying a voltage to the capacitor and a bias control circuit. The bias control circuit determines the collapse frequency of the capacitor. The bias control circuit can provide at least two voltages larger than 0 V. The bias control circuit increases the voltage if the collapse frequency is low and decreases the voltage if the collapse frequency is high.
In other words, the microphone's bias voltage is adjusted based on how often the microphone collapses.
Thus, a microphone is provided in which the bias voltage of the microphone's capacitor depends on the actual collapse frequency being a measure for the sound pressure level. At high sound pressure levels, the bias voltage is reduced. As a result, the collapse frequency is decreased and the number of audible artifacts is reduced. Thus, the microphone's signal quality is improved although the microphone's sensitivity is reduced.
At normal sound pressure levels or at low sound pressure levels, the bias voltage is increased and the microphone's high sensitivity is restored. Then, the signal quality of the microphone is good as no audible artifacts are to be expected.
Here, collapse frequency denotes the number of electrostatic collapses in a predefined time interval.
The bias control circuit can be able to remove the voltage completely in order to detach the membrane from the backplate if a collapse has occurred.
For that, the microphone can comprise an anti-collapse circuit such as an anti-collapse circuit of known microphones.
Thus, a microphone is obtained in which the probability of future collapses, resulting in audible artifacts, is strongly reduced.
In one embodiment, the microphone's bias control circuit increases the voltage if the collapse frequency is lower or equal to a first frequency, and decreases the voltage if the collapse frequency is higher or equal to a second frequency.
Thus, the first frequency and the second frequency define threshold frequencies that, when reached, trigger measures—the increase or decrease of the microphone's voltage—to reduce audible artifacts or to increase the microphone's sensitivity.
In one embodiment, the bias control circuit comprises a timer, a collapse counter, an anti-collapse circuit, and a voltage controller.
The anti-collapse circuit can be a conventional anti-collapse circuit which temporarily removes or strongly reduces the bias voltage to separate the membrane from the backplate. The timer and the collapse counter can be utilized to determine the collapse frequency. Then, the collapse frequency can be determined by dividing the counted number of collapses by the respective time interval. The voltage controller controls the voltage source, correspondingly.
In one variant of this embodiment, the timer, therefore, provides a timer signal of a timer frequency Ft which defines a timer period Δt and where Δt=1/Ft. The collapse counter counts the number of collapses and may be reset after each timer signal. The collapse counter may be a device or circuit having a counter value, e.g. in a memory, being incremented or decremented at each collapse.
The voltage controller reduces the voltage if the number of counted collapses of a timer period Δt exceeds a first critical number and increases the voltage if the number of counted collapses of a timer period Δt falls below a second critical number.
Thus, a microphone which can be driven with a simple algorithm is provided. In a loop, the appearance of the timer signal is expected. Meanwhile, the number of occurred collapses within the specific time period is counted. If the number of counted collapses exceeds the critical number, then the voltage is reduced and the next timer period can be started. However, if the timer period Δt expires and the number of counted collapses falls below a second critical number, the voltage is increased in order to enhance the microphone's sensitivity.
Further, it is possible to maintain the voltage if the number of counted collapses per timer period is within an interval of acceptable collapse frequencies. Such an interval can be defined by the first and the second critical number.
The number of provided voltages is not limited to 2 voltages being larger than 0 V. The microphone or the voltage source can provide n voltages larger than 0 V where the first critical number and the second critical number depend on the voltage. Here, n is a integer number larger than or equal to 3, 4, 5, 6, . . . .
Thus, the microphone can comprise a plurality of voltage stages between which the bias control circuit can change depending on the collapse frequency and/or the counted collapse number.
It is possible that the second critical number of a stage i equals the first critical number of stage i+1.
In one embodiment, the timer period Δt depends on the variation rate of the voltage.
Then, high variation rates can result in short timer periods Δt and low variation rates can result in larger timer periods Δt. The variation rate is defined as the change in voltage divided by a time of unit length. Accordingly, the critical numbers can be adjusted to the new timer period Δt.
In one embodiment, the bias control circuit varies the voltage in discrete steps.
Such an embodiment can be realized with a digital integrated circuit. Then, the timer period Δt can be defined as the time of a certain number of clock cycles triggering the digital integrated circuits.
In one embodiment, however, the bias control circuit comprises analog circuit elements. These analog circuit elements can comprise integrators to determine the respective timer periods Δt and to determine the number of collapses or to directly determine the collapse frequency. These analog circuit elements can comprise means for calculating the voltages' variation rate.
In one embodiment, the backplate of the membrane comprises protrusions, e.g. studs, to prevent larger areas' stiction of the membrane to the backplate. Compared to conventional microphones, the protrusions' length can be reduced in order to obtain a better dynamic range.
A method for driving a condenser microphone comprises the steps:
-
- providing a periodic timer signal defining a timer period Δt,
- counting the number of collapses per timer period,
- determining the voltage variation rate based on the counted collapses per timer period Δt.
Then, when the bias voltage is to be maintained, the voltage variation rate could be set to zero. If the voltage is to be increased, the voltage variation rate can be set to a positive value and if the voltage is to be reduced, the voltage variation rate can be set to a negative value. The voltage variation rate can be varied in discrete steps or continuously.
The basic idea of the present invention and examples of such microphones are shown in the schematic figures.
The bias control circuit BCC may work in a continuous mode continuously controlling the bias voltage. However, it is possible for the bias control circuit BCC to perform discrete steps to control the bias voltage.
The bias control circuit of
Timer T comprises a memory cell for storing an actual timer value VT and further comprises a memory cell to store an initializing timer value Ti. The clock signals SCLK are counted, for example by incrementing or decrementing the timer value VT on each clock signal SCLK. When the number of counted clock signals SCLK exceeds the initial timer value Ti, a timer signal ST is submitted to the collapse counter CC. It is possible that initially the timer value VT is set to the initial timer value VI. Every time a clock signal CLK is received, the timer value VT is decremented. When the timer value VT reaches zero, the timer signal ST is emitted and the—actual—timer value VT is reset to the initial timer value Ti.
Every time the anti-collapse circuit ACC detects a collapse, a collapse signal SCOL is transmitted to the collapse counter CC. The number of collapse signals SCOL is counted. For that, the collapse counter CC comprises a memory cell, the value of which is changed—e.g. incremented or decremented—every time a collapse signal SCOL is received. Further, the control circuit CC comprises a memory cell for a critical number of collapses CCi. When the power-on reset signal SPOR is received, the value of the collapse counter VCC is set to the initialized value CCi. Every time the anti-collapse circuit ACC sends a collapse signal SCOL to the collapse counter CC, the number of collapses is incremented, i.e. VCC is decremented.
When the collapse counter CC receives a timer signal ST before receiving a collapse signal SCOL, an increment signal SINC is transmitted to the voltage controller VC. The voltage controller VC comprises a memory cell containing the voltage value VV. When the voltage value VV is at its maximum value nothing happens. If the voltage value VV is below its maximum value, the voltage value is increased.
When the value of the collapse counter VCC was decremented to zero before a timer signal ST is received, the collapse frequency is regarded as high and a decrement signal SDEC is transmitted to the voltage controller VC. Unless the voltage value VV of the voltage controller VC has reached its minimum value, the voltage value VV is decreased.
When the collapse counter CC receives a timer signal ST when a few collapses have occurred but the value of the collapse counter VCC contains still a positive value, then a balanced state between a high bias voltage and a low number of acoustic artifacts is obtained; the bias voltage is within an optimal area.
The initial value of the timer Ti determining the length of the timer period can depend on the bias voltage according to the voltage value VV, the current bias voltage adjustment rate, or other external factors. The initial value of the collapse counter CCi can depend on the actual bias voltage or the bias voltage adjustment rate.
Thus, a bias control circuit BCC is provided that can be driven with a simple and, thus, stable algorithm which bases on counting clock signals and counting collapse signals, decrementing integer values and comparing whether such an integer value−timer value VT and collapse counter value VCC−equals zero.
Thus, such an algorithm can be implemented with simple circuit elements, e.g. in an integrated circuit chip.
When the counted collapse number exceeds a second critical value—represented by the lower critical number CN in FIG. 3A—the collapse frequency is high and the bias voltage is reduced unless the bias voltage has reached its minimum value.
When the number of collapses is between the critical numbers, it can be assumed that the collapse frequency is in its optimum range and the bias voltage can be maintained.
It is possible for the timer to reset the timer value VT when reaching zero. However, it is possible to reset the timer value to its initial value when the decrement signal is transmitted.
In order to fully understand
The first row shows the power-on request signal SPOR initializing the bias control circuit BCC.
The second row shows the clock signal SCLK.
The third row shows the value of the timer VT.
The fourth row shows the timer signal ST emitted by the timer T when the time period Δt has expired.
The fifth row shows the signal transmitted by the anti-collapse circuit to the collapse counter SCOL when a collapse is detected.
The sixth row shows the value of the collapse counter VCC.
The seventh row shows the decrement signal SDEC transmitted by the collapse counter CC to the voltage controller VC when the number of collapses exceeded the second critical number before the time period Δt ends.
The eighth row shows the increment signal SINC transmitted from the collapse counter CC to the voltage controller VC when the number of counted collapses falls below the first critical number and the timer period expired.
The ninth row shows the value of the bias voltage VV.
In
Here, the number of counted collapses exceeds the second critical number and a decrement signal SDEC—compare row 7 is transmitted to the voltage controller VC. As a result, the voltage value VV of the voltage controller VC is also decremented—compare row 9.
Control of the bias voltage is not limited to linear functions.
Stepwise—i.e. in discrete steps—control of the bias voltage may be preferred when utilizing digital bias control circuits. However, using analog control circuits, comprising e.g. integrating circuits or differentiating circuits, may result in still better converging bias voltages. Then, the number of acoustic artifacts—audible artifacts—is further reduced and the microphone's sensitivity is further improved.
A microphone is not limited to the embodiments described in the specification or shown in the figures. Microphones comprising further elements such as further circuits, capacitors, membranes, backplates, active or passive circuit components or combinations thereof are also comprised by the present invention.
LIST OF REFERENCE SIGNS
- ACC: anti-collapse circuit
- ASIC: ASIC chip
- BCC: bias control circuit
- BP: backplate
- CC: collapse counter
- CCi: initial collapse counter value
- CN: critical number
- CS: carrier substrate
- M: membrane
- MC: MEMS chip
- PR: protrusion
- S: stud
- SCLK: clock signal
- SCOL: collapse signal
- SDEC: decrement signal
- SINC: increment signal
- SPOR: power-on reset signal
- ST: timer signal
- t: time
- T: timer
- Ti: initial timer value
- V: bias voltage
- VC: voltage controller
- VCC: collapse counter value
- VS: voltage source
- VT: timer value
- VV: voltage value
- Δt: timer period
Claims
1. A microphone, comprising
- a capacitor with a backplate and a membrane,
- a voltage source applying a voltage to the capacitor,
- a bias control circuit, where
- the bias control circuit determines the collapse frequency of the capacitor,
- the bias control circuit can provide two voltages >0 V,
- the bias control circuit increases the voltage if the collapse frequency is low and decreases the voltage if the collapse frequency is high.
2. The microphone of claim 1, where
- the bias control circuit increases the voltage if the collapse frequency is lower or equal to a first frequency and decreases the voltage if the collapse frequency is higher or equal to a second frequency.
3. The microphone of claim 1, where the bias control circuit comprises a timer, a collapse counter, an anti collapse circuit, and a voltage controller.
4. The microphone of claim 3, where
- the timer provides a timer signal of a timer frequency Ft defining a timer period Δt=1/Ft,
- the collapse counter counts the number of collapses after each timer signal,
- the voltage controller reduces the voltage if the number of counted collapses of a timer period Δt exceeds a first critical number,
- the voltage controller increases the voltage if the number of counted collapses of a timer period Δt falls below a second critical number.
5. The microphone of claim 4, providing n voltages >0, where
- the first critical number and the second critical number depend on the voltage, and
- n is a integer number >=3.
6. The microphone of claim 4, where the timer period Δt depends on the variation rate of the voltage.
7. The microphone of claim 1, where
- the voltage is a function of the collapse frequency.
8. The microphone of claim 1, where the bias control circuit varies the voltage in discrete steps.
9. The microphone of claim 1, where the bias control circuit varies the voltage continuously.
10. The microphone of claim 9, where the bias control circuit comprises analog circuit elements.
11. The microphone of claim 1, where the backplate or the membrane comprises protrusions.
12. Method for driving a microphone, comprising the steps of:
- providing a periodical timer signal defining a timer period Δt,
- counting the number of collapses per timer period,
- determining the voltages variation rate based on the counted collapses per timer period Δt.
Type: Application
Filed: Mar 30, 2012
Publication Date: Jun 11, 2015
Patent Grant number: 9609432
Applicant: EPCOS AG (Müenchen)
Inventor: Troels Andersen (Smorum)
Application Number: 14/387,708