THERMAL UNIFORMITY COMPENSATING METHOD AND APPARATUS
The invention provides a thermal uniformity compensating method and apparatus. The steps of the method includes: respectively measuring a plurality of first resistances of a plurality of hot spot patterns of a chip over an hot spot effect, wherein a plurality of pattern densities of the hot spot patterns are different; respectively measuring a plurality of second resistances of each of the hot spot patterns of the chip by a plurality of test keys over the hot spot effect, wherein a plurality of distances between the test keys and the corresponding hot spot pattern are different; establishing a look-up information according to the first and second resistances; analyzing a layout data of the chip for obtaining a pattern density information; and generating a calibrated layout data according to the pattern density information and the look-up information.
1. Field of the Invention
The invention relates to a thermal uniformity compensating apparatus and method. Particularly, the invention relates to a thermal uniformity compensating method for hot spot effect in semiconductor process.
2. Description of Related Art
In conventional, a standard test key with 20-pads is used for detecting the thermal uniformity by resistance change. Many hot-spot-patterns with many types respectively are disposed in the wafer for the detection. For example, different sizes and densities of the hot-spot-patterns are used for the detection. Moreover, for reducing the hot spot effect, a LRTP injection direction and/or a laser scan skilled can be changed. That is, in conventional, the hot spot effect can be only measured and difficult to be predicted before the wafer being taped out again. At the stage of the hot spot detection, the hot spot effect could not be fully compensated.
SUMMARY OF THE INVENTIONThe invention is directed to a thermal uniformity compensating method and apparatus, which can compensate the thermal uniformity of a chip before tape-out.
The invention provides a thermal uniformity compensating method for a chip, the steps of the method includes: respectively measuring a plurality of first resistances of a plurality of hot spot patterns of the chip over an hot spot effect, wherein a plurality of pattern densities of the hot spot patterns are different; respectively measuring a plurality of second resistances of each of the hot spot patterns of the chip by a plurality of test keys over the hot spot effect, wherein a plurality of distances between the test keys and the corresponding hot spot pattern are different; establishing a look-up information according to the first and second resistances; analyzing a layout data of the chip for obtaining a pattern density information; and generating a calibrated layout data according to the pattern density information and the look-up information.
The invention also provides a thermal uniformity compensating apparatus, and the thermal uniformity compensating apparatus includes a controller and a storage unit. The controller is configure for: respectively measuring a plurality of first resistances of a plurality of hot spot patterns of a chip over an hot spot effect; respectively measuring a plurality of second resistances of each of the hot spot patterns of the chip by a plurality of test keys over the hot spot effect, wherein a plurality of pattern densities of the hot spot patterns are different, and a plurality of distances between the test keys and the corresponding hot spot pattern are different; establishing a look-up information according to the first and second resistances; and generating a calibrated layout data according to the pattern density information and the look-up information. The storage unit is coupled to the controller, and the storage unit is used for storing the look-up information.
According to the above descriptions, in the invention, the variations of resistance can be obtained with thermal difference, and a look-up information can be obtained by the variations of resistance. By referring to the look-up information, the hot spot impact can be predicted, and the thermal uniformity can be compensated before the chip is taped-out. Such as that the critical dimension (CD) value can be well controlled by optical proximity correction (OPC) selective sizing skill, and no complicated procedure is needed for carrying out the thermal uniformity compensating method.
In order to make the aforementioned and other features and advantages of the invention comprehensible, several exemplary embodiments accompanied with figures are described in detail below.
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
Referring to
Additionally, each of the resistance providing units 211 may be any material in the chip of a semiconductor wafer. In the embodiment, each of the resistance providing units 211 may be a poly block or a diffusion block.
Referring to
Referring to
Please be noted here, the resistances of the hot spot patterns 310-330 may be measured by the test keys which are respectively corresponding to the hot spot patterns 310-330. A distance between the hot spot pattern 310 and corresponding test key equals to a distance between the hot spot pattern 320 and corresponding test key, and a distance between the hot spot pattern 320 and corresponding test key equals to a distance between the hot spot pattern 330 and corresponding test key.
By measuring the resistances of a plurality of hot spot patterns respectively, a relationship between resistance and density of hot spot pattern may be obtained. Referring to
Referring to
By measuring the second resistances of the hot spot pattern 510 through the test keys 521-523 respectively, a relationship between resistances of hot spot pattern and distance between the hot spot pattern and test keys may be obtained. Referring to
Referring to
dR%=(a×Density+b)×e(−r
Wherein, a, b, and c are constant parameters and may be determined by measuring results shown as the bar charts of
The formula 1 may be used to generate the look-up information when the constant parameters a, b, c are determined. Also, a look-up table can be established by digitalizing the formula 1, and the look-up table may be used to provide the look-up information. Further, the look-up table may be implemented by a storage unit, such as a memory.
In step S140, when the look-up information is ready, a layout data (such as a Gds file) of the chip may be analyzed to obtain a pattern density information. Please be noted here, to detect the pattern density information means to detect a density area of the chip. The pattern density information may include a density of the density area, and a distance between the density area and a specified resistance measuring block in the chip.
In step S150, a calibrated layout data may be obtained according to the pattern density information and the look-up information. In detail, by looking up the look-up information according to the pattern density information obtained in step S140, an optical proximity correction (OPC) selective sizing skill can be performed for controlling the critical dimension (CD) of the chip, and the calibrated layout data may be obtained correspondingly. That is, an updated Gds file may be obtained in step S150.
It should be noted here, the updated Gds file may be used to tape-out, and an updated chip is generated accordingly. That is, a plurality of updated hot spot patterns and updated test keys in the updated chip can be obtained. For compensating the thermal uniformity better, a plurality of third resistances of the updated hot spot patterns of the updated chip over the hot spot effect can be measured, wherein, a plurality of pattern densities of the updated hot spot patterns are different. Moreover, a plurality of fourth resistances of each of the updated hot spot patterns of the updated chip by a plurality of updated test keys over the hot spot effect be measured, wherein a plurality of distances between the updated test keys and the corresponding updated hot spot pattern are different. Furthermore, an updated look-up information can be obtained according to the third and fourth resistances.
Here, the calibrated layout data may be further calibrated once more according to the updated look-up information, and a new layout data with better thermal uniformity can be generated.
Referring to
Referring to
In step S830, an updated chip is obtained by taping out the updated Gds file, and a new Si-data may be obtained in step S840 by measuring parameters of elements of the updated chip. The new Si-data may be provided for updating the look-up table, and the updated look-up table may be provided to be a new data base for OPC selective sizing operation in next thermal uniformity compensating turn.
Referring to
Detail actions of the thermal uniformity compensating operation are described in the embodiments mentioned before, and no more repeated descriptions here.
In summary, present application provides the thermal uniformity compensating method by a look-up information, and the look-up information is obtained by measuring the resistances of the hot spot patterns based on different conditions. Accordingly, critical dimension (CD) can be well controlled by an OPC selective resizing operation based on the look-up information. Furthermore, no complicated procedure needed in the thermal uniformity compensating method of present application, and easy to carry out.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Claims
1. A thermal uniformity compensating method for a chip, comprising:
- disposing a plurality of hot spot patterns and test keys in the chip on a semiconductor wafer;
- respectively measuring a plurality of first resistances of the hot spot patterns of the chip by the test keys over a hot spot effect, wherein a plurality of pattern densities of the hot spot patterns are different;
- respectively measuring a plurality of second resistances of each of the hot spot patterns of the chip by the test keys over the hot spot effect, wherein a plurality of distances between the test keys and the corresponding hot spot pattern are different;
- establishing a look-up information according to the first and second resistances, wherein the look-up information is established based on the pattern densities and the distances, and used for looking-up to obtain a plurality of resistance variations;
- analyzing a layout data of the chip for obtaining a pattern density information; and
- generating a calibrated layout data according to the pattern density information and the look-up information.
2. The thermal uniformity compensating method as claimed in claim 1, further comprising:
- generating an updated chip according to the calibrated layout data;
- respectively measuring a plurality of third resistances of a plurality of updated hot spot patterns of the updated chip over the hot spot effect, wherein a plurality of pattern densities of the updated hot spot patterns are different;
- respectively measuring a plurality of fourth resistances of each of the updated hot spot patterns of the updated chip by a plurality of updated test keys over the hot spot effect, wherein a plurality of distances between the updated test keys and the corresponding updated hot spot pattern are different; and
- updating the look-up information to obtain an updated look-up information according to the third and fourth resistances.
3. The thermal uniformity compensating method as claimed in claim 1, wherein each of the hot spot patterns is formed by a plurality of resistance providing units, and the resistance providing units are arranged in an array.
4. The thermal uniformity compensating method as claimed in claim 3, wherein the resistance providing units are poly blocks or diffusion blocks.
5. The thermal uniformity compensating method as claimed in claim 3, wherein a shape of each the resistance providing units is oval, circle or polygon.
6. The thermal uniformity compensating method as claimed in claim 3, wherein a distance between two neighbored resistance providing units of each of the hot spot patterns is inversely proportional to the corresponding pattern densities.
7. The thermal uniformity compensating method as claimed in claim 1, wherein each of the hot spot patterns is coupled to the corresponding test keys, and the first resistance and second resistances corresponding to each of the hot spot patterns are obtained through the corresponding test keys.
8. The thermal uniformity compensating method as claimed in claim 1, wherein the calibrated layout data is generated by an optical proximity correction operation according to the look-up information and the pattern density information.
9. A thermal uniformity compensating apparatus, comprising:
- a chip, disposed on a semiconductor wafer, wherein a plurality of hot spot patterns and test keys are disposed in the chip; and
- a controller being configured for: respectively measuring a plurality of first resistances of the hot spot patterns of a chip by the test keys over a hot spot effect; and respectively measuring a plurality of second resistances of each of the hot spot patterns of the chip by the test keys over the hot spot effect, wherein a plurality of pattern densities of the hot spot patterns are different, and a plurality of distances between the test keys and the corresponding hot spot pattern are different; establishing a look-up information according to the first and second resistances, wherein the look-up information is established based on the pattern densities and the distances, and used for looking-up to obtain a plurality of resistance variations; analyzing a layout data of the chip for obtaining a pattern density information; and generating a calibrated layout data according to the pattern density information and the look-up information; and a storage unit, coupled to the controller for storing the look-up information.
10. The thermal uniformity compensating apparatus as claimed in claim 9, wherein the controller is further configured for:
- providing the calibrated layout data to generate an updated chip;
- respectively measuring a plurality of third resistances of a plurality of updated hot spot patterns of the updated chip over the hot spot effect, and respectively measuring a plurality of fourth resistances of each of the updated hot spot patterns of the updated chip by a plurality of test keys over the hot spot effect, wherein a plurality of distances between the test keys and the corresponding updated hot spot pattern are different,
- wherein, a plurality of pattern densities of the updated hot spot patterns are different and a plurality of distances between the test keys and the corresponding updated hot spot pattern are different; and
- updating the look-up information to obtain an updated look-up information according to the third and fourth resistances.
11. The thermal uniformity compensating apparatus as claimed in claim 9, wherein each of the hot spot patterns is formed by a plurality of resistance providing units, and the resistance providing units are arranged in an array.
12. The thermal uniformity compensating apparatus as claimed in claim 11, wherein the resistance providing units are poly blocks or diffusion blocks.
13. The thermal uniformity compensating apparatus as claimed in claim 11, wherein a distance between two neighbored resistance providing units of each of the hot spot patterns is inversely proportional to the corresponding pattern densities.
14. The thermal uniformity compensating apparatus as claimed in claim 11, wherein a shape of each the resistance providing units is oval, circle or polygon.
15. The thermal uniformity compensating apparatus as claimed in claim 9, wherein each of the hot spot patterns is coupled to the corresponding test keys, and the first resistance and second resistances corresponding to each of the hot spot patterns are obtained through the corresponding test keys.
16. The thermal uniformity compensating apparatus as claimed in claim 9, wherein the calibrated layout data is generated by an optical proximity correction operation according to the look-up information and the pattern density information.
Type: Application
Filed: Jul 17, 2014
Publication Date: Jan 21, 2016
Inventors: Chun-Ming Chang (Kaohsiung City), Wen-Jung Liao (Hsinchu City), Chen-Wei Lee (Hsinchu City), Chun-Liang Hou (Hsinchu County)
Application Number: 14/333,919