SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor layer, an insulating film of silicon nitride or silicon oxynitride on the semiconductor layer, source and drain electrodes formed in openings of the insulating film and in contact with the semiconductor layer, and a gate electrode formed in an opening in the insulating film that is located between the source electrode and the drain electrode and formed in contact with the semiconductor layer. The insulating film has an Si content that is uniform in a direction of thickness of the insulating film, an upper region, and a lower region. The upper region can have an oxygen or a nitrogen concentration that is greater than that of the lower region. The upper region can be formed by exposing the surface of the insulating film to ozone, an oxygen plasma or a nitrogen plasma.
Latest SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC. Patents:
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, for example, to a semiconductor device manufacturing method making use of electron beam exposure.
2. Related Background Art
There are known semiconductor device manufacturing methods making use of the electron beam exposure. An electron beam used in the electron beam exposure has the wavelength shorter than those of ultraviolet beams used in general projection exposure and thus has the feature of allowing realization of high resolution. There is a developed method that enables a lithography step using the electron beam exposure to be performed with high sensitivity (e.g., cf. Patent Literature 1).
Patent Literature 1: Japanese Patent Application Laid-Open Publication No. 2000-39717
SUMMARY OF THE INVENTIONWith a process of forming a resist film for electron beam exposure on an insulating film provided on a nitride semiconductor layer or on a silicon carbide layer and subjecting this resist film to the electron beam exposure, an opening pattern may not be formed in a desired shape in the resist film and, for example, it may result in degradation of dimension controllability.
The present invention has been accomplished, in view of the above problem, and it is purpose of the present invention to provide a semiconductor device manufacturing method which allows the opening pattern to be formed in a good shape in the resist film.
An aspect of the present invention is a method of manufacturing a semiconductor device comprising: a step of forming an insulating film of any one of silicon nitride, silicon oxide, and silicon oxynitride, on a semiconductor layer; a step of introducing oxygen or nitrogen to the insulating film; a step of forming a resist film on the insulating film, after the step of introducing the oxygen or nitrogen; and a step of exposing the resist film with an electron beam. According to the aspect of the present invention, an opening pattern can be formed in a good shape in the resist film.
In the foregoing configuration mentioned above, there may be a configuration wherein the step of introducing oxygen or nitrogen is carried out by exposing the surface of the insulating film to an ozone, an oxygen plasma, or a nitrogen plasma.
In the foregoing configuration mentioned above, there may be a configuration further comprising a step of performing process of etching the insulating film through an opening in the resist pattern formed by the step of exposing.
In the foregoing configuration mentioned above, there may be a configuration further comprising a step of forming a gate electrode or an ohmic electrode in an opening pattern formed in the insulating film by the etching process.
In the foregoing configuration mentioned above, there may be a configuration wherein the insulating film contains silicon nitride at a composition ratio of silicon to nitrogen of not less than 0.76.
In the foregoing configuration mentioned above, there may be a configuration wherein the nitride semiconductor layer includes a channel layer and an electron supply layer with a larger bandgap than the channel layer.
In the foregoing configuration mentioned above, there may be a configuration wherein the step of introducing oxygen is carried out under conditions of ozone concentration in the range of 10% to 100%, a pressure in the range of 0.1 Torr to 10 Torr, a temperature in the range of 150° C. to 350° C., and a treatment time in the range of 1 minute to 5 minutes.
In the foregoing configuration mentioned above, there may be a configuration wherein the step of introducing oxygen is carried out by exposing the surface of the insulating film to the oxygen plasma under conditions of an oxygen concentration in the range of 3% to 100%, a pressure in the range of 0.03 Torr to 5 Torr, an RF power in the range of 50 W to 800 W, a temperature in the range of 25° C. to 350° C., and a treatment time in the range of 1 minute to 10 minutes.
In the foregoing configuration mentioned above, there may be a configuration wherein the step of introducing nitrogen is carried out by exposing the surface of the insulating film to the nitrogen plasma under conditions of a nitrogen concentration of 100%, a pressure in the range of 0.03 Torr to 5 Torr, an RF power in the range of 50 W to 800 W, a temperature in the range of 25° C. to 350° C., and a treatment time in the range of 1 minute to 10 minutes.
In the foregoing configuration mentioned above, there may be a configuration wherein a condition of exposing the electron beam to the resist layer is an acceleration voltage in the range of 25 kV to 50 kV, a current value in the range of 0.01 nA to 0.5 nA, and a dose amount in the range of 2 μC/cm2 to 50 μC/cm2.
In the foregoing configuration mentioned above, there may be a configuration wherein the semiconductor layer is composed of nitride semiconductor or silicon carbide.
In the foregoing configuration mentioned above, there may be a configuration wherein a composition of oxygen or nitrogen in an upper area of the insulating film is greater than that of a lower area of the insulating film after performing the step of introducing of oxygen or nitrogen.
An aspect of the present invention is a semiconductor device comprising: a semiconductor layer, an insulating film of any one of silicon nitride, silicon oxide, and silicon oxynitride on the semiconductor layer, and having the concentration of oxygen or nitrogen of an upper region of the insulating film is greater than that of a lower region of the insulating film; a source and drain electrodes formed in openings of the insulating film and in contact with the semiconductor layer; and a gate electrode formed in an opening located between the source and drain electrode of the insulating film and in contact with the semiconductor layer.
In the foregoing configuration mentioned above, there may be a configuration wherein the insulating film having Si content uniformly in a direction of thickness of the insulating film.
In the foregoing configuration mentioned above, there may be a configuration wherein the thickness of the upper region of the insulating film is equal to or larger than 2 nm.
In the foregoing configuration mentioned above, there may be a configuration wherein the concentration of oxygen in the upper region is greater than that of the lower region and thickness of the upper region is equal to or greater than 2 nm.
In the foregoing configuration mentioned above, there may be a configuration wherein the width of the opening of the insulating film for the gate electrode is 0.2 μm or less.
In the foregoing configuration mentioned above, there may be a configuration wherein the thickness of the insulating film is equal to or smaller than 20 nm.
In the foregoing configuration mentioned above, there may be a configuration wherein the semiconductor layer composed of gallium nitride, aluminum gallium nitride, indium aluminum nitride, indium aluminum gallium nitride or aluminum nitride.
An aspect of the present invention is a semiconductor device comprising: a semiconductor layer, an insulating film of any one of silicon nitride, silicon oxide, and silicon oxynitride on the semiconductor layer, and having an upper region and a lower region, the upper region formed by exposing the surface of the insulating film to an ozone, an oxygen plasma, or a nitrogen plasma; a source and drain electrodes formed in openings of the insulating film and in contact with the semiconductor layer; and a gate electrode formed in an opening located between the source and drain electrode of the insulating film and in contact with the semiconductor layer.
The present invention leads to obtain an opening pattern to be formed in a good shape in the resist film.
Embodiments of the present invention will be described below.
In Embodiment 1, the semiconductor device manufacturing method will be described with an example of a High Electron Mobility Transistor (HEMT) using nitride semiconductors, as a semiconductor device.
The thickness of the buffer layer 12 is, for example, 300 nm, the thickness of the electron transit layer 14, for example, 1.0 μm, the thickness of the electron supply layer 16, for example, 20 nm, and the thickness of the cap layer 18, for example, 5 nm. In the HEMT, a Two-Dimensional Electron Gas (2DEG) is produced at an interface between the electron transit layer 14 and the electron supply layer 16.
As shown in
Ozone concentration: 10% to 100% (the rest is oxygen)
Pressure: 0.1 Torr to 10 Torr
Temperature: 150° C. to 350° C.
Treatment Time: 1 minute to 5 minutes
The ozone concentration is preferably in the range of 30% to 100% and more preferably in the range of 50% to 100%. The pressure is preferably in the range of 1 Torr to 8 Torr and more preferably in the range of 3 Torr to 5 Torr. The temperature is preferably in the range of 200° C. to 300° C. and more preferably in the range of 220° C. to 280° C. The treatment time is preferably in the range of 2 minutes to 4 minutes and more preferably in the range of 2.5 minutes to 3.5 minutes. Prior to execution of the oxidation treatment, the surface of the insulating film 22 may be subjected to a pretreatment to immerse the surface in isopropyl alcohol (IPA) so as to clean it. The immersion time in IPA can be, for example, 5 minutes.
In the insulating film 22 of SiN there are, for example, Si—H (hydrogen) bonds, dangling bonds of Si atoms, etc. as well as Si—N bonds. The oxidation treatment for the surface of the insulating film 22 can bring about replacement of H of Si—H bonds with O (oxygen) and binding of O to the dangling bonds of Si atoms, which can reduce defects in the insulating film 22.
As shown in
As shown in
As shown in
As shown in
As shown in
As shown in
As shown in
As shown in
In Embodiment 1, as described with
Oxygen concentration: 3% to 100% (the rest is nitrogen)
Pressure: 0.03 Torr to 5 Torr
RF power: 50 W to 800 W
Temperature: 25° C. to 350° C.
Treatment time: 1 minute to 10 minutes
The oxygen concentration is preferably in the range of 30% to 100% and more preferably in the range of 50% to 100%. The pressure is preferably in the range of 0.5 Torr to 3 Torr and more preferably in the range of 1 Torr to 2 Torr. The RF power is preferably in the range of 200 W to 600 W and more preferably in the range of 300 W to 500 W. The temperature is preferably in the range of 25° C. to 200° C. and more preferably in the range of 25° C. to 100° C. The treatment time is preferably in the range of 2 minutes to 8 minutes and more preferably in the range of 3 minutes to 5 minutes.
Experiments about the oxidation treatment conducted by the Inventor will be described below. The Inventor conducts the oxidation treatment by forming a SiN film in the thickness of 10 nm on a plurality of substrates by the plasma-enhanced CVD process and exposing the surface of the SiN film to the ozone atmosphere or to the oxygen plasma. The oxidation treatment by exposing the surface to the ozone atmosphere is carried out under the below conditions.
Ozone concentration: 50% (the rest is oxygen)
Pressure: 3 Torr
Temperature: 250° C.
Treatment time: 3 minutes
The oxidation treatment by exposing the surface to the oxygen plasma is carried out under the below conditions.
Oxygen concentration: 100%
Pressure: 1 Torr
RF power: 400 W
Temperature: 25° C.
Treatment time: 3 minutes
The SiN films before and after the oxidation treatment are compared by measurement making use of the FTIR (Fourier Transform InfraRed spectrometry) method. The FTIR method is a measurement method of irradiating a material with infrared light and investigating a composition of the material or the like from absorption amounts of infrared light having energies corresponding to vibration energies of molecules.
The below will describe the reason for performing the oxidation treatment for the surface of the insulating film 22. The Inventor measures with a Scanning Electron Microscope (SEM) for length measurement, an opening pattern formed by dry etching in the insulating film 22 described with
Ozone concentration: 50% (the rest is oxygen)
Pressure: 3 Torr
Temperature: 250° C.
Treatment time: 3 minutes
For comparison, the Inventor also measures with the length-measurement SEM, an opening pattern formed by dry etching in the insulating film 22 in Comparative Example 1 manufactured by the same method as in Embodiment 1 except that the surface of the insulating film 22 is not subjected to the oxidation treatment.
The following will describe the reason for the results that the pattern shape formed in the insulating film 22 is good in Embodiment 1 with execution of the oxidation treatment for the surface of the insulating film 22 and the pattern shape is abnormal in Comparative Example 1 without execution of the oxidation treatment of the surface of the insulating film 22.
As shown in
On the other hand, when the surface of the insulating film 22 is subjected to the oxidation treatment, the defects can be reduced because of the replacement of H of Si—H bonds in the insulating film 22 with O and the binding of O to dangling bonds of Si atoms, as explained with
In Embodiment 1, as described above, the oxidation treatment is carried out for the surface of the insulating film 22 of silicon nitride formed on the nitride semiconductor layer 20, the EB resist film 46 is then formed on the insulating film 22, and the electron beam exposure is carried out for the EB resist film 46. This can suppress the unwanted exposure of the EB resist film 46, as explained with
Since the opening pattern 50 is formed in the good shape in the EB resist film 46, the etching process for the insulating film 22 through the opening 50 as shown in
In the HEMT using the nitride semiconductors, as described above, the shape of the opening pattern 50 formed in the EB resist film 46 will degrade unless the oxidation treatment is carried out for the surface of the insulating film 22. However, such degradation does not occur in a HEMT using gallium arsenide (GaAs)-based semiconductors. The reason for it will be described using
The GaAs-based semiconductors are characterized by large scattering angles of back-scattered electrons 62 because of their crystallinity. For this reason, electrons are unlikely to accumulate in the narrow region of the insulating film 22. Furthermore, the bandgap energies of the GaAs-based semiconductors are smaller than those of the nitride semiconductors (e.g., GaAs: 1.43 eV) and thus electrons going into the GaAs-based semiconductor layers are easy to recombine with holes. Therefore, it becomes possible for new electrons to subsequently go into the GaAs-based semiconductor layers and this also makes electrons hard to accumulate in the insulating film 22. In the HEMT using the GaAs-based semiconductors, as described above, electrons are unlikely to accumulate in the insulating film 22 and, therefore, it is difficult for electrons to migrate near the interface between the insulating film 22 and the EB resist film 46, even if there are defects in the insulating film 22. Accordingly, the degradation of the shape of the opening pattern 50 formed in the EB resist film 46 is less likely to occur.
As described above, it is considered that the unwanted exposure of the EB resist film 46 due to the electron migration 64 near the interface between the EB resist film 46 and the insulating film 22 takes place in cases using wide-bandgap materials such as the nitride semiconductors. Therefore, Embodiment 1 shows the example of the case where the oxidation treatment is carried out for the surface of the insulating film 22 formed on the nitride semiconductor layer 20, but in cases where an insulating film is formed on a silicon carbide layer, it is also preferable to carry out the oxidation treatment for the surface of the insulating film.
Embodiment 1 shows the example of the case where the oxidation treatment is carried out for the surface of the insulating film 22, but a nitridation treatment is also effective in reduction of defects so as to replace H of Si—H bonds with N and bind N to dangling bonds of Si atoms. The nitridation treatment can be carried out, for example, by exposing the surface of the insulating film 22 to a nitrogen plasma. The nitridation treatment by exposing the surface of the insulating film 22 to the nitrogen plasma can be carried out under the below conditions.
Nitrogen concentration: 100%
Pressure: 0.03 Torr to 5 Torr
RF power: 50 W to 800 W
Temperature: 25° C. to 350° C.
Treatment time: 1 minute to 10 minutes
The pressure is preferably in the range of 0.5 Torr to 3 Torr and more preferably in the range of 1 Torr to 2 Torr. The RF power is preferably in the range of 200 W to 600 W and more preferably in the range of 300 W to 500 W. The temperature is preferably in the range of 25° C. to 200° C. and more preferably in the range of 25° C. to 100° C. The treatment time is preferably in the range of 2 minutes to 8 minutes and more preferably in the range of 3 minutes to 5 minutes.
The insulating film 22 preferably contains Si-rich silicon nitride, in terms of suppressing the current collapse. However, Si-rich silicon nitride has many dangling bonds of Si atoms or the like and thus the electron migration 64 is likely to occur. When the oxidation treatment is carried out for the surface of the insulating film 22 in such cases, the surface part of the insulating film 22 can be changed into the defect-reduced region 22a (surface side) and the other part can be kept as Si-rich region 22b (back side). This can suppress the electron migration 64 near the interface between the insulating film 22 and the EB resist film 46 and suppress the current collapse. The thickness of the defect-reduced region 22a is preferably in the range of not less than 2 nm, more preferably in the range of not less than 3 nm, and still more preferably in the range of not less than 4 nm. It is also considered that electron migration occurs in the Si-rich region 22b; however, even if electrons migrate in the region 22b, no problem will arise because the EB resist film 46 is hard to be exposed thereby. Additionally, the concentration of oxygen or nitrogen in region 22a rises through oxidation treatment or nitridation treatment, in comparison to region 22b. Incidentally, although a natural oxide film is formed on a surface of the insulating film 22 after the deposit of the insulating film 22, the thickness of the natural oxide film is not more than 0.3 μm and thus very thin even in comparison to the above oxide-treated region 22a.
The etching process is carried out for the insulating film 22 through the opening 50 formed in the EB resist film 46 by electron beam exposure and the gate electrode 28 is formed in the opening pattern formed by the etching process, as shown in
Embodiment 1 shows the example of the case of the HEMT having the nitride semiconductor layer 20 including the electron transit layer 14 and the electron supply layer 16 with the larger bandgap than the electron transit layer 14, but the present invention is not limited to this example. The present invention is applicable to the method of manufacturing the semiconductor device, the method including performing the electron beam exposure for the EB resist film formed on the insulating film, in the structure in which the insulating film is formed on the nitride semiconductor layer or on the silicon carbide layer. The nitride semiconductors refer to III-V nitride semiconductors and examples thereof include InN, InAlN, InGaN, InAlGaN, and so on, in addition to GaN and AlGaN. The insulating film may also be one comprising silicon oxide (SiO2) or silicon oxynitride (SiON), as well as silicon nitride (SiN). It is because the electron migration 64, as explained with
The above detailed the examples of the present invention but it should be noted that the present invention is not limited to such specific examples and can be modified or changed in many ways without departing from the scope of the present invention described in the scope of claims.
Claims
1-14. (canceled)
15. The semiconductor device according to claim 21, wherein the thickness of the upper region of the insulating film is equal to or larger than 2 nm.
16. (canceled)
17. The semiconductor device according to claim 21, wherein the width of the opening in the insulating film for the gate electrode is 0.2 μm or less.
18. The semiconductor device according to claim 21, wherein the thickness of the insulating film is equal to or smaller than 20 nm.
19. The semiconductor device according to claim 21, wherein the semiconductor layer is composed of gallium nitride, aluminum gallium nitride, indium aluminum nitride, indium aluminum gallium nitride, or aluminum nitride.
20. (canceled)
21. A semiconductor device comprising:
- a semiconductor layer;
- an insulating film of silicon nitride or silicon oxynitride on the semiconductor layer, the insulating film having a concentration of oxygen or nitrogen in an upper region thereof that is greater than that in a lower region thereof, and having an Si content that is uniform in a thickness direction thereof;
- source and drain electrodes formed in openings of the insulating film and in contact with the semiconductor layer, and
- a gate electrode formed on the semiconductor layer in an opening in the insulating film between the source electrode and the drain electrode.
22. A semiconductor device comprising:
- a semiconductor layer;
- an insulating film of silicon nitride or silicon oxynitride on the semiconductor layer, the insulating film having an Si content that is uniform in a thickness direction thereof, and having an upper region and a lower region, the upper region being formed by exposing the surface of the insulating film to ozone, an oxygen plasma or a nitrogen plasma;
- source and drain electrodes formed in openings of the insulating film and in contact with the semiconductor layer, and
- a gate electrode formed on the semiconductor layer in an opening in the insulating film located between the source electrode and the drain electrode.
23. The semiconductor device according to claim 22, wherein the thickness of the upper region of the insulating film is equal to or larger than 2 nm.
24. The semiconductor device according to claim 22, wherein a concentration of oxygen or nitrogen in the upper region is greater than that of the lower region and a thickness of the upper region is equal to or greater than 2 nm.
25. The semiconductor device according to claim 22, wherein the width of the opening in the insulating film for the gate electrode is 0.2 μm or less.
26. The semiconductor device according to claim 22, wherein the thickness of the insulating film is equal to or smaller than 20 nm.
27. The semiconductor device according to claim 22, wherein the semiconductor layer is composed of gallium nitride, aluminum gallium nitride, indium aluminum nitride, indium aluminum gallium nitride, or aluminum nitride.
Type: Application
Filed: Feb 8, 2016
Publication Date: Jun 2, 2016
Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC. (Yokohama-shi)
Inventor: Tsutomu KOMATANI (Yokohama-shi)
Application Number: 15/018,675