ELECTRONIC DEVICE AND METHODS TO CUSTOMIZE ELECTRONIC DEVICE ELECTROMAGNETIC EMISSIONS
A semiconductor device comprises a semiconductor substrate, one or more circuits disposed on the semiconductor substrate, and a modification of any one of hardware, software or firmware of the electronic device that generates emission of electromagnetic energy from the semiconductor device with desired characteristic(s), without changing a designed interface functionality of the semiconductor device. Method are also provided for modifying the semiconductor device and identifying modified semiconductor device.
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The present application is related to and claims priority from provisional U.S. patent application No. 62/387/820, titled “Harnessed-unintended Emissions Generation, Detection, and Utilization” and filed Jan. 6, 2016 by inventors Walter John Keller, Alexander William Keller, Andrew Richard Portune and Todd Eric Chornenky, the entire contents of which are hereby incorporated by reference thereto.
This document incorporates by reference the entire contents of disclosures and/or teachings of the following documents: U.S. Pat. No. 7,515,094 entitled “Advanced electromagnetic location of electronic equipment”; U.S. Pat. No. 8,063,813 entitled “Active improvised explosive device (IED) electronic signature detection”; U.S. Pat. No. 8,537,050 entitled “Identification and analysis of source emissions through harmonic phase comparison”; U.S. Pat. No. 8,643,539 entitled “Advance manufacturing monitoring and diagnostic tool”; U.S. Pat. No. 8,825,823 entitled “System and method for physically detecting, identifying, diagnosing and geolocating electronic devices connectable to a network”; U.S. Pat. No. 9,205,270 entitled “METHOD AND APPARATUS FOR THE DIAGNOSIS AND PROGNOSIS OF ACTIVE IMPLANTS IN OR ATTACHED TO BIOLOGICAL HOSTS OR SYSTEMS”; U.S. Pat. No. 9,059,189 entitled “INTEGRATED CIRCUIT WITH ELECTROMAGNETIC ENERGY ANOMALY DETECTION AND PROCESSING”; US Pub. 2012-0226463 entitled “SYSTEM AND METHOD FOR PHYSICALLY DETECTING COUNTERFEIT ELECTRONICS”; US Pub. 2013-0229310 entitled “SYSTEM AND METHOD FOR GEO-LOCATING AND DETECTING SOURCE OF ELECTROMAGNETIC EMISSIONS”; US Pub. 2013-0328710, entitled “Method and Apparatus for Detection and Identification of Counterfeit and Substandard Electronics”; U.S. Pat. No. 9,285,463 entitled “Method and Apparatus for battle damage assessment of electric or electronic devices”); US Pub. 2015-0137830 A1 entitled “Method and Apparatus for Detection and Identification of Counterfeit and Substandard Electronics”, US Pub. 2014-0218229 Al entitled “Advance Manufacturing Monitoring and Diagnostic Tool”; PCT/US2015/014765 entitled “METHOD AND APPARATUS FOR DETECTION AND IDENTIFICATION OF COUNTERFEIT AND SUBSTANDARD ELECTRONICS” and US Pub. 2015-0009073 A1 entitled “System and Method for Physically Detecting, Identifying, Diagnosing and Geolocating Electronic Devices Connectable to a network”.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH AND DEVELOPMENTN/A
REFERENCE TO SEQUENCE LISTING, A TABLE, OR A COMPUTER PROGRAMLISTING COMPACT DISC APPENDIX
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BACKGROUND1. Technical Field
The subject matter relates to electronic devices. It further relates to generation and processing of emissions from electronic device.
2. Description of Related Art
The following background information may present examples of specific aspects of the prior art (e.g., without limitation, approaches, facts, or common wisdom) that, while expected to be helpful to further educate the reader as to additional aspects of the prior art, is not to be construed as limiting the present invention, or any embodiments thereof, to anything stated or implied therein or inferred thereupon.
Conventionally employed solutions to wirelessly transmit a signal or a state of an electronic device can employ complex circuits configured to communicate with the electronic device from which the state or information is stored. Such radio frequency (RF), audio, infra-red (IR), light or other electromagnetic circuit control means can be typically employed and their intended frequency signal allocation, configuration and design is specified to conform to the electronics and commercial FCC frequency allocations recognized worldwide. These conventionally employed solutions can typically require the choice and pre-calculated circuitry tolerances, power levels, transmission range calculations and part specifications. These conventionally employed solutions may not employ an ad-hoc design, nor do they utilize existing hardware and/or software resource. The above described solutions typically employ a recognized standard modulation means. Further, the above described solutions typically require additional hardware expense. Further, the above described solutions typically require the addition of a substantial number of circuit elements dedicated to creating the transmit signal, typically more than 10. The conventional electronic devices cannot be easily and quickly modified and/or retrofitted into existing hardware or software. The conventional solutions cannot be employed outside legally allocated frequency bands without power limitations and may interfere with other sensitive electronic equipment.
The accompanying drawings are incorporated in and constitute part of the specification and illustrate various embodiments. In the drawings:
Prior to proceeding to the more detailed description of the present invention, it should be noted that, for the sake of clarity and understanding, identical components which have identical functions have been identified with identical reference numerals throughout the several views illustrated in the drawing figures.
The following detailed description is merely exemplary in nature and is not intended to limit the described examples or the application and uses of the described examples. As used herein, the words “example”, “exemplary” or “illustrative” means “serving as an example, instance, or illustration.” Any implementation described herein as “example”, “exemplary” or “illustrative” is not necessarily to be construed as preferred or advantageous over other implementations. All of the implementations described below are exemplary implementations provided to enable persons skilled in the art to make or use the embodiments of the disclosure and are not intended to limit the scope of the disclosure, which is defined by the claims.
The term “or” when used in this specification and the appended claims is not meant to be exclusive; rather the term is inclusive, meaning either or both.
The term “couple” or “coupled” when used in this specification and appended claims refers to an indirect or direct physical connection between the identified elements, components, or objects. Often the manner of the coupling will be related specifically to the manner in which the two coupled elements interact.
The term “directly coupled” or “coupled directly,” when used in this specification and appended claims, refers to a physical connection between identified elements, components, or objects, in which no other element, component, or object resides between those identified as being directly coupled.
The term “operatively coupled,” when used in this specification and appended claims, refers to a physical connection between identified elements, components, or objects, wherein operation of one of the identified elements, components, or objects, results in operation of another of the identified elements, components, or objects.
It is to be understood that the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a circuit” includes reference to one or more of such circuits.
It is to be understood that electromagnetic emissions may be, but is not limited to radio frequency (RF) emissions, microwave emissions, millimeter wave emissions and terahertz wave emissions. It is further to be understood that the term “communication” implies conveyance of information ranging from very simple yes/no existence or power on/off status to detailed data with complex multiple state and data content. Further, it is to be understood that the term ‘Outside World’ is any device or individual outside of the RF detection and decoding apparatus.
The terms and words used in the following description and claims are not limited to the bibliographical meanings, but, are merely used by the inventor to enable a clear and consistent understanding of the invention. Accordingly, it should be apparent to those skilled in the art that the following description of exemplary embodiments of the present invention are provided for illustration purpose only and not for the purpose of limiting the invention as defined by the appended claims and their equivalents.
Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding technical field, background, or the following detailed description. It is also to be understood that the specific devices and processes illustrated in the attached drawings, and described in the following specification, are simply examples of the inventive concepts defined in the appended claims. Hence, specific dimensions and other physical characteristics relating to the examples disclosed herein are not to be considered as limiting, unless the claims expressly state otherwise.
The particular embodiments of the present disclosure generally provide devices, apparatuses, and methods directed to generating and processing emissions of electromagnetic energy.
In particular embodiments, a semiconductor device comprises a semiconductor substrate, one or more circuits disposed on the semiconductor substrate, and particular embodiments employ a means for modifying, without changing a designed interface functionality of said semiconductor device, characteristic(s) of an electromagnetic energy emittable from the semiconductor device.
In some embodiments, a hardware, software or firmware can be modified to generate RF emission of varying information content ranging from a simple device On/Off to a complex RF emission(s), wherein complex emissions may be comprised and reliably decodable into a significant number of data bits, typically over 8 bits.
Now in reference to Figures,
The control unit 126 is shown as of a microprocessor type comprising one or more processors 127 and non-transitory tangible computer readable medium and/or tangible computational medium comprising algorithms and/or executable instructions, that cause the one or more processors 127 to provide elements of various embodiments. One example of such elements can be processing of data or information contained within RF emission signal from the electronic device 100. The algorithms and/or executable instructions are stored in a non-transitory storage medium 128. The control unit 126 may be provided as a custom manufactured controller, a programmable logic controller (PLC), a computer, a System On Chip (SoC), a Multi-Chip Module (MCM) or a portable device that includes, but is not limited to, a cell phone, a smart phone, a portable personal computer, a pad, a tablet or the like.
The control unit 126 may be configured as a simple bandpass filter tuned to the modified frequency of emission of interest.
Tangible computer readable medium means any physical object or computer element that can store and/or execute computer instructions. Examples of tangible computer readable medium include, but not limited to, a compact disc (CD), digital versatile disc (DVD), blu-ray disc (BD), usb floppy drive, floppy disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), optical fiber, etc. It should be noted that the tangible computer readable medium may even be paper or other suitable medium in which the instructions can be electronically captured, such as optical scanning. Where optical scanning occurs, the instructions may be compiled, interpreted, or otherwise processed in a suitable manner, if necessary, and then stored in computer memory. Alternatively, tangible computer readable medium may be a plugin or part of a software code that can be included in, or downloaded and installed into a computer application. As a plugin, it may be embeddable in any kind of computer document, such as a webpage, word document, pdf file, mp3 file, etc.
The circuit (logic) element 200, 202 is to be understood as any constituent part of a circuit that contributes directly to its operation and performs a definable function. Examples can include transistors, resistors, capacitors, inductors, and interconnections. The package 201 is to be understood as an enclosure for one or more semiconductor chips (dice), film elements, or other components, that allows electrical connection and provides mechanical and environmental protection.
The substrate 222 of the die 220 may include a silicon substrate, a silicon germanium (SiGe) substrate, a bulk semiconductor substrate, a strained semiconductor substrate, a compound semiconductor substrate, a silicon-on-insulator (SOI) substrate or other commonly or uncommonly used semiconductor substrates.
The die 220, 252 or the IC 100 can also comprise redistribution layer (RDL) not shown.
Furthermore, although the IC 100 is illustrated as having I/O pins 108, such I/O pins 108 can be replaced with solder bumps (not shown) or ball grid array (not shown) for I/O purposes to the IC 100. The pins 108, solder bumps (not shown) and ball grid array (not shown) provide means for attaching the IC 100 to a substrate, for example such as a printed circuit board.
The RF emissions 102 originating from the one or more circuit element 200, 202 inside the die 220, or RF emissions 104 originating from the I/O pin(s) 108, RF emissions 206 originating from the leads 210 or RF emissions 208 from the bonding wires 212, are emitted based on the logic configurations contained in the portion of the chip at location 200, or 202. These logic configurations at locations 200 or 202 may be a ring oscillator, or other circuit or a circuit element that may contain a repeating, semi-repeating, or iterative pattern of operation. The size of a possible ring oscillator may be controlled by state inputs to the RF generation circuit and the emitted RF signal may be modified and its modified state may be received, processed and communicated by the apparatus 180.
With further particular reference to
The receiver 118 is illustrated as comprising a tuner 123 coupled to the LNA 122 and the Analog-To-Digital Converter (ADC) 125 coupled to tuner 123. The output from the (ADC) 125 is received at the control unit 126.
In the embodiment of
Optional Digital filter 770 also receives RF signal in digital form from the ADC 125 for filtering for further use by the frequency domain module 772 that is programmed to execute Fourier Transforms on the filtered RF signal for optional further wavelet de-noisng at optional wavelet de-noising module 774. In place of the Fourier transform in 772, other transforms may be used such as one or more Goertzel algorithm or one or more Filters such as FIR filters tuned to specific frequencies discovered in step 508 may be used. The optional module 780 may extract, in a response to received processed RF signal from optional wavelet de-noising module 774, state-specific features of the RF signal, for example such as frequency distance between peak 604 and peak 600 or the relative dB height difference between peaks 604 and 600. The processing module 782 may comprise, in a response to received processed RF signal from time domain module 760, recognition of time domain RF features, for example such as a periodic increase and decrease of the received amplitude at a very specific filtered frequency. The processing module 782 may thus comprise a narrow FIR or IIR filter. The output results from modules 780 and 782 are then received at a module 784 for determination of relative criteria being matched. In an example, such relative criteria may comprise a degree of relative peak height difference between peaks 604 and 600 exceeding a predetermined threshold. In an example, such relative criteria may comprise a periodic amplitude change at a specific frequency being within the expected time period maximum and minimum. The results of processing in module 784 can be then transmitted to outside world 140, stored for further retrieval or displayed on a display (not shown) that can be integrated into the control unit 126 or coupled thereto. It must be noted that both time domain and frequency domain processing are not necessary, it could be one or the other. As an example, Elements 760, 762 and 782 may be absent.
Specifically, when the electronic device 800 is provided as a computer, different locations/components within the computer 800 can emit RF signals. The emitted RF signals may be of a variety of frequencies and a variety of locations as multiple components may be involved in the creation of the RF signal, the execution of RF code and the RF signal generation. In an example, random access memory (RAM) 802 can generate RF emissions 830 while being accessed, written to, read from, or refreshed. In an example, RAM memory bus 804 can generate RF emissions. In an example, disk 806 and/or interconnect or trace 808 can generate RF emissions 842. In an example, central processing unit (CPU) 810 can generate RF emissions 840. In an example, video controller 818 can generate RF emissions 836. In an example, interconnect or line 820 can generate RF emissions 838. In an example, input/output (I/O) module 816 can generate RF emissions 834. In an example, LED(s) 812 and/or interconnect or line 814 can generate RF emissions 832.
A single or multiple antennas 106 positioned near or around the separate components may be used to more specifically isolate the location of RF emission. Such antenna(s) 106 may be multiplexed to provide input into a single receiver 118 or be associated with separate receivers 118.
In an embodiment, a software subroutine or software method can be written to perform a memory write access of the same value a specific number of iterations, thus causing desired emissions from the RAM memory bus 804 or memory chip assembly emissions 830. The contents of the data iteratively written, the timing of the data written, and/or the memory location of the data written repetitively may thus modify the emissions in a desired manner so as to effectively modulate it, the RF emissions containing the desired data embedded in it.
In a further reference to
Thus, the state within the electronic device 100 may be determined through emissions analysis and may consist of hardware authenticity, firmware integrity, software load, data control flow, instruction flow, program state, security state, or the operations of unknown or unexpected code.
The RF code may also be programmed to change operations and hence measureable emissions by sensing known factors within the hardware, firmware or software it has been placed in such as issuing an operating system call to determine amount of free memory and performing a transmission for a longer or shorter period based on, proportional to, or a log function of memory available.
The RF code may also be programmed to change operations and hence measureable emissions by also performing monitoring of network data, serial data or parallel data patterns received by normal operations or by dedicated listening commands directed towards network data traffic. The RF code may similarly perform enquiry operations over a network and the RF may respond based on the response data or state of network interface. The absence or presence of RF data, or the specific state or form of data influencing the RF emission may be based on specific data pattern(s) received/acquired/listened to by the RF code and may then be received by the control unit 126 and processed to match and reflect the characteristics or data contained in an external device read and/or in communication directly or indirectly with the RF over a network. Further, the authenticity of the software, firmware or hardware may be determined by an external device transmitting or offering a unique data pattern to the RF hardware or software area, and a specific corresponding RF pattern response is received by the emission processor 126 and compared against a previously acquired or predetermined standard. As the specific RF characteristics may be designed to be highly complex and practically unpredictable due to highly complex logic and/or a large number of logic elements used in the creation of the RF emission, the resulting emission may be unique and potentially unpredictable and uniquely based on the code sent to the RF element inside the processor. Thus, because the resulting potentially unique and potentially unpredictable emission may be only known and measured previously by an entity who previously created the code and measured the previous emission result, the newly generated re-emission using the previous pattern would only be known and verifiable by the entity who created the pattern and measured the result previously. A plurality of such patterns and substantially unpredictable responses may also be accumulated, effectively used and only knowable to an entity previously in possession of the RF containing device. Different entities may typically have different patterns and responses to verify the operation of a RF containing device. The electronic device 100 may employ self-modifying code capability to further extend its possible number of states and corresponding responses. Such self-modifying code capability may be influenced by the patterns it discerns from surrounding data, hardware or network information, and/or may be accumulated over time creating an ever increasing and more complex challenge response set. Only an entity matching the challenge—response conditions on a similar system running in parallel will thus be able to predict a new or currently modified-updated response to a challenge. A result of the above configurations may be an unpredictable specific repeatable unique challenge and response set unknowable by another entity and knowable only to an entity who has previously created or is simultaneously creating the challenge and measured the response.
It is to be understood that a substantially identically configured system containing a substantially identical RF and executing in parallel may be used to generate exemplary RF emissions and form or determine an exemplary basis for emission characteristics of all substantially similarly configured devices. Thus, the specific RF generating device response need not be initially analyzed in the RF emission domain to later verify its emission comparison. An exemplary device's resulting RF emission may be previously, currently or later analyzed to determine, verify or predict the expected RF emission response of a different yet substantially identically configured unit. The RF emission may be recorded and later verified against an exemplary emission, and need not be immediately evaluated. The RF emissions may thus be recorded in the time domain for later FFT processing and analysis or comparison/verification in the time and/or frequency domain.
As it has been described above, in one or more embodiments, a hardware of an electronic device is modified, without changing a designed interface functionality of the electronic device, characteristic(s) of an electromagnetic energy emittable from the electronic device.
In an example of
In an embodiment, a firmware FPGA configuration can be employed and added to similarly transmit a simple device On/Off state through to complex RF emissions, wherein complex emissions may be comprised and reliably decodable into a significant number of data bits, typically over 8 bits. An RO or a similar circuit may be specifically allocated and configured for that purpose. The size of the RO may be chosen to convey the data content. As an example, a 10 stage RO may convey that it is active and the FPGA in which it resides is operational. A separate 20 stage RO may convey that it is active and in a different separate FPGA or a different FPGA core in the same FPGA in which it resides and is operational and powered. Delay elements such as non-inverting gates such as one or more ‘OR’ gates with both inputs tied together to the output of one of the inverters and its output tied to the next inverter may be strategically emplaced in one or more locations to further modify its emission characteristics. The RO may be extended in functionality to be modified based on other signals presented to it, thus emitting a different pattern dependent on the state of the signals modifying it. Other circuits such as a pseudo-random generator using shift registers and XOR gates or linear-feedback shift register may be alternatively easily used as an example.
For the sake of reader's convenience,
Thus, in an embodiment, routing circuit traces within a IC 100 may be used to create antenna structures such as interdigital elements in a distributed element filter to create or enhance the emission energy level and/or frequency characteristics or phase noise of specific emission waveforms.
In a further reference to
In a further reference to
In an embodiment, routing circuit interconnects to pins that are then specifically to be pulled up or pulled down can be used to create new signature features influenced by the increased electrical path length and to increase the amplitude of emissions in general. The added electrical length may thus be sufficient to create additional peaks at multiple frequencies which are of sufficient strength to rise above the receiver's noise floor.
In an embodiment, a group of circuit interconnects and a group of pins may be newly combined by logical functions, for example such as And or Or, and the resulting output be newly used to drive a single pin. Alternatively, they may separately be connected to corresponding separate unused I/O pins. Alternatively, one or more may separately be connected to multiple corresponding separate unused I/O pins.
In an embodiment, narrowing or broadening of circuit interconnects will affect the frequency width of emission peak structures, which naturally occurs due to electromigration. This same modification of emission signature elements can be achieved by purposefully modifying the interconnect traces with a broadened or narrowed interconnect between components, Combinatorial Logic Blocks, gates, or other devices on the IC 100.
In an embodiment, modifying patterns of narrower and/or broader sections within one or more interconnects with varying widths will create a unique emission pattern due to rapid changes in interconnects impedance as a signal travels down its length.
In an embodiment, modifying the doping of individual gates or patterns of gates within the IC 100 may be used to affect their timing and thus modify the frequency and amplitude envelope of emitted non-linear mixing products.
In an embodiment, narrow trace elements may be placed along the length of circuit interconnects, much like whiskers, where the physical spacing of the trace elements and their width will cause emissions with controllable waveforms.
In an embodiment, semiconductor device packaging may be modified to alter the frequency or amplitude of existing emissions or introduce new emission signature elements through the placing of a conductive layers on the inner top surface or bottom surface of the packaging.
In an embodiment, the conductive layer can be patterned to further modify emission signatures such as a varied layer thickness, added voids or cutouts in the layer or differing edge geometries and shapes of the layer.
In an embodiment, multiple such layers may be overlapped and placed in an offset pattern to further modify emissions.
In an embodiment, one or more layers may further be connected to one or more unused I/O pins which could be either tied up or down, and/or to unused I/O pins connected to circuit interconnects or to gates to modify emissions. In an embodiment, different technology nodes can be utilized to introduce features that emit energy with distinct characteristic(s) that can be detected and differentiated by an electromagnetic emission sensor, for an example such as the apparatus 180. The technology node (also process node, process technology or simply node) is traditionally defined as the smallest half-pitch of contacted metal 1 lines allowed in the fabrication process. It is a common metric used to describe and differentiate the technologies used in fabricating integrated circuits. Different nodes often imply different circuit generations and architectures. Generally, the smaller the technology node means the smaller the feature size, producing smaller transistors which are both faster and use less power. Most recently, due to various marketing and discrepancies among foundries, the number itself has lost the exact meaning it once held. Recent technology nodes such as 45 nm, 32 nm, 22 nm, 16 nm, 14 nm, and 10 nm refer purely to a specific generation of chips made in a particular technology. Circuit elements of different sizes may not change designed functionality and/or designed interfaces of an electronic device but will change characteristics of the emitted electromagnetic energy. In an embodiment, the electronic device(s) or the method(s) utilize different technology node processing techniques to introduce specific internal die circuit characteristics that can be controlled to change non-functional or redundant parts of the circuit to provide a customized emission output that can be used for at least one of authentication, characterization, the embedding of information, intellectual property watermarking, hardware revisions, program states, or device lineage. Non-limiting examples of such processing techniques comprise a thinner gate dielectric (thinner oxide layer), different doping concentrations, different control(s) of impurities in type and concentration, different oxidation reaction for dielectric creation, different etching methods, different temperature and processing times for impurity diffusions, use of different dopants, use of ion implantation instead of diffusion.
In an embodiment, the electronic device(s) or the method(s) utilize means, features, techniques or steps that evolve over time such that the measurement of such features can be utilized to measure the time that the die, IC, PCB, PCB assembly, or a higher level electronic device has been in use. A non-limiting example comprises implementation of features that are narrow enough that the impedance changes over time the circuit is in use. In one non-example, a trace carrying a specified current can be narrower than conventionally used so that it degrades faster. In another non-limiting example, a radioactive active element can be integrated into at least a portion of the die or dopant. This specifically designed feature is built into the device so that the emission caused by electrons flowing through said feature changes in a known way as an aggregated amount of current flows through it over a given amount of time. Likewise, the feature can be designed that breaks down or degrades incrementally as voltage is intermittently applied over time.
In an embodiment, an electronic device can comprise one or more sets or regions of one or more radioactive elements may be integrated into all of, a portion of, a set of gates of, multiple sections of, a section of, or a gate of the substrate, die, feature, dopant, interconnect, dielectric insulator or MEMS element such that its properties change at a specifiable and highly controlled decay rate as the element changes to another element.
In an embodiment, an electronic device can comprise a dielectric insulator constructed to gradually become more insulating or less insulating, as the resistance of an interconnect, or the gain of a gate element. This then will cause needed emission changes over the desired time period. In an embodiment, an electronic device can comprise multiple elements and/or isotopes with differing decay rates to craft the decay curve response and corresponding emission changes.
In an embodiment, an electronic device or method can comprise ion implantation using specific radioactive or non-radioactive isotope concentrations to accurately and selectively achieve the specifically desired radioactive or nonradioactive element and isotope concentration levels and associated electrical and emissions outcomes over device lifetime.
In an embodiment, electronic device(s) or the method(s) comprise feature(s), technique(s) or step(s) that change or fail catastrophically based on the use characteristics of the electronic device. Such failure of the microstructure(s) does not necessarily cause failure of the electronic device, but provides an indication that an event, for examples such as an Electrostatic Discharge (ESD), a radiation dose, a temperature exposure out of specification, a pressure, a humidity, or a chemical exposure has occurred.
In an embodiment, electronic device(s) can comprise a fuse (not shown) that can be coupled to lead 210 and that can be configured to be susceptible to the environmental effect(s), such that a previously radiating designed-in feature was turned off or a previously non-radiating designed-in feature was turned on via the fuse.
In an embodiment, electronic device(s) comprise a fuse (not shown) that is configured to convey, via designed-in radiating features, a wide range of characteristics of the electronic device that are at least one of a permanent, an intermittent, a gradual, an event-driven, a Boolean (on or off) or a temporary.
In an embodiment, the electronic device comprises one or more Micro ElectroMechanical System (MEMS) sensors that are at least one of integrated with at least one of a die or IC, wherein said MEMS indications can be translated into features that result in electromagnetic emissions with distinct characteristics such that these emissions can be detected by an external sensor.
In an embodiment, MEMS sensors disposed external to the die or IC wherein the MEMS indications or electronic signals from MEMS and conveyed thru unused input pins to emission circuitry provide a higher level of measurement acuity that can be characteristically conveyed to a sensor or an apparatus that is measuring the electromagnetic emissions of the electronic device in a non-contact manner.
In an embodiment, a semiconductor device comprises a semiconductor substrate; one or more circuits disposed on the semiconductor substrate; and a means for modifying, without changing a designed interface functionality of the semiconductor device, characteristic(s) of an electromagnetic energy emittable from the semiconductor device.
A feature of this embodiment is that the means comprises one or more trace elements within the one or more circuits, each of the one or more trace elements with one end thereof being directly coupled to interconnect between two circuit elements within the one or more circuits and with an opposite end thereof being terminated without coupling to any one of trace(s) between circuit elements within the one or more circuits.
A feature of this embodiment is that the means comprises trace elements spaced at a predetermined distance from each other along a length of at least one circuit interconnect, each of the trace elements with one end thereof being directly coupled to the at least one interconnect and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between circuit elements within the one or more circuits.
A feature of this embodiment is that the means comprises at least one interconnect between at least a pair of circuit elements in the semiconductor device, the at least one interconnect with one or more regions of a smaller or larger width, the one or more regions affecting width of peak structure(s) of emitted electromagnetic energy.
A feature of this embodiment is that the means comprises one or more interconnect with a varying width, the varying width modifying impedance of the one or more interconnect.
A feature of this embodiment is that the means comprises a modification or doping of gate(s) and/or pattern(s) of gates within the semiconductor device resulting in a timing change of the gate(s) and/or the pattern(s) of gates, the timing change modifying frequency and amplitude envelope of non-linear mixing products.
A feature of this embodiment is that the means comprises at least one trace element coupling at least one circuit element in the circuit with an unused I/O pin in the semiconductor device.
A feature of this embodiment is that the means comprises at least one interconnect between at least two circuit elements in the semiconductor device, with one or more regions of a smaller or larger width, the one or more regions affecting width of peak structure(s) of emitted electromagnetic energy; and one or more trace elements within the one or more circuits, each of the one or more trace elements with one end thereof being directly coupled to the one or more regions of a smaller or larger width and with an opposite end thereof being terminated without coupling to any one of trace(s) between circuit elements within the one or more circuits.
A feature of this embodiment is that the means comprises one or more trace elements within the one or more circuits, each of the one or more trace elements with one end thereof being directly coupled to an interconnect between two circuit elements within the one or more circuits and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between circuit elements within the one or more circuits; one or more region in one or more interconnects between circuit elements, the one or more region with a different width than a remaining portion of the one or more interconnect; and at least one trace element coupling at least one circuit element in the circuit with an unused I/O pin in the semiconductor device.
A feature of this embodiment is that the means comprises a doping region in one or more layers of the semiconductor device, the doping region configured to change the characteristic(s) of the electromagnetic energy emittable from the semiconductor device.
A feature of this embodiment is that the doping region is on a layer carrying the one or more circuits thereon.
A feature of this embodiment is that the means comprises a notch in a conductive layer in the semiconductor device, the notch configured to change the characteristic(s) of the electromagnetic energy emittable from the semiconductor device.
A feature of this embodiment is that the means comprises a change in conductor composition, changing the electron velocity within the conductor and modifying the circuit timing.
A feature of this embodiment is that the means comprises an interconnect between a conductive layer and a layer carrying the one or more circuits, the interconnect configured to change the characteristic(s) of the electromagnetic energy emittable from the semiconductor device.
A feature of this embodiment is that the means comprises a conductive layer positioned above or below a layer carrying the one or more circuits thereon, the conductive layer having a smaller size than a size of the layer carrying the one or more circuits thereon.
A feature of this embodiment is that the means comprises a conductive layer positioned above a layer carrying the one or more circuits thereon, the conductive layer comprising a notch; a conductive layer positioned below the layer carrying the one or more circuits thereon, the conductive layer having a smaller size than a size of the layer carrying the one or more circuits thereon; and an interconnect between the layer carrying the one or more circuits thereon and the conductive layer positioned below the layer carrying the one or more circuits thereon.
A feature of this embodiment is that the means comprises replacement of one circuit logic element with another circuit logic element changing an intermediate logic function(s) without changing end logic function(s).
In an embodiment, a method of authenticating an electronic device comprises the steps of modifying any one of a software, hardware or firmware of the electronic device to generate emissions of electromagnetic energy with one or more preselected characteristics; connecting the electronic device to at least a supply of operating voltage; receiving, with an antenna coupled to a receiver, the emissions of the electromagnetic energy; and determining, with a control unit, in a response to received emissions of the electromagnetic energy a presence of the one or more preselected characteristics.
In an embodiment, a method of marking a semiconductor device comprises the steps of modifying, without changing a designed interface functionality of the semiconductor device, a structure of the semiconductor device to emit preselected characteristic(s) of an electromagnetic energy; operating the semiconductor device to emit the electromagnetic energy; and confirming, with a control unit, a presence of the preselected characteristic(s) in a response to a receipt of emitted electromagnetic energy.
In an embodiment, a method of authenticating an electronic device, comprising a processor that executes a program, comprises the steps of acquiring a source code in the program; modifying one or more portions of the source code; compiling a new program with the modified source code; executing the new program; emitting electromagnetic energy from the electronic device during execution of the program, the electromagnetic energy with characteristic(s) associated with the one or more modified portions of the source code; and authenticating the electronic device in a response to a receipt of the emitted electromagnetic energy with the characteristic(s) associated with the one or more modified portions of the source code.
In an embodiment, a method of authenticating an electronic device, comprising a processor that executes a program, comprises the steps of acquiring a source code in the program; modifying one or more portions of the source code; and compiling a new program with the modified source code;
In an embodiment, a method of authenticating an electronic device, comprising a processor that executes a program, comprises the steps of acquiring a source code in the program; modifying one or more portions of the source code; compiling a new program with the modified source code; executing the new program; emitting electromagnetic energy from the electronic device during execution of the program, the electromagnetic energy with characteristic(s) associated with the one or more modified portions of the source code; and authenticating the electronic device in a response to a receipt of the emitted electromagnetic energy with the characteristic(s) associated with the one or more modified portions of the source code.
In an embodiment, a method of authenticating a semiconductor device comprises the steps of acquiring a design of the semiconductor device; modifying one or more portions of the semiconductor device; manufacturing a new die containing the one or more modified portions; connecting power and clock signals to the semiconductor device; emitting electromagnetic energy from the semiconductor in a response to the power and clock signals, the electromagnetic energy with characteristic(s) associated with the one or more modified portions of the semiconductor device; and authenticating the electronic device in a response to a receipt of the emitted electromagnetic energy with the characteristic(s) associated with the one or more modified portions of the semiconductor device.
In an embodiment, a method of authenticating a semiconductor device comprises the steps of acquiring a design of the semiconductor device; modifying one or more portions of the semiconductor device; manufacturing a new die containing the one or more modified portions; and packaging the new die into an electronic device.
In an embodiment, a non-transitory computer readable recording medium has recorded thereon a program for executing any of the above methods.
In an embodiment, a system for authenticating an electronic device comprises a means for modifying, without changing a designed interface functionality of the electronic device, characteristic(s) of an electromagnetic energy emittable from the electronic device; an antenna configured to acquire the electromagnetic energy signal emitted from the electronic device; a receiver coupled to the antenna and configured to convert the acquired electromagnetic energy signal into a digital form; and a control unit coupled to the receiver, the control unit configured to process the converted electromagnetic energy signal and identify the characteristic(s).
In an embodiment, an apparatus for authenticating an electronic device comprises an antenna configured to acquire the electromagnetic energy signal emitted from the electronic device; a receiver coupled to the antenna and configured to convert the acquired electromagnetic energy signal into a digital form; and a control unit coupled to the receiver, the control unit configured to process the converted electromagnetic energy signal and identify characteristic(s) of the electromagnetic energy due to a modification of the electronic device in a manner that does not change a designed interface functionality of the electronic device.
A feature of this embodiment is that the control unit comprises one or more processors; and a non-transitory computer readable medium comprising executable instructions that, when executed by the one or more processors, cause the one or more processors to identify the characteristic(s).
In an embodiment, a printed circuit board (PCB) assembly comprises a PCB; one or more electronic devices mounted on the PCB; interconnects between the one or more electronic device; and a means for modifying, without changing a designed interface functionality of the PCB assembly, characteristic(s) of an electromagnetic energy emittable from the PCB assembly.
A feature of this embodiment is that the means comprises one or more trace elements within the one or more electronic device, each of the one or more trace elements with one end thereof being directly coupled to an interconnect between two circuit elements within the one or more electronic device and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between circuit elements within the one or more electronic device.
A feature of this embodiment is that the means comprises trace elements spaced at a predetermined distance from each other along a length of the interconnect(s), each of the trace elements with one end thereof being directly coupled to an interconnect between two electronic devices and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between the one or more electronic devices.
A feature of this embodiment is that the means comprises one or more of from the interconnects with one or more regions of a smaller or larger width, the one or more regions affecting width of peak structure(s) of emitted electromagnetic energy.
A feature of this embodiment is that the means comprises one or more interconnects with a varying width, the varying width modifying impedance of the one or more trace.
A feature of this embodiment is that the means comprises a modification or doping of gate(s) and/or pattern(s) of gates within the one or more electronic devices resulting in a timing change of the gate(s) and/or the pattern(s) of gates, the timing change modifying frequency and amplitude envelope of non-linear mixing products.
A feature of this embodiment is that the means comprises at least one trace element coupling at least one electronic device in the circuit with an unused I/O connection on the PCB.
A feature of this embodiment is that the means comprises one or more interconnects with one or more regions of a smaller or larger width, the one or more regions affecting width of peak structure(s) of emitted electromagnetic energy; and one or more trace elements on the PCB, each of the one or more trace elements with one end thereof being directly coupled to the one or more regions of a smaller or larger width and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between the one or more electronic devices.
A feature of this embodiment is that the means comprises one or more trace elements within on the PCB, each of the one or more trace elements with one end thereof being directly coupled to an interconnect between two electronic devices and with an opposite end thereof being terminated without coupling to any one of interconnect between the electronic devices; one or more region in one or more interconnect between a pair of electronic devices, the one or more region with a different width than a remaining portion of the one or more interconnect; and at least one trace element coupling at least one electronic device with an unused I/O connection on the PCB.
In an embodiment, an electronic device comprises one or more printed circuit board (PCB) assemblies, each comprising a PCB, electronic devices mounted on the PCB, and interconnects between the one or more electronic device; and a means for modifying, without changing a designed interface functionality of the PCB assembly, characteristic(s) of an electromagnetic energy emittable from the electronic device.
In an embodiment, an integrated circuit (IC) device comprises a casing; one or more input/output connections on or extending from an interior surface of the casing; one or more dies within the casing; leads between the one or more die and the one or more input/output connections; boding wires, each coupling each lead to the one or more die; and a means for modifying, without changing a designed interface functionality of the IC, characteristic(s) of an electromagnetic energy emittable from the IC.
A feature of this embodiment is that the means comprises one or more trace elements, each of the one or more trace elements with one end thereof being directly coupled to a lead and with an opposite end thereof being terminated without coupling to any one of leads.
A feature of this embodiment is that the means comprises one or more trace elements, each of the one or more trace elements with one end thereof being directly coupled to a bonding wire and with an opposite end thereof being terminated without coupling to any one of bonding wires.
A feature of this embodiment is that the means comprises trace elements spaced at a predetermined distance from each other along a length of at least one lead, each of the trace elements with one end thereof being directly coupled to the at least one lead and with an opposite end thereof being terminated without coupling to any one of leads.
A feature of this embodiment is that the means comprises at least one lead with one or more regions of a smaller or larger width, the one or more regions affecting width of peak structure(s) of emitted electromagnetic energy.
A feature of this embodiment is that the means comprises one or more leads with a varying width, the varying width modifying impedance of the one or more interconnect.
A feature of this embodiment is that the means comprises one or more bonding wires with a varying width, the varying width modifying impedance of the one or more interconnect.
A feature of this embodiment is that the means comprises a modification or doping of gate(s) and/or pattern(s) of gates within the one or more dies resulting in a timing change of the gate(s) and/or the pattern(s) of gates, the timing change modifying frequency and amplitude envelope of non-linear mixing products.
In an embodiment, a method is provided for identifying a software change or a software tampering within a central processing unit (CPU), the method comprises the steps of placing a software RF emission element within a software execution loop; periodicity measuring the software RF emission element to determine an execution time of the software execution loop between RF emission periodic signals; measuring a difference between the determined execution time and a threshold; and determining the software change or tempering based on the measured difference.
The above described exemplary embodiments take advantage of the fact that low-level emissions of a high degree of complexity and potential encoded data content can be generated using no additional cost and little added CPU time, silicon area, or FPGA gates.
In an embodiment, a chip comprises individual circuits whose conductive or insulative circuit features are modified by one or more radioactive isotopes in one or more locations to modify the function of the chip or one or more of its circuits so that its operation is irrevocably time controlled to enable, enhance, degrade or disable circuit capabilities or functionality before, after or during a pre-specified time period.
In an example, a gate dielectric insulator may be doped via ion beam deposition and ion beam focus and selection for deposition in a very specific region or regions with a radioactive isotope of sufficient concentration, half-life and particle charge characteristic (electron, positron, electron capture, etc.) to change the gate from a non-functioning gate for approximately 6 months to a functioning gate approximately 6 months after manufacture. Thus, the chip or chip feature may not be functional until a specified period of time has elapsed. Further, a different element or isotope may be doped into the gate dielectric insulator to degrade or change elements far more slowly, for example such that after approximately 5 years the gate may again become non-functional. The function, chip or feature relying on that gate is thus available for a specific duration, a specific start time and specific stop time. This creates a self-disabling feature and capability in electronic devices.
The above can separately be placed on various gates, regions, conductors, MEMS sensors, insulators to selectively enable and/or disable them at pre-specified times. Elements and isotopes selected may create characteristics such as but not limited to increased insulating, increased conducting, or more chemically degrading characteristics into any or all constituent components of a die.
In an example, a light sensor may be pre-deposited or pre-doped with a isotope creating electric noise via beta decay that severely limits its vision capability during the first half-life of 2 months of the isotope, becoming gradually usable and considered fully usable after 6 months.
In an example, the needed doping concentration may only gradually ‘appear’ as the deposited isotope decays into the useful needed doping element needed for circuit operation. Alternatively, the needed doping concentration may be configured to gradually radioactively decay rendering the gate gradually useless. The doping in the circuitry and the circuitry design may be configured to thus automatically switch over to a different functioning or similar functioning circuit with different, greater or fewer features at and/or during a pre-specified time period. Proper selection of elements, isotopes, half-lives within circuits, gates and chip design allow for unlimited capability sequencing or options available.
The above examples also provide a means for modifying conductive or insulative circuit features of one or more circuits of the chip by one or more radioactive isotopes in one or more locations to modify the function of the chip or one or more of its circuits so that its operation is irrevocably time controlled to enable, enhance, degrade or disable circuit capabilities or functionality before, after or during a pre-specified time period.
The above examples also define method(s) for modifying conductive or insulative circuit features of one or more circuits of the chip by one or more radioactive isotopes in one or more locations to modify the function of the chip or one or more of its circuits so that its operation is irrevocably time controlled to enable, enhance, degrade or disable circuit capabilities or functionality before, after or during a pre-specified time period.
The above described exemplary embodiments promulgate speed of the semiconductor device modification, by essentially minimizing additional hardware design. Further, existing hardware specifications need not be scrutinized and adhered to, in adding the RF transmit embodiments disclosed herein. In typical common known hardware designs where transmitter functionality is added or retrofitted, additional hardware can be specifically chosen based on electrical, mechanical, cost, and physical specifications and constraints. The design time required conforming to those constraints and interface to the additional hardware is significantly higher than the method and apparatus described in the instant invention.
The above described exemplary embodiments quickly allow the construction of a means to transmit states or data from deep within a program, semiconductor logic device, or FPGA, without the typical need for logic conveyance of the data to peripheral output signal physical hardware lines and the output of the signals on an established medium, in an established format, at an established frequency, or other typically necessary details. The state information or data can be transmitted with a minimum of effort, from anywhere within a program or hardware device, and indicative of any state, memory or register variable value, hardware module activity, software module activity, software module being called, hardware module being enabled or the like. As such, the instant invention may also be a useful tool for debugging software, firmware or hardware. As an example, RF emission elements can be deliberately placed to be activated or deactivated depending on the initialization state, sequence, or code section being executed. As a more specific example, deliberately placed RF emission elements may be easily and/or quickly placed in various device drivers or bootstrap code elements, indicating sequence of operations or milestones reached in the process, thus being activated substantially in sequence as a system bootup or startup progresses. Should the time gap(s) between one expected RF emission element and a second or series of RF emission startup elements be prolonged, not be in the expected order, or not occur at the expected timing separations, indications of a software problem, software change, hardware problem, or even software or hardware version may be received. In this manner, diagnostics may be embedded into software, firmware or hardware without requiring use, maintenance or allocation of additional system resources, and without necessarily requiring interface to external software or hardware elements for the communication of those states or state transitions such as a logging area in memory or on disk. Another advantage of this approach is the platform independence capability in some cases, as the same source code or VHDL code may be compiled on any system or from any FPGA. The specific new emission frequencies, shapes, profiles, envelopes and/or signatures generated may vary to a degree between systems (ex. Linux, Android, Apple IoS, or Windows) and/or between hardware platforms (Intel or AMD, Xilinx or Lattice), but the individually distinct and discernable patterns created would remain present, locatable and useful.
In an embodiment, any of the above described methods can be implemented in the form of software stored on a computer-readable non-transitory information storage medium such as an optical or magnetic disk, a non-volatile memory (e.g., Flash or ROM), RAM, and other forms of volatile memory. The information storage medium may be an internal part of the computer, a removable external element coupled to the computer, or unit that is remotely accessible via a wired or wireless network.
In an embodiment, any of the above described methods can be written (or take form) as a computer program and can be implemented in general-use digital computers that execute the programs using a computer readable storage and/or recording medium. In addition, the structure of data used in the method can be written on a computer readable recording medium by using several units. Examples of the computer readable storage and/or recording medium include magnetic storage media (e.g., ROM, RAM, USB, floppy disks, hard disks, etc.), optical recording media (e.g., CD-ROMs, or DVDs), PC interface (e.g., PCI, PCI-express, WiFi, etc.), etc. In other words, in the context of this document, a computer readable storage and/or recording medium may be any tangible medium that can contain, or store a program and/or data for use by or in connection with an instruction execution system, apparatus, or device.
Any combination of one or more computer readable storage medium(s) may be utilized. A computer readable storage medium may be embodied as, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or other like storage devices known to those of ordinary skill in the art, or any suitable combination of computer readable storage mediums described herein.
In an embodiment, the computer may comprise the receiver 118.
In an embodiment, any of the above described methods can be implemented by single or multiple algorithms.
Persons of ordinary skill in the art may appreciate that, in combination with the examples described in the embodiments herein, units and algorithm steps can be implemented by electronic hardware, computer software, or a combination thereof. In order to clearly describe the interchangeability between the hardware and the software, compositions and steps of every embodiment have been generally described according to functions in the foregoing description. Whether these functions are performed using hardware or software depends on particular applications and design constraints of the technical solutions. A person skilled in the art may use different methods to implement the described functions for each specific application. However, such implementation should not be considered as beyond the scope of the present invention. As an example, the same circuit modifications may be made in an ASIC, FPGA, or custom logic device.
Computer program code for carrying out operations for aspects of various embodiments may be written in any combination of one or more programming languages, including an object oriented programming language, such as Java, Smalltalk, C++, or the like, and conventional procedural programming languages, such as the “C” programming language or similar programming languages. In accordance with various implementations, the program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
The flowchart and/or block diagrams in the figures help to illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products of various embodiments. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
It will be understood that various blocks of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
Many of the elements described in the disclosed embodiments may be implemented as modules. A module is defined here as an isolatable element that performs a defined function and has a defined interface to other elements. The modules described in this disclosure may be implemented in hardware, software in combination with hardware, firmware, wetware (i.e hardware with a biological element) or a combination thereof, all of which are behaviorally equivalent. For example, modules may be implemented as a software routine written in a computer language configured to be executed by a hardware machine (such as C, C++, Fortran, Java, Basic, Matlab or the like) or a modeling/simulation program such as Simulink, Stateflow, GNU Octave, or Lab VIEWMathScript. Additionally, it may be possible to implement modules using physical hardware that incorporates discrete or programmable analog, digital and/or quantum hardware. Examples of programmable hardware comprise: computers, microcontrollers, microprocessors, application-specific integrated circuits (ASICs); field programmable gate arrays (FPGAs); and complex programmable logic devices (CPLDs). Computers, microcontrollers and microprocessors are programmed using languages such as assembly, C, C++ or the like. FPGAs, ASICs and CPLDs are often programmed using hardware description languages (HDL) such as VHSIC hardware description language (VHDL) or Verilog that configure connections between internal hardware modules with lesser functionality on a programmable device. Finally, it needs to be emphasized that the above mentioned technologies are often used in combination to achieve the result of a functional module.
The chosen exemplary embodiments of the claimed subject matter have been described and illustrated, to plan and/or cross section illustrations that are schematic illustrations of idealized embodiments, for practical purposes so as to enable any person skilled in the art to which it pertains to make and use the same. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. It is therefore intended that all matters in the foregoing description and shown in the accompanying drawings be interpreted as illustrative and not in a limiting sense. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present claims. It will be understood that variations, modifications, equivalents and substitutions for components of the specifically described exemplary embodiments of the invention may be made by those skilled in the art without departing from the spirit and scope of the invention as set forth in the appended claims.
When used herein, the terms “adapted” and “configured” mean that the element, component, or other subject matter is designed and/or intended to perform a given function. Thus, the use of the terms “adapted” and “configured” should not be construed to mean that a given element, component, or other subject matter is simply “capable of” performing a given function but that the element, component, and/or other subject matter is specifically selected, created, implemented, utilized, programmed, and/or designed for the purpose of performing the function. It is also within the scope of the present disclosure that elements, components, and/or other recited subject matter that is recited as being adapted to perform a particular function may additionally or alternatively be described as being configured to perform that function, and vice versa. Similarly, subject matter that is recited as being configured to perform a particular function may additionally or alternatively be described as being operative to perform that function.
It be understood that when an element is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that, although the terms “first,” “second,” “third” etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not limited by these terms. These terms are only used to distinguish one element, component, region, layer, or section from another element, component, region, layer or section. Thus, “a first element,” “component,” “region,” “layer,” or “section” discussed below could be termed a second element, component, region, layer, or section. without departing from the teachings herein.
Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper,” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation. of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Unless otherwise stated, specific embodiments provide electronic device(s) or component(s) with modified characteristic(s) of the emitted electromagnetic energy without modification(s) to designed functionally or interface of the electronic device(s) or component(s). Similarly, unless otherwise stated specific embodiments provide methods to modified characteristic(s) of the emitted electromagnetic energy from an electronic device or component(s)without modification(s) to designed functionally or interface of such electronic device(s) or component(s).
Although the subject matter has been described in a combination with RF emissions, the disclosed embodiments will apply to devices emitting microwave emissions, millimeter wave emissions and terahertz wave emissions.
It should be appreciated that reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Therefore, it is emphasized and should be appreciated that two or more references to “an embodiment” or “one embodiment” or “an alternative embodiment” in various portions of this specification are not necessarily all referring to the same embodiment or the same variation. Furthermore, the particular features, structures or characteristics may be combined as suitable in one or more embodiments of the invention.
Similarly, it should be appreciated that in the foregoing description of embodiments of the invention, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed subject matter requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the independent claims following the detailed description are hereby expressly incorporated into this detailed description.
Any element in a claim that does not explicitly state “means for” performing a specified function, or “step for” performing a specified function, is not to be interpreted as a “means” or “step” clause as specified in 35 U.S.C. §112, ¶6. In particular, any use of “step of” in the claims is not intended to invoke the provision of 35 U.S.C. §112, ¶6.
Anywhere the term “comprising” is used, embodiments and components “consisting essentially of” and “consisting of” are expressly disclosed and described herein.”
Furthermore, the Abstract is not intended to be limiting as to the scope of the claimed invention and is for the purpose of quickly determining the nature of the claimed invention.
Claims
1. A semiconductor device, comprising:
- a semiconductor substrate;
- one or more circuits disposed on said semiconductor substrate; and
- a means for modifying, without changing a designed interface functionality of said semiconductor device, characteristic(s) of an electromagnetic energy emittable from said semiconductor device.
2. The semiconductor device of claim 1, wherein said means comprises one or more trace elements within said one or more circuits, each of said one or more trace elements with one end thereof being directly coupled to interconnect between two circuit elements within said one or more circuits and with an opposite end thereof being terminated without coupling to any one of trace(s) between circuit elements within said one or more circuits.
3. The semiconductor device of claim 1, wherein said means comprises trace elements spaced at a predetermined distance from each other along a length of at least one circuit interconnect, each of said trace elements with one end thereof being directly coupled to said at least one interconnect and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between circuit elements within said one or more circuits.
4. The semiconductor device of claim 1, wherein said means comprises at least one interconnect between at least a pair of circuit elements in said semiconductor device, said at least one interconnect with one or more regions of a smaller or larger width, said one or more regions affecting width of peak structure(s) of emitted electromagnetic energy.
5. The semiconductor device of claim 1, wherein said means comprises one or more interconnect with a varying width, said varying width modifying impedance of said one or more interconnect.
6. The semiconductor device of claim 1, wherein said means comprises a modification or doping of gate(s) and/or pattern(s) of gates within said semiconductor device resulting in a timing change of said gate(s) and/or said pattern(s) of gates, said timing change modifying frequency and amplitude envelope of non-linear mixing products.
7. The semiconductor device of claim 1, wherein said means comprises at least one trace element coupling at least one circuit element in said circuit with an unused I/O pin in said semiconductor device.
8. The semiconductor device of claim 1, wherein said means comprises:
- at least one interconnect between at least two circuit elements in said semiconductor device, with one or more regions of a smaller or larger width, said one or more regions affecting width of peak structure(s) of emitted electromagnetic energy; and
- one or more trace elements within said one or more circuits, each of said one or more trace elements with one end thereof being directly coupled to said one or more regions of a smaller or larger width and with an opposite end thereof being terminated without coupling to any one of trace(s) between circuit elements within said one or more circuits.
9. The semiconductor device of claim 1, wherein said means comprises replacement of one circuit logic element with another circuit logic element changing an intermediate logic function(s) without changing end logic function(s).
10. An integrated circuit (IC) device, comprising:
- a casing;
- one or more input/output connections on or extending from an interior surface of said casing;
- one or more dies within said casing;
- leads between said one or more die and said one or more input/output connections;
- boding wires, each coupling each lead to said one or more die; and
- a means for modifying, without changing a designed interface functionality of said IC, characteristic(s) of an electromagnetic energy emittable from said IC.
11. The IC device of claim 10, wherein said means comprises one or more trace elements, each of said one or more trace elements with one end thereof being directly coupled to a lead and with an opposite end thereof being terminated without coupling to any one of leads.
12. The IC device of claim 10, wherein said means comprises one or more trace elements, each of said one or more trace elements with one end thereof being directly coupled to a bonding wire and with an opposite end thereof being terminated without coupling to any one of bonding wires.
13. The IC device of claim 10, wherein said means comprises trace elements spaced at a predetermined distance from each other along a length of at least one lead, each of said trace elements with one end thereof being directly coupled to said at least one lead and with an opposite end thereof being terminated without coupling to any one of leads.
14. The IC device of claim 10, wherein said means comprises at least one lead with one or more regions of a smaller or larger width, said one or more regions affecting width of peak structure(s) of emitted electromagnetic energy.
15. A printed circuit board (PCB)assembly, comprising:
- a PCB;
- one or more electronic devices mounted on said PCB;
- interconnects between said one or more electronic device; and
- a means for modifying, without changing a designed interface functionality of said PCB assembly, characteristic(s) of an electromagnetic energy emittable from said PCB assembly.
16. The PCB assembly of claim 15, wherein said means comprises one or more trace elements within said one or more electronic device, each of said one or more trace elements with one end thereof being directly coupled to an interconnect between two circuit elements within said one or more electronic device and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between circuit elements within said one or more electronic device.
17. The PCB assembly of claim 15, wherein said means comprises trace elements spaced at a predetermined distance from each other along a length of said interconnect(s), each of said trace elements with one end thereof being directly coupled to an interconnect between two electronic devices and with an opposite end thereof being terminated without coupling to any one of interconnect(s) between said one or more electronic devices.
18. The PCB assembly of claim 15, wherein said means comprises one or more of from said interconnects with one or more regions of a smaller or larger width, said one or more regions affecting width of peak structure(s) of emitted electromagnetic energy.
19. The PCB assembly of claim 15, wherein said means comprises one or more interconnects with a varying width, said varying width modifying impedance of said one or more trace.
20. The PCB assembly of claim 15, wherein said means comprises a modification or doping of gate(s) and/or pattern(s) of gates within said one or more electronic devices resulting in a timing change of said gate(s) and/or said pattern(s) of gates, said timing change modifying frequency and amplitude envelope of non-linear mixing products.
Type: Application
Filed: Jan 6, 2017
Publication Date: Aug 24, 2017
Applicant: NOKOMIS, INC. (Charleroi, PA)
Inventors: Walter John KELLER (Bridgeville, PA), Alexander William KELLER (Bridgeville, PA), Andrew Richard PORTUNE (Oakdale, PA), Todd Eric CHORNENKY (Carmichaels, PA)
Application Number: 15/400,565