RAID DECODING ARCHITECTURE WITH REDUCED BANDWIDTH
A RAID decoding system which performs a Built in Self-Test (BIST) includes: a RAID decoder, including: a storage, for storing a syndrome of a first Reed-Solomon (RS) codeword, a syndrome of a second RS codeword, and parity data of the first RS codeword and the second RS codeword; and an RS decoder which performs decoding on the first RS codeword and the second RS codeword according to the parity data to generate an updated syndrome of the first RS codeword and an updated syndrome of the second RS codeword. A MUX inputs the first and the second RS codeword to the RS decoder in a first iteration, and inputs the parity data to the RS decoder in following iterations for updating the syndromes of the first and the second RS codeword. The updated syndromes are used to perform error correction on the first RS codeword and the second RS codeword.
This application is a continuation application of U.S. patent application Ser. No. 15/073,665, which was filed on Mar. 18, 2016, the contents of which are included herein by reference.
BACKGROUND OF THE INVENTION 1. Field of the InventionThe present invention relates to error correcting code (ECC) technology, and more particularly, to a RAID ECC with a reduced bandwidth.
2. Description of the Prior ArtFlash memory is a high performance, low power, non-volatile storage often used in portable devices. A disadvantage of Flash memory is that the cells slowly deteriorate over time meaning the accuracy of a held charge will also decrease. At some point, errors associated with the held charge cannot be corrected, and the cell becomes unusable.
Error Correcting Code (ECC) technology can extend the lifetime of a cell by locating and correcting errors associated with the held charges. One example of an ECC code is low-density parity check (LDPC) decoding, which is a powerful form of ECC technology. Even LDPC codes, however, have a certain probability of failing at a particular Raw Error Bit rate. In cases where a valid codeword cannot be found via LDPC coding, secondary ECC solutions can be provided which detect/correct errors that cannot be remedied by LDPC alone. One example is an encoding RAID check.
RAID is a virtual architecture which combines multiple disk drive components into a single logical unit. By striping codes across multiple disks, mirroring codes in a single disk to generate codes in another disk, and including parity symbols, valid codewords can be retrieved. RAID level 6 uses Reed-Solomon (RS) codes, each code consisting of 2-byte symbols. Data is written to multiple drives with double distributed parity, i.e. two parity blocks are distributed across all member disks. If an LDPC decoder cannot recover a valid codeword, the RAID parity can be used as the secondary ECC.
Data is RAID encoded by being segmented into many chunks and having RAID parity (Reed-Solomon codes) added. The RAID data is then input to an LDPC encoder, and stored in a Flash memory, from where it can be output to an LDPC decoder. After LDPC decoding, if a codeword fails (i.e. LDPC ECC is insufficient to recover correct data), RAID decoding is performed by inputting the non-valid codeword into a RAID engine, and inputting the RAID parity data to generate a syndrome. After a certain number of iterations, the syndrome should satisfy the matrix equations, i.e. it should equal zero. At this point, the original data can be recovered via the updated syndrome.
The drawbacks to the above method are that the RAID engine needs to be able to store an entire codeword, and that parity data of 64 bits (corresponding to four RS symbols) must be inputted to the RAID decoder in each iteration, which occupies a large bandwidth.
SUMMARY OF THE INVENTIONIt is therefore an aim of the present invention to provide a Built in Self-Test (BIST) which can save on the bandwidth and storage space required for a RAID decoding engine.
The present invention therefore provides a RAID decoding system which performs a Built in Self-Test (BIST), the RAID decoding system comprising: a RAID decoder, comprising: a storage, for storing a syndrome of a first Reed-Solomon (RS) codeword, a syndrome of a second RS codeword, parity data of the first RS codeword and parity data of the second RS codeword; and an RS decoder which stores the first RS codeword and the second RS codeword, and performs decoding on the first RS codeword and the second RS codeword according to the parity data to generate an updated syndrome of the first RS codeword and an updated syndrome of the second RS codeword. The RAID decoding system further comprises a MUX, coupled between the storage and the RS decoder, for inputting the first RS codeword and the second RS codeword to the RS decoder in a first iteration, and for inputting the parity data of the first RS codeword and the parity data of the second codeword to the RS decoder in following iterations for respectively updating the syndrome of the first RS codeword and the syndrome of the second RS codeword. The updated syndrome of the first RS codeword and the updated syndrome of the second RS codeword are used to perform error correction on the first RS codeword and the second RS codeword. The updated syndromes of the first RS codeword and the updated syndrome of the second RS codeword are used to perform error correction on the first RS codeword and the second RS codeword when the updated syndrome of the first RS codeword and the updated syndrome of the second RS codeword both equal zero.
The RS decoder comprises: a first RS decoder for storing the first RS codeword and for performing decoding on the first RS codeword according to the parity data to generate an updated syndrome of the first RS codeword; and a second RS decoder for storing the second RS codeword and for performing decoding on the second RS codeword according to the parity data to generate an updated syndrome of the second RS codeword.
The RAID decoding system further comprises: an Error Insertion block for inserting errors into a first Reed-Solomon (RS) codeword and a second RS codeword; a Random Number Generator, for generating data to the Error Insertion block; a SEED pool, coupled between the Error Insertion block and the Random Number Generator, for storing values corresponding to the first RS codeword and the second RS codeword with errors inserted, and using those values to control the Random Number Generator to generate the first RS codeword with errors inserted and the second RS codeword with errors inserted when the updated syndrome of the first RS codeword and the updated syndrome of the second RS codeword both equal zero; and a Result Check block, coupled to the Random Number Generator and the RAID decoder, for receiving the first RS codeword with errors inserted and the second RS codeword with errors inserted and the error-corrected first RS codeword and the error-corrected second RS codeword, and determining correctness of the data.
In an embodiment of the present invention, the second RS codeword is a mirror of the first RS codeword so that parity data of the first RS codeword is equal to the parity data of the second RS codeword, and the storage only stores the parity data of one of the first RS codeword and the second RS codeword, and further stores one of the first RS codeword with errors and the second RS codeword with errors. The MUX inputs the parity data of the first RS codeword and the parity data of the second codeword to the first RS decoder and second RS decoder by mirroring the parity data stored in the storage.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
The invention provides two embodiments for providing a functional BIST which can perform RAID decoding with a decreased bandwidth as compared to the prior arts.
As detailed in the background, during RAID encoding, data is segmented into chunks and RAID parity is added using Reed-Solomon codes. This is illustrated in
A Built-In Self-Test (BIST) enables a system to calibrate its decoding engine by determining that error correction is performed accurately. In a standard BIST, errors are deliberately inserted into the data generated by the Random Number Generator. After decoding is performed, the resultant data can be examined to determine whether the error-free codeword can be recovered, as the exact location and value of the errors is known.
In a prior art BIST, codewords with errors are input and stored in a RAID decoder. Parity data is input to the RAID decoding engine from outside to generate and update syndromes of the codewords, which can then be used to correct the data. The RAID decoding engine therefore needs to store both the corrected codeword and the original codeword with errors. The aim of the embodiments of the present invention is to reduce the bandwidth and required storage of the BIST.
As only half the data is input to the RAID decoder 250, only half of the RS decoding engines 241-244 need to be used. In this embodiment, RS decoding engines 241 and 242 are illustrated as being used to decode the data. Further, as the storage 245 only needs to store syndromes corresponding to two codewords, the parity data needed to decode the codewords can be stored in the remaining space of the storage 245. It is noted that only half the parity data as compared to the prior art is required because no mirroring has occurred.
As illustrated in
As well as the above-described embodiment, the present invention provides a second exemplary embodiment which can reduce the bandwidth and simplify the decoding procedure even more.
A RAID decoding system 500 according to the second embodiment is illustrated in
The decoding process is illustrated in
In this embodiment, the RAID decoder 550 stores both the corrected codewords and the original codeword with errors. Therefore, all these values can be directly output to the Result Check module 260 for confirming that all errors have been located and corrected.
The above invention therefore provides two embodiments of functional BIST for a RAID decoder, wherein the bandwidth is reduced as compared to the prior art, and no external storage is required.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Claims
1. A RAID decoding system which performs a Built in Self-Test (BIST), the RAID decoding system comprising:
- a RAID decoder, comprising: a storage, for storing a syndrome of a first Reed-Solomon (RS) codeword, a syndrome of a second Reed-Solomon (RS) codeword, parity data of the first RS codeword and parity data of the second RS codeword; and an RS decoder which stores the first RS codeword and the second RS codeword, and performs decoding on the first RS codeword according to the parity data to generate an updated syndrome of the first RS codeword and performs decoding on the second RS codeword according to the parity data to generate an updated syndrome of the second RS codeword; and
- a MUX, coupled between the storage and the RS decoder, for inputting the first RS codeword and the second RS codeword to the RS decoder in a first iteration, and for inputting the parity data of the first RS codeword and the parity data of the second codeword to the RS decoder in following iterations for respectively updating the syndrome of the first RS codeword and the syndrome of the second RS codeword;
- wherein the updated syndrome of the first RS codeword and the updated syndrome of the second RS codeword are used to perform error correction on the first RS codeword and the second RS codeword to generate an error-corrected first RS codeword and an error-corrected second RS codeword.
2. The RAID decoding system of claim 1, wherein the second RS codeword is a mirror of the first RS codeword so that the parity data of the first RS codeword is equal to the parity data of the second RS codeword, and the storage only stores the parity data of one of the first RS codeword and the second RS codeword, and further stores one of the first RS codeword with errors and the second RS codeword with errors.
3. The RAID decoding system of claim 2, wherein the MUX inputs the parity data of the first RS codeword and the parity data of the second codeword to the RS decoder by mirroring the parity data stored in the storage.
4. The RAID decoding system of claim 2, further comprising:
- a Result Check block, coupled to the RAID decoder, for receiving the one of the first RS codeword with errors inserted and the second RS codeword with errors inserted and the error-corrected first RS codeword and the error-corrected second RS codeword, and determining correctness of the data.
5. The RAID decoding system of claim 1, wherein the RS decoder comprises:
- a first RS decoder for storing the first RS codeword and for performing decoding on the first RS codeword according to the parity data to generate the updated syndrome of the first RS codeword; and
- a second RS decoder for storing the second RS codeword and for performing decoding on the second RS codeword according to the parity data to generate the updated syndrome of the second RS codeword.
6. The RAID decoding system of claim 1, further comprising:
- an Error Insertion block for inserting errors into the first RS codeword and the second RS codeword.
7. The RAID decoding system of claim 6, further comprising:
- a Random Number Generator, for generating data to the Error Insertion block; and
- a SEED pool, coupled between the Error Insertion block and the Random Number Generator, for storing values corresponding to the first RS codeword with errors inserted and the second RS codeword with errors inserted, and using those values to control the Random Number Generator to generate the first RS codeword with errors inserted and the second RS codeword with errors inserted when the updated syndrome of the first RS codeword and the updated syndrome of the second RS codeword both equal zero.
8. The RAID decoding system of claim 7, further comprising:
- a Result Check block, coupled to the Random Number Generator and the RAID decoder, for receiving the first RS codeword with errors inserted and the second RS codeword with errors inserted and the error-corrected first RS codeword and the error-corrected second RS codeword, and determining correctness of the data.
9. The RAID decoding system of claim 1, wherein the updated syndrome of the first RS codeword and the updated syndrome of the second RS codeword are used to perform error correction on the first RS codeword and the second RS codeword when the updated syndrome of the first RS codeword and the updated syndrome of the second RS codeword both equal zero.
Type: Application
Filed: Jan 1, 2018
Publication Date: May 3, 2018
Inventor: Yu-Luen Wang (Hsinchu City)
Application Number: 15/859,716