High Speed Switching Circuit Configuration
A low inductance electrical switching circuit arrangement, includes a two sided substrate with a plurality of through-substrate electrical vias. A capacitor is arranged on the substrate first side above a first via, and an electrical sink is arranged on the first side above a second via. A switching component configured to produce a plurality of current pulses is arranged on the substrate second side below the first and second via.
This application claims the benefit of U.S. Provisional Patent Application Ser. No. 62/752,460, filed Oct. 30, 2018, entitled “High Speed Switching Circuit Configuration,” which is incorporated by reference herein in its entirety.
FIELD OF THE INVENTIONThe present invention relates to electronic circuitry, and more particularly, is related to a high speed switching circuit.
BACKGROUND OF THE INVENTIONEmbodiments of the present invention provide a high speed switching circuit configuration and method for producing the same. Briefly described, the present invention is directed to a low inductance electrical switching circuit arrangement with a two sided substrate with a plurality of through-substrate electrical vias. A capacitor is arranged on the substrate first side above a first via, and an electrical sink is arranged on the first side above a second via. A switching component configured to produce a plurality of current pulses is arranged on the substrate second side below the first and second via.
Other systems, methods and features of the present invention will be or become apparent to one having ordinary skill in the art upon examining the following drawings and detailed description. It is intended that all such additional systems, methods, and features be included in this description, be within the scope of the present invention and protected by the accompanying claims.
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principals of the invention.
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
As used within this disclosure, a “lateral” or “horizontal” current path refers to a direction of current along the surface of a circuit board, for example through circuit board traces. A “vertical” current path refers to a direction of current substantially normal to the surface of a circuit board, for example, a current path traveling through a circuit board from a circuit board top surface to a circuit board bottom surface using a through via. As used herein, “substantially” means “very nearly,” or within typical manufacturing tolerances.
As noted in the background section above,
A capacitor 212 has electrical connections, such as a first capacitor wire bond pad 274 and the second capacitor wire bond pad 275 on a first side of the sink 214, and a circuit board connector 232 on a second side of the capacitor 212. The wire bond pads 274 and 275 may be electrically connected. For example, the wire bond pads 274, 275 may be different areas of a larger pad. Alternative embodiments may use different types of electrical connections, for example, a metal tab, among other possibilities. The capacitor 212 has a thickness 209, for example less than 1000 μm, preferably less than 500 μm, and ideally less than 175 μm. The capacitor 212 is arranged to attach to the substrate 202 on the substrate first side 204, for example, via a solder connection between the capacitor circuit board connector 232 and the first via 220. Note that while
A switching component 216 configured to produce a plurality of current pulses is arranged to be attached on the second side 206 of the substrate 202. The switching component 216 may be electrically connected to the capacitor 212 through the via 220 using a gate electrical contact 238 on the switching component 216. While
An electrical sink 214, for example a laser diode or laser diode array, has an electrical connection, such as a sink wire bond pad 276 on a first side of the sink 214, and a circuit board connector 234 on a second side of the sink 214. Alternative embodiments may use different types of electrical connections, for example, a metal tab, among other possibilities. The sink 214 is arranged on the first side 204 of the substrate 202 with the sink circuit board connector 234 adjacent to and in electrical communication with a second via 222 electrically connecting the sink 214 to the source contact 238 on the switching component 216 through the substrate 202. The switching component 216 may be electrically connected to the sink 214 through the via 222 using a source electrical contact 236 on the switching component 216. While
While, as shown in
While
By reducing the length of interconnects between the switching component 216, the capacitor 212, and the sink 214, pulse generation characteristics may be improved. Under the first embodiment, a current loop 280 (
The arrangement of the switching component 216, capacitor 212 and sink 214 with respect to two sides 204, 206 of the substrate 202 is leveraged to minimize interconnection lengths. The gate and trigger signal of the switching component 216 are not shown in the drawings for purposes of clarity.
Additional circuit elements may also be included in the circuit 200, for example, a capacitor charging element 230 may be attached to the substrate 202 first side 204 and electrically connected to the capacitor 212, for example, via a wire bond connection 224 between a second charging element wire bond pad 273 to the first capacitor wire bond pad 274, or alternatively via traces on the substrate (not shown). Alternative embodiments may include more than one charging element 230, for example, embodiments with an array of capacitors/loads, Other circuit elements, for example, a controller 250 may be incorporated into the circuit 200 in a similar fashion, such as, via a wire bond connection 240 between a first charging element wire bond pad 272 to a controller wire bond pad 271.
The inductance added by the electrical connections 240, 224 between the controller, 250, the capacitor charging element 230, and the capacitor 212 does not detract from the pulse generation performance of the current loop 280. It may be preferable for the wire bond connection 224 between the additional circuit elements 230, 250 and the capacitor 212 to have a higher inductance with respect to the current loop 280 to help isolate the electrical parasitics of the additional circuit elements 230, 250 from the current loop 280.
It should be noted that while the embodiments described herein are based on the circuit of
While in general the capacitance value for a channel may be adjusted by using several capacitors wired together, such arrangements may undesirably increase the inductance in the circuit, degrading the performance. Therefore, it may be desirable to use as few capacitors as possible, and instead of combining several capacitors together using a single capacitor that may have its capacitance parameters adjusted by adjusting the physical dimensions of the capacitor. For example, a sequence of individual capacitors chained together may be replaced by a single capacitor that is dimensionally specified, for example by length, to the desired electrical characteristics. Specifically, this may be used to tailor the capacitance of a switching circuit without introducing an undesirable increase in inductance.
While the first substrate 301 may be a circuit board, alternatively, as shown by
In alternative embodiments, the heat sink 550 may be made from thermally conductive but electrically non-conductive material, for example, where the electrical insulator is not required.
Under some operating conditions the sink 314 may run hot. The component arrangement of the first and second embodiments may result in the through vias 320 conducting heat between the switch 316 and the sink 314. The third embodiment and a fourth embodiment, described above, are include heat sinks 404, 505 to provide thermal cooling for the sink 314 and to reduce thermal conductivity between the sink 314 and the switch 316. A trade-off for this arrangement is the addition of a (preferably) short lateral current path 460 along the substrate 202 to convey current between the sink 314 and the switch 316.
A two sided substrate (202) is provided, as shown by block 710. The substrate has a plurality of through-substrate electrical vias (220, 222) oriented substantially normal to the substrate first and second sides, each via having a first electrical contact disposed on the first side electrically connected through the substrate to a second electrical contact disposed on the second side opposite the first electrical contact. A capacitor (212) is attached to the first side of the substrate with a capacitor circuit board connector adjacent to and in electrical communication with a first via (220), as shown by block 720. An electrical sink (214) is attached to the first side of the substrate with the sink circuit board connector adjacent to and in electrical communication with a second via (222), as shown by block 730. A switching component (216) is attached to the second side of the substrate adjacent to and in electrical communication with the first via, as shown by block 740. In some embodiments, the switching component is also adjacent to and in electrical communication with the second via.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Claims
1. A low inductance electrical switching circuit arrangement, comprising:
- a substrate further comprising: a first side; a second side opposite the first side and separated from the first side by a substrate thickness; and a plurality of through-substrate electrical vias oriented substantially normal to the substrate first side and second side, each via further comprising a first electrical contact disposed on the first side electrically connected through the substrate to a second electrical contact disposed on the second side opposite the first electrical contact;
- a capacitor comprising a first side electrical contact on a capacitor first side and a circuit board connector on a capacitor second side, the capacitor arranged on the first side of the substrate with the capacitor circuit board connector adjacent to and in electrical communication with a first via;
- an electrical sink comprising a first side electrical contact on a sink first side and a circuit board connector on a sink second side, the sink arranged on the first side of the substrate with the sink circuit board connector adjacent to and in electrical communication with a second via; and
- a switching component configured to produce a plurality of current pulses arranged on the second side of the substrate adjacent to and in electrical communication with the first via.
2. The circuit of claim 1, wherein the switching component is arranged on the second side of the substrate adjacent to and in electrical communication with the first via and the second via.
3. The circuit of claim 1, wherein the capacitor is configured to discharge current pulses through the switch and the sink.
4. The circuit of claim 1, further comprising a conducting element configured to electrically connect the capacitor first side electrical contact to the sink first side electrical contact.
5. The circuit of claim 4, wherein a current loop comprising the electrical connections between the capacitor, switching component and the sink has a total inductance level below 5 nH.
6. The circuit of claim 4, wherein a current loop comprising an accumulated length of electrical connections between the capacitor, switching component and the sink is less than 5 mm.
7. The circuit of claim 1, wherein:
- each of the plurality of vias has an axis substantially normal to the substrate first side and second side;
- the capacitor and the switching component intersect with the first via axis;
- the switching component intersect with the first and/or second via axis; and
- the sink components intersect with the second via axis.
8. The circuit of claim 1, wherein the substrate comprises a printed circuit board.
9. The circuit of claim 1, further comprising a heat sink comprising a heat transfer surface arranged in thermal communication with the second via on the substrate second side opposite the electrical sink.
10. A method for arranging a low inductance electrical switching circuit, comprising:
- providing a substrate further comprising: a first side; a second side opposite the first side; and a plurality of through-substrate electrical vias oriented substantially normal to the substrate first side and second side, each via further comprising a first electrical contact disposed on the first side electrically connected through the substrate to a second electrical contact disposed on the second side opposite the first electrical contact;
- attaching a capacitor to the first side of the substrate with a capacitor circuit board connector adjacent to and in electrical communication with a first via;
- attaching an electrical sink to the first side of the substrate with a sink circuit board connector adjacent to and in electrical communication with first and a second via; and
- attaching a switching component to the second side of the substrate adjacent to and in electrical communication with the first via.
11. The method of claim 10, wherein the switching component is further in electrical communication with the second via.
12. The method of claim 10, further comprising the step of attaching a heat sink comprising a heat transfer surface arranged in thermal communication with the second via on the substrate second side opposite the electrical sink.
13. A low inductance electrical switching circuit arrangement, comprising:
- a first substrate and a second substrate, each further comprising: a first side; a second side opposite the first side and separated from the first side by a substrate thickness; and a plurality of through-substrate electrical vias oriented substantially normal to the substrate first side and second side, each via further comprising a first electrical contact disposed on the first side electrically connected through the substrate to a second electrical contact disposed on the second side opposite the first electrical contact;
- the first substrate and the second substrate arranged back to back with the first substrate second side adjacent to the second substrate second side;
- a capacitor arranged on the first side of the first substrate adjacent to and in electrical communication with a first circuit board first via;
- an electrical sink arranged on the first side of the first substrate adjacent to and in electrical communication with a second via; and
- a switching component configured to produce a plurality of current pulses arranged on the first side of the second substrate adjacent to and in electrical communication with the first via and the second via,
- wherein the first substrate first via is arranged adjacent to and in electrical communication with the second substrate first via, the first substrate second via is arranged adjacent to and in electrical communication with the second substrate second via, the first and second circuit board first vias and the first and second circuit board second vias arranged to provide a vertical current path from the switching component to the electrical sink and the capacitor to the switching component.
14. The low inductance electrical switching circuit arrangement of claim 13, further comprising:
- a leadframe style surface mount package comprising a leadframe,
- wherein the first substrate comprises the leadframe, and the electrical sink and the capacitor are mounted to the leadframe and are in electrical and thermal communication with the leadframe.
15. The low inductance electrical switching circuit arrangement of claim 14, wherein the second substrate comprises a printed circuit board, and the a leadframe style surface mount package is mounted to the printed circuit board.
Type: Application
Filed: Oct 29, 2019
Publication Date: Apr 30, 2020
Inventor: Lawrence Godfrey (Nanaimo)
Application Number: 16/666,765