SEMICONDUCTOR MODULE

A semiconductor module includes a plurality of semiconductor elements, a sealing resin body, a positive electrode side terminal, a negative electrode side terminal, and an output terminal. The positive electrode side terminal, the negative electrode side terminal, and the output terminal are each connected to any of the semiconductor elements, and project from a same surface of the sealing resin body. Projecting portions of the positive electrode side terminal, the negative electrode side terminal, and the output terminal are arranged next to each other in an arrangement direction so that the projecting portion of the output terminal is located at an end.

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Description
CROSS REFERENCE TO RELATED APPLICATIONS

The present application is a continuation application of International Patent Application No. PCT/JP20181028790 filed on Aug. 1, 2018, which designated the U.S. and claims the benefit of priority from Japanese Patent Application No. 2017-188647 filed on Sep. 28, 2017. The entire disclosures of all of the above applications are incorporated herein by reference.

TECHNICAL FIELD

The present disclosure relates to a semiconductor module.

BACKGROUND

A semiconductor module has a plurality of semiconductor elements, such as IGBT elements, constituting upper and lower arms. The plurality of semiconductor elements are sealed by a sealing resin body. The semiconductor module has a positive electrode side terminal, a negative electrode side terminal, and an output terminal. The positive electrode side terminal, the negative electrode side terminal and the output terminal project from the same surface of the sealing resin body, and the projecting portions of the respective terminals are arranged next to each other.

SUMMARY

The present disclosure describes a semiconductor module including a plurality of semiconductor elements, a sealing resin body, a first power supply terminal, a second power supply terminal, and an output terminal. The semiconductor elements constitute upper and lower arms. The sealing resin body seals the plurality of semiconductor elements. The first power supply terminal is one of a positive electrode side terminal and a negative electrode side terminal, and the second power supply terminal is the other of the positive electrode side terminal and the negative electrode side terminal. Each of the first power supply terminal and the second power supply terminal is connected to any of the semiconductor elements and projects from the sealing resin body. The output terminal is connected to any of the semiconductor elements and projects from the sealing resin body. The first power supply terminal, the second power supply terminal, and the output terminal project from a same surface of the sealing resin body, and projecting portions of the first power supply terminal, the second power supply terminal, and the output terminal are arranged next to each other in an arrangement direction so that the projecting portion of the output terminal is located at a first end, the projecting portion of the first power supply terminal is located at a second end, and the projecting portion of the second power supply terminal is located between the projecting portion of the first power supply terminal and the projecting portion of the output terminal.

BRIEF DESCRIPTION OF DRAWINGS

Features and advantages of the present disclosure will become more apparent from the following detailed description made with reference to the accompanying drawings, in which:

FIG. 1 is an equivalent circuit diagram showing a power conversion device to which a semiconductor module according to a first embodiment is applied;

FIG. 2 is a plan view showing the schematic configuration of the semiconductor module;

FIG. 3 is a plan view of the semiconductor module from which a sealing resin body is removed;

FIG. 4 is a sectional view along line IV-IV of FIG. 2;

FIG. 5 is a plan view showing a comparative example;

FIG. 6 is a plan view showing a semiconductor module according to a second embodiment;

FIG. 7 is a plan view showing a modification;

FIG. 8 is a plan view showing a semiconductor module according to a third embodiment;

FIG. 9 is a plan view showing a semiconductor module according to a fourth embodiment;

FIG. 10 is a plan view showing a semiconductor module according to a fifth embodiment; and

FIG. 11 is a plan view of the semiconductor module when viewed in the direction of an arrow XI in FIG. 10.

 DETAILED DESCRIPTION

In a semiconductor module, a positive electrode side terminal and a negative electrode side terminal, which serve as power supply terminals, are projected from the same surface of a sealing resin body and are connected to, for example, a smoothing capacitor through bus bars. To downsize a physical constitution and reduce an inductance, a positive electrode side bus bar connecting to the positive electrode side terminal and a negative electrode side bus bar connecting to the negative electrode side terminal are extended in the arrangement direction of the terminals.

In such a semiconductor module, if the projection length of a power supply terminal, such as the positive electrode side terminal, disposed at one end in the arrangement direction is longer than the projection length of a neighboring power supply terminal, such as the negative electrode side terminal disposed in the middle, a bus bar needs to be connected to the power supply terminal in the middle while bypassing the power supply terminal, at the end, having the longer projection length. As a result, a parasitic inductance as well as a surge voltage are likely to increase.

According to an aspect of the present disclosure, a semiconductor module includes a plurality of semiconductor elements, a sealing resin body, a first power supply terminal, a second power supply terminal, and an output terminal. The semiconductor elements constitute upper and lower arms. The sealing resin body seals the plurality of semiconductor elements. The first power supply terminal is one of a positive electrode side terminal and a negative electrode side terminal, and the second power supply terminal is the other of the positive electrode side terminal and the negative electrode side terminal. The first power supply terminal and the second power supply terminal are each connected to any of the plurality of semiconductor elements and project from the sealing resin body. The output terminal is connected to any of the plurality of semiconductor elements and projects from the sealing resin body. The first power supply terminal, the second power supply terminal, and the output terminal project from a same surface of the sealing resin body. Projecting portions of the first power supply terminal, the second power supply terminal and the output terminal are arranged next to each other in an arrangement direction, such that the projecting portion of the output terminal is located at an end in the arrangement direction, the projecting portion of the first power supply terminal is located at another end in the arrangement direction, and the projecting portion of the second power supply terminal is located between the projecting portion of the output terminal and the projecting portion of the first power supply terminal. A projection length of the projecting portion of the first power supply terminal is shorter than a projection length of the projecting portion of the second power supply terminal.

In such a configuration, since the projection length of the projecting portion of the first power supply terminal, which is disposed at the end, is short, it is possible to extend and arrange a bus bar connecting to the projecting portion of the second power supply terminal, which is disposed in the middle, in the arrangement direction without avoiding the projecting portion of the first power supply terminal at the end. Thus, it is possible to suppress the bypass of the bus bar and therefore reduce a parasitic inductance. Further, the suppression of the bypass enable facing arrangement of bus bars connecting to the projecting portions of the first and second power supply terminals to face each other. As such, the parasitic inductance can be further reduced. Accordingly, it is possible to reduce a surge voltage.

A plurality of embodiments will be described with reference to the accompanying drawings. In the embodiments, functionally and/or structurally corresponding parts are denoted by the same reference numerals. Hereinafter, a thickness direction of a semiconductor element (e.g, IGBT) is referred to as a Z direction, and an arrangement direction, of a power supply terminal and an output terminal, orthogonal to the Z direction is referred to as an X direction. Further, a direction orthogonal to both the Z direction and the X direction is referred to as a Y direction. Unless otherwise specified, a shape in an X-Y plane view (a shape along an X-Y plane) is referred to as a planar shape. It can be said that the X-Y plane view is a projection view in the Z direction.

First Embodiment

Hereinafter, a reference numeral suffix H denotes an element belonging to an upper arm, and a suffix L denotes an element belonging to a lower arm. Some elements are denoted by H, L as suffixes to distinguish between the upper arm and the lower arm, and others are denoted by common reference numerals between the upper arm and the lower arm.

First, a power conversion device to which a semiconductor module is applied will be described with reference to FIG. 1.

A power conversion device 1 shown in FIG. 1 is mounted on, for example, an electric car or a hybrid car. The power conversion device 1 is configured to convert a DC voltage supplied from a DC power source 2 mounted on a vehicle into a three-phase AC and output the three-phase AC to a three-phase AC system motor 3. The motor 3 functions as a traveling drive source of the vehicle. The power conversion device 1 can also convert power generated by the motor 3 into a DC to charge the DC power source 2. Thus, the power conversion device 1 can perform bidirectional power conversion.

The power conversion device 1 includes a smoothing capacitor 4 and an inverter 5. A positive electrode side terminal of the smoothing capacitor 4 is connected to a positive electrode of the DC power source 2, which is a high potential side electrode of the DC power source 2, and a negative electrode side terminal of the smoothing capacitor 4 is connected to a negative electrode of the DC power source 2, which is a low potential side electrode of the DC power source 2. The inverter 5 converts inputted DC power into the three-phase AC of a predetermined frequency and outputs the three-phase AC to the motor 3. The inverter 5 converts AC power generated by the motor 3 into DC power.

The inverter 5 includes six arms. The inverter 5 includes upper and lower arms for three phases. The upper and lower arms of each phase are constituted such that the two arms are connected in series between a positive electrode side line 6 and a negative electrode side line 7. The positive electrode side line 6 is a positive electrode side power source line, and the negative electrode side line 7 is a negative electrode side power source line. The positive electrode side line 6 is also referred to as a high potential power source line, and the negative electrode side line 7 is also referred to as a low potential power source line. In the upper and lower arms of each phase, the connection point between the upper and lower arms is connected to an output line 8 to the motor 3.

In the present embodiment, an insulated gate bipolar transistor (hereinafter referred to as an IGBT) is adopted as a semiconductor element constituting each arm. A semiconductor module 10 includes two IGBTs 11H, 11L connected in series. FWDs 12H, 12L as freewheel diodes are connected in reverse parallel to the IGBTs 11H, 11L, respectively. Thus, the upper and lower arms are configured to have the two IGBTs 11H, 11L. Reference numeral 11g shown in FIG. 1 denotes the gate electrode of each IGBT 11H, 11L. Thus, the semiconductor element has the gate electrode 11g.

Further, an n-channel type is adopted for the IGBT 11H, 11L. A collector electrode 11c of the IGBT 11H of the upper arm is electrically connected to the positive electrode side line 6. An emitter electrode 11e of the IGBT 11L of the lower arm is electrically connected to the negative electrode side line 7. Further, the emitter electrode 11e of the IGBT 11H of the upper arm and the collector electrode 11c of the IGBT 11L of the lower arm are connected to each other.

The power conversion device 1 may include a boost converter for boosting the DC voltage supplied from the DC power source 2, a gate drive circuit for driving the operation of semiconductor elements constituting the inverter 5 and the boost converter, and the like in addition to the smoothing capacitor 4 and the inverter 5.

Next, the semiconductor module 10 will be described with reference to FIGS. 2 to 4.

As shown in FIGS. 2 to 4, the semiconductor module 10 includes the IGBTs 11H, 11L, a sealing resin body 13, first heatsinks 14H, 14L, terminals 16, second heatsinks 18H, 18L, a joint part 20, a power supply terminal 22, an output terminal 23, and a signal terminal 24. The semiconductor module 10 according to the present embodiment further includes a bus bar 26.

Each of the IGBTs 11H, 11L, as the semiconductor element, is formed in a semiconductor substrate (semiconductor chip) made of silicon, silicon carbide or the like. In the present embodiment, each IGBT 11H, 11L is the n-channel type, as described above. The FWDs 12H, 12L are integrally formed with the IGBTs 11H, 11L, respectively. More specifically, the FWD 12H is integrally formed with the IGBT 11H, and the FWD 12L is integrally formed with the IGBT 11L. Thus, RC (Reverse Conducting)-IGBT is adopted as each IGBT 11H, 11L.

Each of the IGBTs 11H, 11L has a vertical structure so that a current flows in the Z direction. Each of the IGBTs 11H, 11L is formed with the gate electrode 11g. The gate electrode 11g has a trench structure. As shown in FIG. 4, in the plate thickness direction of each IGBT 11H, 11L, that is, in the Z direction, the collector electrode 11c is formed on one surface of each IGBT 11H, 11L, and the emitter electrode 11e is formed on a rear surface opposite to the one surface. The collector electrode 11c serves also as the cathode electrode of corresponding FWD 12H, 12L, and the emitter electrode 11e serves also as the anode electrode of corresponding FWD 12H, 12L.

The IGBTs 11H, 11L have approximately the same planar shape, more specifically, a planar and substantially rectangular shape, and have approximately the same size and approximately the same thickness. The IGBTs 11H, 11L have the same configuration. The IGBTs 11H, 11L are disposed such that the respective collector electrodes 11c are disposed on the same side in the Z direction, and the respective emitter electrodes 11e are disposed on the same side in the Z direction. The IGBTs 11H, 11L are positioned at approximately the same height in the Z direction, and disposed side by side in the X direction.

Pads as signal electrodes (not shown) are formed on the rear surface of each IGBT 11H, 11L, that is, the emitter electrode forming surface. The pads are formed at a position different from the emitter electrode 11e. The pads are electrically separated from the emitter electrode 11e. The pads are disposed at an end opposite to the region where the emitter electrode 11e is disposed in the Y direction.

In the present embodiment, each IGBT 11H, 11L has five pads. More specifically, as the five pads, each IGBT 11H, 11L has a pad for the gate electrode, a pad for a Kelvin emitter for detecting the potential of the emitter electrode 11e, a pad for sensing a current, a pad for an anode potential of a temperature sensor (temperature-sensitive diode) for detecting the temperature of the IGBT 11H, 11L, and a pad for a cathode potential thereof. In the planar and substantially rectangular IGBT 11H, 11L, the five pads are collectively disposed on one end side in the Y direction, and arranged side by side in the X direction.

The sealing resin body 13 seals the IGBTs 11H, 11L. The sealing resin body 13 is made of, for example, an epoxy resin. The sealing resin body 13 is molded by, for example, transfer molding. The sealing resin body 13 has one surface 13a orthogonal to the Z direction, a rear surface 13b opposite to the one surface 13a, and a lateral surface connecting the one surface 13a with the rear surface 13b. The one surface 13a and the rear surface 13b are, for example, flat surfaces.

The first heatsinks 14H, 14L have functions of dissipating heat of the respective IGBTs 11H, 11L to the outside of the semiconductor module 10, and also function as wirings. Therefore, the first heatsinks 14H, 14L are each formed of at least a metallic material in order to secure heat conductivity and electrical conductivity. In the present embodiment, each of the first heatsinks 14H, 14L is provided so as to encompass the corresponding IGBT 11H, 11L in a projection view from the Z direction. The first heatsinks 14H, 14L are disposed adjacent to the one surface 13a of the sealing resin body 13 than the respective IGBTs 11H, 11L.

The first heatsinks 14H, 14L are connected to the collector electrodes 11c of the respective IGBTs 11H, 11L through solder 15. The major part of each first heatsink 14H, 14L is covered by the sealing resin body 13. Surfaces 14a of the first heatsinks 14H, 14L opposite to the IGBTs 11H, 11L are exposed from the sealing resin body 13, as heat dissipation surfaces. The heat dissipation surfaces 14a are substantially flush with the one surface 13a of the sealing resin body 13. Portions of the surfaces of the first heatsinks 14H, 14L other than the connection portions with the solder 15 and the heat dissipation surfaces 14a are covered by the sealing resin body 13.

More specifically, the collector electrode 11c of the IGBT 11H is connected to the surface of the first heatsink 14H opposite to the heat dissipation surface 14a through the solder 15. The collector electrode 11c of the IGBT 11L is connected to the surface of the first heatsink 14L opposite to the heat dissipation surface 14a through the solder 15. The first heatsinks 14H, 14L are disposed side by side in the X direction, and disposed at approximately the same position in the Z direction. The heat dissipation surfaces 14a of the first heatsinks 14H, 14L are exposed from the one surface 13a of the sealing resin body 13, and arranged side by side in the X direction.

The terminals 16 are interposed between the IGBTs 11H, 11L and the second heatsinks 18H, 18L, respectively. The terminals 16 are each positioned in the middle of the heat conduction path and electrical conduction path between the IGBT 11H, 11L and the second heatsink 18H, 18L, and is therefore formed of at least a metallic material in order to secure heat conductivity and electrical conductivity. The terminals 16 are disposed opposite to the emitter electrodes 11e, and connected to the emitter electrodes 11e through solder 17. The terminals 16 are correspondingly provided for the IGBTs 11H, 11L.

Likewise the first heat sinks 14H, 14L, the second heatsinks 18H, 18L have functions of dissipating heat of the respective IGBTs 11H, 11L to the outside of the semiconductor module 10, and also function as wirings. In the present embodiment, the second heatsinks 18H, 18L are each provided so as to encompass the corresponding IGBT 11H, 11L in the projection view from the Z direction. The second heatsinks 18H, 18L are disposed adjacent to the rear surface 13b of the sealing resin body 13 than the respective IGBTs 11H, 11L.

The second heatsinks 18H, 18L are electrically connected to the emitter electrodes lie of the IGBTs 11H, 11L, respectively. More specifically, the second heatsink 18H, 18L is electrically connected to the corresponding emitter electrode 11e through the solder 17, the terminal 16, and solder 19. The major part of each second heatsink 18H, 18L is covered by the sealing resin body 13. Surfaces 18a of the second heatsinks 18H, 18L opposite to the IGBTs 11H, 11L are exposed from the sealing resin body 13, as heat dissipation surfaces. The heat dissipation surfaces 18a are substantially flush with the rear surface 13b. The portions of the surfaces of the second heatsinks 18H, 18L other than the connection portions with the solder 19 and the heat dissipation surfaces 18a are covered by the sealing resin body 13.

More specifically, the terminal 16 corresponding to the IGBT 11H is connected to the surface of the second heatsink 18H opposite to the heat dissipation surface 18a through the solder 19. The terminal 16 corresponding to the IGBT 11L is connected to the surface of the second heatsink 18L opposite to the heat dissipation surface 18a through the solder 19. The second heatsinks 18H, 18L are disposed side by side in the X direction, and disposed at approximately the same position in the Z direction. Further, the heat dissipation surfaces 18a of the second heatsinks 18H, 18L are exposed from the rear surface 13b of the sealing resin body 13, and arranged side by side in the X direction.

The joint part 20 has a first joint part 20a, a second joint part 20b, and a third joint part 20c. The first joint part 20a and the second joint part 20b electrically interconnect the upper arm and the lower arm. The first joint part 20a and the second joint part 20b electrically connect the second heatsink 18H of the upper arm and the first heatsink 14L of the lower arm.

In the present embodiment, the second joint part 20b is integrally formed with the second heatsink 18H by processing the same metal plate. The second joint part 20b is formed thinner than the second heatsink 18H so as to be covered with the sealing resin body 13. The second joint part 20b connects to the second heatsink 18H so as to be substantially flush with the surface of the second heatsink 18H adjacent to the IGBT 11H. The second joint part 20b has a thin plate shape, and extends in the X direction from the lateral surface of the second heatsink 18H adjacent to the second heatsink 18L.

Likewise the second joint part 20b, the first joint part 20a is also integrally formed with the first heatsink 14L by processing the same metal plate. The first joint part 20a is formed thinner than the first heatsink 14L so as to be covered with the sealing resin body 13. The first joint part 20a connects to and is substantially flush with the surface of the first heatsink 14L adjacent to the IGBT 11H. The first joint part 20a is extended from the lateral surface of the first heatsink 14L adjacent to the first heatsink 14H toward the second heatsink 18H. The first joint part 20a is extended in the X direction in a plan view from the Z direction. In the present embodiment, the first joint part 20a has two bent portions, as shown in FIG. 4. The leading end of the first joint part 20a overlaps with the second joint part 20b in the projection view from the Z direction. Further, the second joint part 20b and the first joint part 20a are connected together through solder 21.

The third joint part 20c electrically interconnects the second heatsink 18L and a negative electrode side terminal 22n, as shown in FIG. 3. The third joint part 20c connects to the second heatsink 18L. In the present embodiment, the third joint part 20c is integrally formed with the second heatsink 18L by processing the same metal plate. The third joint part 20c extends in the X direction from the lateral surface of the second heatsink 18L adjacent to the second heatsink 18H. Further, the third joint part 20c is disposed side by side with the second joint part 20b in the Y direction.

The first joint part 20a may be a separate member from the first heatsink 14L and be connected and continued to the first heatsink 14L. In the same way, the second joint part 20b may be a separate member from the second heatsink 18H and be connected and continued to the second heatsink 18H. The third joint part 20c may be a separate member from the second heatsink 18L and be connected and continued to the second heatsink 18L. Only one of the first joint part 20a and the second joint part 20b can also electrically connect the upper arm and the lower arm.

The power supply terminal 22 includes a positive electrode side terminal 22p and a negative electrode side terminal 22n. The positive electrode side terminal 22p is electrically connected to the positive electrode side terminal of the smoothing capacitor 4. The positive electrode side terminal 22p is electrically connected to the positive electrode side line 6. The positive electrode side terminal 22p is a main terminal through which a main current flows. The positive electrode side terminal 22p is also referred to as a high potential power supply terminal or a P terminal. The positive electrode side terminal 22p connects to the first heatsink 14H, and extends in the Y direction from the first heatsink 14H. In the present embodiment, the positive electrode side terminal 22p is integrally formed with the first heatsink 14H by processing the same metal plate. The positive electrode side terminal 22p connects to one end of the first heatsink 14H in the Y direction. The positive electrode side terminal 22p is extended in the Y direction, and projects outward from a lateral surface 13c of the sealing resin body 13.

The negative electrode side terminal 22n is electrically connected to the negative electrode side terminal of the smoothing capacitor 4. The negative electrode side terminal 22n is electrically connected to the negative electrode side line 7. The negative electrode side terminal 22n is a main terminal through which the main current flows. The negative electrode side terminal 22n is also referred to as a low potential power supply terminal or an N terminal. A part of the negative electrode side terminal 22n is disposed so as to overlap with the third joint part 20c in the projection view in the Z direction. The negative electrode side terminal 22n is disposed adjacent to the IGBT 11L relative to the third joint part 20c in the Z direction. The negative electrode side terminal 22n and the third joint part 20c are connected together through solder (not shown). The negative electrode side terminal 22n is extended in the Y direction, and projects outward from the same lateral surface 13c as the positive electrode side terminal 22p.

The output terminal 23 is electrically connected to the connection point between the upper and lower arms. The output terminal 23 is a main terminal through which the main current flows. The output terminal 23 is electrically connected to the coil of the corresponding phase of the motor 3. The output terminal 23 is also referred to as an AC terminal or an O terminal. The output terminal 23 connects to the first heatsink 14L, and extends on the same side as the positive electrode side terminal 22p in the Y direction from the first heatsink 14L. In the present embodiment, the output terminal 23 is integrally formed with the first heatsink 14L by processing the same metal plate. The output terminal 23 connects to one end of the first heatsink 14L in the Y direction. The output terminal 23 is extended in the Y direction, and projects outward from the same lateral surface 13c as the positive electrode side terminal 22p and the negative electrode side terminal 22n.

The respective projecting portions of the positive electrode side terminal 22p, the negative electrode side terminal 22n, and the output terminal 23 from the sealing resin body 13 are disposed at approximately the same position in the Z direction. Further, the positive electrode side terminal 22p, the negative electrode side terminal 22n, and the output terminal 23 are disposed side by side in this order in the X direction. That is, the projecting portion of the output terminal 23 is disposed at one end, and the projecting portion of the positive electrode side terminal 22p is disposed at the other end. Further, the projecting portion of the negative electrode side terminal 22n is disposed in the middle, that is, disposed between the projecting portion of the output terminal 23 and the projecting portion of the positive electrode side terminal 22p. Thus, the negative electrode side terminal 22n is disposed next to the positive electrode side terminal 22p.

The positive electrode side terminal 22p, the negative electrode side terminal 22n, and the output terminal 23 each has a substantially flat plate shape, and have substantially the same thickness in the Z direction. Therefore, the thicknesses of the respective projecting portions of the positive electrode side terminal 22p, the negative electrode side terminal 22n, and the output terminal 23 are substantially equal to each other. Further, the widths of the respective projecting portions of the positive electrode side terminal 22p, the negative electrode side terminal 22n, and the output terminal 23 are substantially equal to each other. In this context, the width is a length (dimension) in a direction orthogonal to both of the Y direction which is the projecting direction from the lateral surface 13c and the Z direction which is the plate thickness direction, that is, in the X direction.

Further, the projection length of the positive electrode side terminal 22p is shorter than the projection length of the negative electrode side terminal 22n. In this context, the projection length is a length extended outward with the lateral surface 13c of the sealing resin body 13 as a position reference. In the present embodiment, the projection length of the output terminal 23 is longer than the projection length of the negative electrode side terminal 22n. That is, the projection length of the positive electrode side terminal 22p is the shortest, and the projection length of the output terminal 23 is the longest. The projection length of the negative electrode side terminal 22n is the middle length.

The positive electrode side terminal 22p may be a separate member from the first heatsink 14H and be connected and continued to the first heatsink 14H. The negative electrode side terminal 22n may be integrally formed with the third joint part 20c and furthermore the second heatsink 18L. The output terminal 23 may be a separate member from the first heatsink 14L and be connected and continued to the first heatsink 14L.

Signal terminals 24 are electrically connected to the pads of the corresponding IGBT 11H, 11L through bonding wires 25. In the present embodiment, aluminum-based bonding wires 25 are adopted. The signal terminals 24 are extended in the Y direction, and project outward from a surface opposite to the lateral surface 13c of the sealing resin body 13.

In the present embodiment, the first heatsinks 14H, 14L, the first joint part 20a, the positive electrode side terminal 22p, the negative electrode side terminal 22n, the output terminal 23, and the signal terminals 24 are made up of the same metal plate, such as the same lead frame.

The bus bar 26 electrically interconnects the IGBTs 11H, 11L constituting the upper and lower arms and an external device, more specifically, the smoothing capacitor 4. The bus bar 26 includes a positive electrode side bus bar 26p and a negative electrode side bus bar 26n. The positive electrode side bus bar 26p electrically interconnects the collector electrode 11c of the IGBT 11H and the positive electrode side terminal of the smoothing capacitor 4. The positive electrode side bus bar 26p constitutes at least a part of the positive electrode side line 6. One end of the positive electrode side bus bar 26p connects to the leading end of the projecting portion of the positive electrode side terminal 22p.

The negative electrode side bus bar 26n electrically interconnects the emitter electrode 11e of the IGBT 11L and the negative electrode side terminal of the smoothing capacitor 4. The negative electrode side bus bar 26n constitutes at least a part of the negative electrode side line 7. One end of the negative electrode side bus bar 26n connects to the leading end of the projecting portion of the negative electrode side terminal 22n.

At least portions of the positive electrode side bus bar 26p and the negative electrode side bus bar 26n extending from the connecting portions with the corresponding power supply terminal 22 are extended in the X direction. The portions of the positive electrode side bus bar 26p and the negative electrode side bus bar 26n each have a plate thickness direction in the Y direction. The positive electrode side bus bar 26p and the negative electrode side bus bar 26n are disposed to face each other, with a predetermined gap in the Y direction. In other words, the positive electrode side bus bar 26p and the negative electrode side bus bar 26n are disposed like parallel flat plates. In regard to the positive electrode side bus bar 26p, an end surface connecting to a surface facing in the plate thickness direction is connected to a surface of the positive electrode side terminal 22p facing in a plate thickness direction of the positive electrode side terminal 22p. In regard to the negative electrode side bus bar 26n, likewise, an end surface connecting to a surface facing in the plate thickness direction is connected to a surface of the negative electrode side terminal 26 facing in a plate thickness direction of the negative electrode side terminal 22n. In the present embodiment, the power supply terminal 22 and the corresponding bus bar 26 are connected together by laser welding.

An insulator (not shown) such as an insulating paper or an insulating plate may be disposed between the positive electrode side bus bar 26p and the negative electrode side bus bar 26n so that the positive electrode side bus bar 26p, the insulator, and the negative electrode side bus bar 26n form a layered structure. It is thereby possible to reduce a parasitic inductance.

In the semiconductor module 10 configured as described hereinabove, the IGBTs 11H, 11L, portions of the first heatsinks 14H, 14L, the terminal 16, portions of the second heatsinks 18H, 18L, portions of the power supply terminal 22, a portion of the output terminal, and portions of the signal terminals 24 are integrally sealed by the sealing resin body 13. In the semiconductor module 10, the two IGBTs 11H, 11L constituting the upper and lower arms for one phase are sealed by the sealing resin body 13. Therefore, the semiconductor module 10 is also referred to as a 2-in-1 package.

The respective heat dissipation surfaces 14a of the first heatsinks 14H, 14L are positioned in the same surface, and are also substantially flush with the one surface 13a of the sealing resin body 13. In the same way, the respective heat dissipation surfaces 18a of the second heatsinks 18H, 18L are positioned in the same surface, and are also substantially flush with the rear surface 13b of the sealing resin body 13. Thus, the semiconductor module 10 has a double-sided heat dissipation structure in which the heat dissipation surfaces 14a, 18a are both exposed from the sealing resin body 13.

Next, the effects of the semiconductor module 10 and the power conversion device 1 will be described.

FIG. 5 shows a semiconductor module as a comparative example. In FIG. 5, elements identical to or related to elements in the present embodiment are denoted by adding “r” to the tails of the reference numerals in the present embodiment.

In a semiconductor module 16r shown in FIG. 5, the projection length of a positive electrode side terminal 22pr is longer than the projection length of a negative electrode side terminal 22nr. In this case, in order to extend, in the X direction, a negative electrode side bus bar 26nr to be connected to the negative electrode side terminal 22nr disposed in the middle, it is necessary to avoid the positive electrode side terminal 22pr disposed at an end. Thus, the negative electrode side bus bar 26nr needs to bypass the positive electrode side terminal 22pr, and thus the length of the negative electrode side bus bar 26nr is increased. As a result, a parasitic inductance as well as a surge voltage are increased.

On the other hand, in the present embodiment, as shown in FIG. 2, the projection length of the positive electrode side terminal 22p is shorter than the projection length of the negative electrode side terminal 22n. Therefore, it is possible to extend the negative electrode side bus bar 26n in the X direction without avoiding the positive electrode side terminal 22p disposed at the end. Thus, it is possible to suppress the bypass of the negative electrode side bus bar 26n: therefore, it is possible to reduce the parasitic inductance in a configuration in which the bus bar 26 is connected to the power supply terminal 22 in the X direction. Further, the suppression of the bypass enables the facing arrangement of the positive electrode side bus bar 26p connected to the positive electrode side terminal 22p and the negative electrode side bus bar 26n connected to the negative electrode side terminal 22n to face each other. The facing arrangement also contributes to the reduction of the parasitic inductance. Thus, it is possible to reduce the surge voltage.

Particularly, in the present embodiment, in the respective projecting portions of the positive electrode side terminal 22p, the negative electrode side terminal 22n, and the output terminal 23, which are the main terminals, the respective widths and thicknesses are equal to each other. Since the thicknesses are approximately equal to each other, it is possible to suppress the occurrence of a gap with a mold during the molding of the sealing resin body 13. Further, it is possible to simplify the structure of the mold. Furthermore, it is possible to suppress the unbalance of pressure received by being interposed by the mold. Moreover, since the widths are approximately equal to each other, it is possible to downsize a physical constitution in the X direction which is the arrangement direction while securing a rated current density.

The present embodiment shows the example in which the semiconductor module 10 includes the bus bar 26. However, the present disclosure is not limited to the embodiment described hereinabove. A configuration of not including the bus bar 26 may be adopted. Even in the configuration of not including the bus bar 26, the projection length of the positive electrode side terminal 22p is shorter than the projection length of the negative electrode side terminal 22n. Therefore, in the configuration in which the bus bar 26 is connected to the power supply terminal 22 in the X direction, it is possible to reduce the parasitic inductance as well as the surge voltage by the suppression of the bypass.

In the embodiment described hereinabove, the projecting portion of the negative electrode side terminal 22n is disposed in the middle and the projecting portion of the positive electrode side terminal 22p is disposed at the end opposite to the output terminal 23. In such a case, the positive electrode side terminal 22p disposed at the end may be referred to as a first power supply terminal, and the negative electrode side terminal 22n disposed between the positive electrode side terminal 22p and the output terminal 23 may be referred to as a second power supply terminal.

The present disclosure is not limited to the embodiment described hereinabove. In a configuration in which the positive electrode side terminal 22p is disposed in the middle and the negative electrode side terminal 22n is disposed at the end, the projection length of the negative electrode side terminal 22n may be shorter than the projection length of the positive electrode side terminal 22p. In such a case, the negative electrode side terminal 22n disposed at the end may be referred to as a first power supply terminal and the positive electrode side terminal 22p disposed between the negative electrode side terminal 22n and the output terminal 23 may be referred to as a second power supply terminal.

Second Embodiment

The present embodiment can refer to the preceding embodiment. Therefore, the descriptions of the same parts in the semiconductor module 10 and the power conversion device 1 shown in the preceding embodiment are omitted.

In the present embodiment, as shown in FIG. 6, the widths of the respective projecting portions of the positive electrode side terminal 22p and the negative electrode side terminal 22n are greater than the width of the projecting portion of the output terminal 23. On the other hand, the thickness of the projecting portion of the power supply terminal 22 and the thickness of the projecting portion of the output terminal 23 are substantially equal to each other. Thus, the cross-sectional areas of the respective projecting portions of the positive electrode side terminal 22p and the negative electrode side terminal 22n, which are the power supply terminal 22, are larger than the cross-sectional area of the projecting portion of the output terminal 23. The cross-sectional area is an area orthogonal to the Y direction which is the projecting direction.

Thus, in the present embodiment, the widths of the respective projecting portions of the positive electrode side terminal 22p and the negative electrode side terminal 22n, which are the power supply terminal 22, are increased so as to enlarge the cross-sectional areas. It is thereby possible to reduce the parasitic inductance of the power supply terminal 22 and furthermore the surge voltage. The parasitic inductance of the output terminal 23 does not affect the surge voltage.

As a modification shown in FIG. 7, the respective projecting portions of the positive electrode side terminal 22p and the negative electrode side terminal 22n may be thicker than the projecting portion of the output terminal 23 so as to enlarge the cross-sectional areas. In FIG. 7, the width of the projecting portion of the power supply terminal 22 and the width of the projecting portion of the output terminal 23 are substantially equal to each other. The cross-sectional areas may be made different by adjusting both the width and the plate thickness.

A configuration of not including the bus bar 26 may be adopted. A configuration in which the positive electrode side terminal 22p is disposed in the middle and the negative electrode side terminal 22n is disposed at the end may be adopted.

Third Embodiment

The present embodiment can refer to the preceding embodiments. Therefore, the descriptions of the same parts in the semiconductor module 10 and the power conversion device 1 shown in the preceding embodiments are omitted.

In the present embodiment, as shown in FIG. 8, among the positive electrode side terminal 22p and the negative electrode side terminal 22n, which are the power supply terminal 22, the width of the projecting portion of the negative electrode side terminal 22n disposed in the middle is greater than the width of the projecting portion of the positive electrode side terminal 22p disposed at the end. On the other hand, the thickness of the projecting portion of the negative electrode side terminal 22n and the thickness of the projecting portion of the positive electrode side terminal 22p are substantially equal to each other. Thus, the cross-sectional area of the projecting portion of the negative electrode side terminal 22n is larger than the cross-sectional area of the projecting portion of the positive electrode side terminal 22p.

Thus, in the present embodiment, of the two adjacent power supply terminals 22, the width of the projecting portion of the negative electrode side terminal 22n disposed in the middle is is increased so as to enlarge the cross-sectional area. As such, the balance of the total parasitic inductance of the power supply terminal 22 and the bus bar 26 can be adjusted between the positive electrode side and the negative electrode side, and preferably, a substantially equal inductance can be obtained. Therefore, the surge stresses of the IGBTs 11H, 11L constituting the upper and lower arms can be closer to each other, and preferably substantially equal to each other. In such a case, for example, the specifications of the drive circuit and the heat dissipation structure can be matched between the IGBTs 11H and 11L.

Although not shown, the projecting portion of the negative electrode side terminal 22n may be thicker than the projecting portion of the positive electrode side terminal 22p so as to enlarge the cross-sectional area.

A configuration of not including the bus bar 26 may be adopted. A configuration in which the positive electrode side terminal 22p in the middle and the negative electrode side terminal 22n is disposed at the end may be adopted.

Fourth Embodiment

The present embodiment can refer to the preceding embodiments. Therefore, the descriptions of the same parts in the semiconductor module 10 and the power conversion device 1 shown in the preceding embodiments are omitted.

In the present embodiment, as shown in FIG. 9, the semiconductor module 10 includes the positive electrode side bus bar 26p and the negative electrode side bus bar 26n, Further, the negative electrode side bus bar 26n connecting to the negative electrode side terminal 22n disposed in the middle is thicker than the positive electrode side bus bar 26p connecting to the positive electrode side terminal 22p disposed at the end. On the other hand, the width of the negative electrode side bus bar 26n and the width of the positive electrode side bus bar 26p are substantially equal to each other. Thus, the cross-sectional area of the negative electrode side bus bar 26n is larger than the cross-sectional area of the positive electrode side bus bar 26p. The cross-sectional area is an area orthogonal to the extension direction. The width is a length (dimension) in a direction orthogonal to both the extension direction and the thickness direction, that is, in the Z direction.

Thus, the thickness of the negative electrode side bus bar 26n, of the bus bar 26, connecting to the negative electrode side terminal 22n in the middle is increased so as to enlarge the cross-sectional area. Thus, as in the third embodiment, the balance of the total parasitic inductance of the power supply terminal 22 and the bus bar 26 can be adjusted between the positive electrode side and the negative electrode side, and preferably, a substantially equal inductance can be obtained. Therefore, the surge stresses of the IGBTs 11H, 11L constituting the upper and lower arms can be closer to each other, and preferably substantially equal to each other.

Although not shown, the width of the negative electrode side bus bar 26n may be increased so as to enlarge the cross-sectional area. In a configuration in which the positive electrode side terminal 22p is disposed in the middle and the negative electrode side terminal 22n is disposed at the end, the cross-sectional area of the positive electrode side bus bar 26p may be larger than that of the negative electrode side bus bar 26n.

Fifth Embodiment

The present embodiment can refer to the preceding embodiments. Therefore, the descriptions of the same parts in the semiconductor module 10 and the power conversion device 1 shown in the preceding embodiments are omitted.

In the present embodiment, as shown in FIG. 10, a notch 27 is formed in the projecting portion of the positive electrode side terminal 22p which is the power supply terminal 22 disposed at the end opposite to the output terminal 23. The notch 27 penetrates the positive electrode side terminal 22p in the plate thickness direction. The notch 27 is formed at each end of the projecting portion of the positive electrode side terminal 22p, the end extending in the Y direction. That is, the projecting portion of the positive electrode side terminal 22p has the notches 27 at both ends in the X direction which is the width direction. In the positive electrode side terminal 22p, a part where the notches 27 are formed is narrower than a part where the notches 27 are not formed. The notch 27 corresponds to a first notch.

Since the positive electrode side terminal 22p has the notch 27, the spring property of the positive electrode side terminal 22p increases. It is possible to relieve stress such as vibration during vehicle traveling by the spring deformation of the positive electrode side terminal 22p while shortening the length of the positive electrode side terminal 22p to suppress the bypass. Therefore, it is possible to improve connection reliability between the positive electrode side terminal 22p and the positive electrode side bus bar 26p.

If the positive electrode side terminal 22p has a bent portion so as to enhance the spring property, the projection length of the positive electrode side terminal 22p is increased, which increases the parasitic inductance. On the other hand, in the present embodiment, the spring property is enhanced by the notch 27. Therefore, as compared with the case of having the bent portion it is possible to improve the connection reliability while suppressing the increase of the parasitic inductance.

Further, in the present embodiment, a notch 28 is formed in the projecting portion of the negative electrode side terminal 22n which is the power supply terminal 22 disposed in the middle. The notch 28 penetrates the negative electrode side terminal 22n in the plate thickness direction. The notch 28 is formed at each end of the negative electrode side terminal 22n extending in the Y direction. That is, the projecting portion of the positive electrode side terminal 22p has the notches 28 at both ends in the X direction which is the width direction. In the negative electrode side terminal 22n, a part where the notches 28 are formed is narrower than a part where the notches 28 are not formed. The notch 28 corresponds to a second notch.

Since the negative electrode side terminal 22n has the notch 28, the spring property of the negative electrode side terminal 22n enhances. It is possible to relieve stress such as vibration by the spring deformation of the negative electrode side terminal 22n while shortening the projection length in comparison with the output terminal 23 to reduce the parasitic inductance. Therefore, it is possible to improve connection reliability between the negative electrode side terminal 22n and the negative electrode side bus bar 26n.

If the negative terminal side terminal 22n has a bent portion so as to enhance the spring property, the projection length of the negative electrode side terminal 22n increases. As a result, the parasitic inductance increases. On the other hand, in the present embodiment, the spring property is enhanced by the notch 28. Therefore, as compared with the case of having the bent portion, it is possible to improve the connection reliability while suppressing the increase of the parasitic inductance.

Further, in the present embodiment, the output terminal 23 having the longest projection length also has a notch 29. The notch 29 penetrates the output terminal 23 in the plate thickness direction. The notch 29 is formed at each end of the projecting portion of the output terminal 23 extending in the Y direction. That is, the projecting portion of the positive electrode side terminal 22p has the notches 29 at both ends in the X direction which is the width direction. In the output terminal 23, a part where the notches 29 are formed is narrower than a part where the notches 29 are not formed. Further, the projecting portion of the output terminal 23 has a bent portion 30 at the narrow part. The bent portion 30 has substantially a semicircle shape, as shown in FIG. 11.

Since the projecting portion of the output terminal 23 has the bent portion 30, the spring property of the output terminal 23 enhances, and relieves stress such as vibration. Therefore, it is possible to improve the connection reliability of a connection part between a bus bar (not shown) constituting the output line 8 and the output terminal 23.

Even though the projection length of the output terminal 23 is increased by providing the bent portion 30, the surge voltage is not affected. By providing the bent portion 30, it is possible to enhance the spring property, in comparison with the notch. Particularly, in the present embodiment, the bent portion 30 is provided at the part narrowed by the notch 29; therefore, the spring property can be further enhanced. However, a configuration of not having the notch 29 and having only the bent part 30 may be adopted.

In the present embodiment, the power supply terminal 22 has the notches 27 and 28 and the output terminal 23 has the notches 29 and the bent portion 30. However, the present disclosure is not limited to such configurations. In the present embodiment, the semiconductor module 10 has the notch 27 at least, rather than the notches 28, 29 and the bent portion 30. Preferably, the semiconductor module 10 has the notches 27, 28. More preferably, the semiconductor module 10 has the notches 27, 28 and the bent portion 30.

While the present disclosure has been described with reference to embodiments thereof, it is to be understood that the disclosure is not limited to the embodiments and constructions. The present disclosure is intended to cover various modification and equivalent arrangements. In addition, while the various combinations and configurations, other combinations and configurations, including more, less or only a single element, are also within the spirit and scope of the present disclosure.

In the embodiments described hereinabove, the IGBT 11H and the FWD 12H are exemplarily formed on the same chip and the IGBT 11L and the FWD 12L are exemplarily formed on the same chip. However, the present disclosure is not limited to such configurations. The IGBT 11H and the FWD 12H may be formed on different chips. Likewise, the IGBT 11L and the FWD 12L may be formed on different chips.

In the embodiments described hereinabove, the semiconductor module 10 exemplarily has the terminals 16. However, the present disclosure is not limited to such configurations. The semiconductor module 10 may not have the terminals 16.

In the embodiments described hereinabove, the heat dissipation surfaces 14a, 18a are exemplarily exposed from the corresponding sealing resin body 13. However, the present disclosure is not limited to such a configuration. A configuration in which the heat dissipation surfaces 14a, 18a are not exposed may be adopted.

The semiconductor elements of the upper and lower arms are not limited to the IGBT. For example, the MOSFET can be adopted.

In the embodiments described hereinabove, as an example, one upper arm includes one IGBT and one lower arm includes one IGBT. However, the present disclosure is not limited to such configurations. For example, each arm may include a plurality of semiconductor elements connected in parallel.

Claims

1. A semiconductor module comprising:

a plurality of semiconductor elements that constitute upper and lower arms;
a sealing resin body that seals the plurality of semiconductor elements;
a first power supply terminal and a second power supply terminal, each of the first power supply terminal and the second power supply terminal being connected to any of the plurality of semiconductor elements and projecting from the sealing resin body, the first power supply terminal being one of a positive electrode side terminal and a negative electrode side terminal, the second power supply terminal being the other of the positive electrode side terminal and the negative electrode side terminal; and
an output terminal that is connected to any of the plurality of semiconductor elements and projects from the sealing resin body, wherein
the first power supply terminal, the second power supply terminal, and the output terminal project from a same surface of the sealing resin body, and projecting portions of the first power supply terminal, the second power supply terminal, and the output terminal are arranged next to each other in an arrangement direction so that the projecting portion of the output terminal is located at a first end, the projecting portion of the first power supply terminal is located at a second end opposite to the first end, and the projecting portion of the second power supply terminal is located between the projecting portion of the first power supply terminal and the projecting portion of the output terminal,
a projection length of the projecting portion of the first power supply terminal is shorter than a projection length of the projecting portion of the second power supply terminal, and
at least one of the projecting portion of the first power supply terminal and the projecting portion of the second power supply terminal has a notch, whereas the projecting portion of the output terminal does not have the notch.

2. The semiconductor module according to claim 1, wherein

the projecting portion of the first power supply terminal has the notch.

3. The semiconductor module according to claim 2, wherein

the projecting portion of the output terminal has a projection length greater than the projecting portions of the first power supply terminal and the second power supply terminal,
the projecting portion of the first power supply terminal has the notch as a first notch, and
the projecting portion of the second power supply terminal has a second notch.

4. The semiconductor module according to claim 3, wherein

out of the first power supply terminal, the second power supply terminal and the output terminal, only the output terminal has a bent portion in the projecting portion thereof.

5. The semiconductor module according to claim 1, wherein

the projecting portions of the first power supply terminal, the second power supply terminal and the output terminal have equal widths and equal thicknesses to each other.

6. The semiconductor module according to claim 1, wherein

each of the projecting portion of the first power supply terminal and the projecting portion of the second power supply terminal has a cross-sectional area greater than the projecting portion of the output terminal, the cross-sectional area being defined in a direction orthogonal to a projecting direction of the projecting portion.

7. The semiconductor module according to claim 1, wherein

the projecting portion of the second power supply terminal has a cross-sectional area greater than the projecting potion of the first power supply terminal, the cross-sectional area being defined in a direction orthogonal to a projecting direction of the projecting portion of the second power supply terminal.

8. The semiconductor module according to claim 1, further comprising

a first bus bar connecting to the projecting portion of the first power supply terminal; and
a second bus bar connecting to the projecting portion of the second power supply terminal, wherein
the first bus bar and the second bus bar extend in the arrangement direction, and face each other in respective plate thickness directions.

9. The semiconductor module according to claim 8, wherein

the second bus bar has a cross-sectional area greater than the first bus bar, the cross-sectional area being defined in a direction orthogonal to an extension direction of the second bus bar.
Patent History
Publication number: 20200211954
Type: Application
Filed: Mar 10, 2020
Publication Date: Jul 2, 2020
Inventors: Tomoo IWADE (Kariya-city), Daisuke FUKUOKA (Kariya-city)
Application Number: 16/814,260
Classifications
International Classification: H01L 23/50 (20060101); H01L 23/52 (20060101); H01L 23/495 (20060101); H01L 23/00 (20060101); H01L 25/07 (20060101); H01L 25/18 (20060101); H02M 7/00 (20060101);