VOLTAGE SENSING OF AN ACTIVE CLAMP SWITCHING POWER CONVERTER CIRCUIT

Abstract

An active clamp switching power converter circuit includes a sensing circuit that generates a sensed auxiliary winding voltage of an auxiliary winding around the core. A primary side controller controls switching of a power switch coupled to a primary winding to control current through the primary winding and controls switching of the active clamp switch based on the sensed voltage to control leakage energy when the power switch is turned off. The primary side controller regulates timing of the switching to achieve a zero voltage switching condition prior to turning on the power switch for power efficient operation.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a continuation application of co-pending U.S. patent application Ser. No. 16/826,132, filed Mar. 20, 2020, which is incorporated by reference herein in its entirety.

BACKGROUND

The present disclosure relates generally to a switching power converter circuit, and more specifically, to an active clamp switching power converter that uses sensing of an auxiliary winding.

An active clamp switching power converter circuit regulates power delivered to a load by controlling switching of a power switch and reduces power loss by controlling switching of an active clamp switch. However, a challenge exists in controlling timing of the switching for power efficient operation in a manner that does not depend on complex external circuits or high voltage components.

SUMMARY

A switching power converter circuit comprises a transformer coupled between an input terminal receiving an input voltage and an output terminal supplying an output voltage. The transformer includes a core, a primary winding around the core coupled to the input terminal, and a secondary winding around the core coupled to the output terminal. The switching power converter circuit further comprises a sensing circuit comprising an auxiliary winding around the core of the transformer. The sensing circuit generates a sensed voltage based on an auxiliary winding voltage across the auxiliary winding. The switching power converter circuit also comprises a power switch coupled to the primary winding of the transformer that controls current through the primary winding. The switching power converter circuit further comprises an active clamp switch to control leakage energy of the switching power converter when the power switch is turned off. The switching power converter circuit further comprises a secondary side switch to control secondary side current through the secondary winding. A secondary side controller controls switching of the secondary side switch. A primary side controller controls switching of the power switch to regulate the output voltage and controls switching of the active clamp switch to turn on the active clamp switch following the power switch turning off and to turn off the active clamp switch based on detected timing of a voltage drop occurring in the sensed voltage satisfying a predefined detection condition.

In another embodiment, a method is provided for controlling the switching power converter. In a first switching cycle, a primary side controller detects a sensed voltage value that is based on an auxiliary winding voltage across an auxiliary winding of a transformer. In the first switching cycle, the controller detects a time interval between the active clamp switch being turned on and the voltage drop in the sensed voltage satisfying a predefined detection condition. In a subsequent switching cycle, the controller controls a turn-off time of the active clamp switch relative to the turn-on time of the active clamp switch such that timing of the voltage drop in the sensed voltage satisfying the predefined detection condition in the subsequent switching cycle is closer to a target timing. The power switch is turned on a substantially fixed time period after the active clamp switch is turned off.

BRIEF DESCRIPTION OF DRAWINGS

The teachings of the embodiments of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings.

Figure (FIG. 1 illustrates a switching power converter circuit, according to one embodiment.

FIG. 2A illustrates a primary side of a switching power converter circuit during a first stage of operation of one switching cycle with leakage inductance, magnetizing inductance, and parasitic capacitance modeled as circuit elements, according to one embodiment.

FIG. 2B illustrates the primary side of the switching power converter circuit during a second stage of operation of one switching cycle with leakage inductance, magnetizing inductance, and parasitic capacitance modeled as circuit elements, according to one embodiment.

FIG. 2C illustrates the primary side of the switching power converter circuit during a third and fourth stage of operation of one switching cycle with leakage inductance, magnetizing inductance, and parasitic capacitance modeled as circuit elements, according to one embodiment.

FIG. 2D illustrates the primary side of the switching power converter circuit during a fifth stage of operation of one switching cycle with leakage inductance, magnetizing inductance, and parasitic capacitance modeled as circuit elements, according to one embodiment.

FIG. 3 illustrates waveforms representing operation of a switching power converter circuit, according to one embodiment.

The features and advantages described in the specification are not all inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and may not have been selected to delineate or circumscribe the inventive subject matter.

DETAILED DESCRIPTION OF EMBODIMENTS

The Figures (FIG.) and the following description relate to the preferred embodiments of the present invention by way of illustration only. It should be noted that from the following discussion, alternative embodiments of the structures and methods disclosed herein will be readily recognized as viable alternatives that may be employed without departing from the principles of the present disclosure.

Reference will now be made in detail to several embodiments of the present invention(s), examples of which are illustrated in the accompanying figures. It is noted that wherever practicable similar or like reference numbers may be used in the figures and may indicate similar or like functionality. The figures depict embodiments of the present invention for purposes of illustration only. One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles of the disclosure described herein.

Figure (FIG. 1 illustrates a switching power converter circuit 100 in accordance with one embodiment. The switching power converter circuit 100 generates a regulated output voltage Vout to power a load (e.g., an electronic device (not shown)). In an embodiment, the switching power converter circuit 100 includes an active clamp flyback circuit in which leakage energy is recycled to reduce power loss relative to a conventional flyback circuit. The switching power converter circuit 100 may furthermore generate feedback signals for controlling timing of switching for efficient power operation of the switching power converter circuit 100 and to ensure switching occurs shortly after a zero voltage switching (ZVS) condition is achieved.

In an embodiment, the switching power converter circuit 100 includes a transformer T1, a power switch S1, an active clamp switch S2, a clamping capacitor Cc, a sensing circuit 120, a primary side controller 110, an output filter capacitor C1, a current sensor 140, a secondary side switch S3, and a secondary side controller 150.

The transformer T1 is coupled between an input terminal receiving an input voltage Vin (e.g., a rectified AC voltage) and an output terminal supplying the output voltage Vout to the load. The transformer T1 includes a magnetic core. On a primary side 115 of the switching power converter circuit 100, a primary winding Np has a first polarity and wraps around the core of the transformer T1 in a first direction. The primary winding Np is coupled to the input terminal at a first end of the primary winding Np. On a secondary side 145 of the switching power converter circuit 100, a secondary winding Ns has a second polarity (different than the first polarity) and wraps around the core of the transformer T1 in a second direction (different than the first direction). The secondary winding Ns is coupled to the output terminal.

The power switch S1 is coupled to the primary winding Np of the transformer T1 at a second end of the winding Np such that a voltage Vx is across the power switch S1. The power switch S1 may be a transistor such as a MOSFET, a bipolar junction transistor, or some other type of switch. The power switch S1 is configured to control the primary current Ip through the primary winding Np by enabling the primary current Ip to flow from the input voltage Vin through the primary winding Np to ground when the power switch S1 is on, and by preventing the primary current Ip from flowing to ground when the power switch S1 is off.

When the power switch S1 is off, some energy stored in the leakage inductance of the transformer causes energy loss. The active clamp switch S2 controls the flow of this leakage energy when the power switch S1 is turned off to recycle leakage energy back to the primary winding Np and reduce power loss. The active clamp switch S2 couples between the second end of the primary winding Np (at voltage node Vx) and the input voltage Vin through the clamping capacitor Cc. The active clamp switch S2 may be a transistor such as a MOSFET, a bipolar junction transistor, or some other type of switch.

The secondary side controller 150 controls switching of the secondary side switch S3. Particularly, the secondary side controller 150 controls switching of the secondary side switch S3 so that the secondary side switch S3 turns on after a voltage V_S3 across the secondary side switch begins to decrease below zero. The secondary side controller 150 turns off the secondary side switch S3 when a secondary side current Is decreases to zero (or is within a predefined range of zero). The secondary side controller 150 detects the voltage V_S3 and detects the secondary side current Is via the current sensor 140. In one embodiment, the current sensor 140 sends a signal to the secondary side controller 150 when the secondary side current Is is within a predefined range of zero.

The sensing circuit 120 includes an auxiliary winding Na that wraps around the core of the transformer T1, a control supply capacitor C2, a clamping diode D2, and a detection circuit 130. The auxiliary winding Na is wrapped around the core of the transformer T1 in a same direction and has the same polarity as the secondary winding Ns. The sensing circuit 120 is connected to a collector supply voltage Vcc at a collector supply terminal with a positive terminal Vcc+ and a negative terminal Vcc−. The clamping diode D2 is coupled between the positive terminal Vcc+ of the supply terminal between and one end of the auxiliary winding Na to clamp the sensed voltage V_sense to the negative terminal Vcc− voltage when the change in current through the auxiliary winding is sufficiently high for the clamping diode D2 to become forward biased. The sensed voltage V_sense represents the voltage across the auxiliary winding Na. The sensed voltage V_sense is monitored by the detection circuit 130. In one embodiment, the detection circuit 130 may include a high pass filter. The detection circuit 130 monitors the sensed voltage V_sense and provides a detection signal to the primary side controller 110 when the sensed voltage V_sense satisfies a predefined detection condition indicative of the secondary side switch S3 turning off. For example, the predefined detection condition may be satisfied when the sensed voltage V_sense experiences a voltage drop of at least a predefined amount over a predefined time interval during a period when the power switch S1 is turned off and the active clamp switch S2 is turned on. The predefined amount of voltage drop may be dependent on the circuit design characteristics. For instance, an amount of leakage inductance and magnetizing inductance found on the primary side 115 may affect the amount of the voltage drop. In some embodiments, the predefined amount of voltage drop may be between 3 and 4 volts. In some embodiments, the predefined time interval over which the voltage drop takes place may be between 100 nanoseconds (ns) to 400 ns. The predefined detection condition occurs and the secondary side switch S3 turns off a substantially fixed time period before the ZVS condition occurs. Thus, by detecting this voltage drop at the primary side controller, a timing of the ZVS condition can be predicted and switching of power switch S1 and active clamp switch S2 may be controlled accordingly.

The primary side controller 110 controls switching of the power switch S1 and controls switching of the active clamp switch S2. Particularly, the primary side controller 110 controls switching of the power switch S1 so that the power switch S1 has on-times and off-times appropriate to maintain a regulated output voltage Vout. Furthermore, the primary side controller 110 controls switching of the active clamp switch S2 so that it has an on-time during the off-time of the power switch S1 (i.e., so that the on-times of the power switch S1 and the active clamp switch S2 are non-overlapping), to enable recycling of the leakage energy when the power switch S1 is turned off. The primary side controller 110 furthermore controls the relative timings of the on-times and off-times of the active clamp switch S2 and the power switch S1 to enable the power switch S1 to turn on in each switching cycle a short time after a ZVS condition is achieved (i.e., the voltage Vx=0), which enables power efficient switching. The primary side controller 110 achieves these switching conditions by receiving the detection signals from the detection circuit 130 indicative of the ZVS condition and controlling switching accordingly as described in further detail below with reference to FIG. 3.

FIGS. 2A-2D illustrate a model of a primary side 115 of a switching power converter circuit (e.g., the switching power converter circuit 100) during different stages of a switching cycle with leakage inductance, magnetizing inductance, and parasitic capacitance modeled as circuit elements, according to one embodiment. In the models 200, 202, 204, 206 the leakage inductance of the primary winding Np is modeled as an inductor Lr, the magnetizing inductance is modeled as an inductor Lm, a drain-source parasitic capacitance of the power switch S1 is modeled as a capacitor Coss1, a body diode of the power switch S1 is modeled as BD1, a drain-source parasitic capacitance of the active clamp switch S2 is modeled as a capacitor Coss2, and a body diode of the active clamp switch S2 is modeled as BD2. These models 200, 202, 204, 206 will be referenced in describing the operation of the switching power converter circuit 100 below.

FIGS. 2A-D will be described together with FIG. 3, which provides waveforms illustrating the operation of the switching power converter circuit 100 of FIG. 1 in accordance with the primary side models of FIGS. 2A-2D. Five time frames (T1, T2, T3, T4, and T5) are illustrated that collectively make up one switching cycle. The time frames are not necessarily fixed and some of the time frames may vary between cycles.

During time frame T1, Vg1 has a high value (i.e., the power switch S1 is turned on), Vg2 has a low value (i.e., the active clamp switch S2 is turned off), and Vg3 has a low value (i.e., the secondary side switch S3 is turned off). Operation of the switching power converter circuit 100 during time frame T1 is illustrated by the primary side model 200 in FIG. 2A. In this time frame T1, the BD1 of the power switch S1 stops conduction as a result of the voltage Vx across the power switch S1 being substantially zero (coupled to ground). The voltage across the primary winding Np (i.e., the voltage Vp) is the input voltage Vin, which causes energy to be stored in the primary winding Np and the primary winding primary current Ip to increase. The primary current Ip is equal to a leakage inductance current I_Lr and equal to a magnetizing inductance current I_Lm (i.e., Ip=I_Lr=I_Lm). The leakage inductance current I_Lr and the magnetizing inductance current I_Lm increase linearly with a slope dependent on the input voltage Vin as described in the following equation:

$\begin{array}{cc}ip\left(t\right)=ip\left(t_0\right)+\frac{Vin}{L_m\left(1+\beta \right)}\left(t_1\right)& \left(1\right)\\ \beta =\frac{L_r}{L_m}& \left(2\right)\end{array}$

where t₀ is a starting time of time frame T1 and t₁ is an end time of time frame T1. The voltage across the secondary winding Ns (i.e., the voltage Vs) is zero, blocking the transfer of energy to the load. In this state, energy is supplied to the load via the output filter capacitor C1. The auxiliary winding voltage Va is proportional to the secondary winding voltage Vs, and is therefore zero, which means the sensed voltage V_sense is also zero.

During time frame T2, Vg1 has a low value (i.e., the power switch S1 is turned off), Vg2 has a low value (i.e., the active clamp switch S2 is turned off), and Vg3 transitions from a low value to a high value (i.e., the secondary side switch S3 turns on). Operation of the switching power converter circuit 100 during this time frame T2 is illustrated by the primary side model 202 in FIG. 2B. The primary current Ip charges up the capacitor Coss1 of the power switch S1 (approximately linearly). Following the secondary side switch S3 turning on when V_S3 drops below ground, the energy stored in transformer T1 is transferred to the load and the secondary side current Is re-charges the output filter capacitor C1.

During time frame T3, Vg1 has a low value (i.e., the power switch S1 is turned off), Vg2 has a high value (i.e., the active clamp switch S2 is turned on), and Vg3 has a high value (i.e., the secondary side switch S3 is turned on). Operation of the switching power converter circuit 100 during this time frame T3 is represented by the primary side model 204 in FIG. 2C. At the start of time frame T3, the voltage Vx across the power switch S1 is the sum of the input voltage Vin and a voltage across the clamping capacitor Cc and the body diode BD2 of the active clamp switch S2 starts to conduct. The inductor Lm and the inductor Lr resonate with both the clamping capacitor Cc and the capacitor Coss2 of the active clamp switch S2 until the secondary winding voltage Vs is greater than the output voltage Vout. During the time frame T3, the magnetizing inductance current km at a time t decreases linearly transferring energy to the output as described by the following equation:

$\begin{array}{cc}iLm\left(t\right)=iLm\left(t_2\right)-\frac{NVout}{Lm}\left(t-t_2\right)& \left(3\right)\end{array}$

where t₂ is a starting time of time frame T3, t is a time during time frame T3, and NVout is a reflected voltage with N representing a turn ratio (i.e., Np/Ns) between the primary winding Np and the secondary winding Ns. With the inductor Lr and the clamping capacitor Cc resonating during the transformer T1 reset, the leakage inductance current I_Lr is described by the following equations:

$\begin{array}{cc}{i}_{\mathrm{Lr}}\left(t\right)=A_2·\sin \left({\omega }_{2}t+{\phi }_2\right)& \left(4\right)\\ A_2=\sqrt{{\left(i_{\mathrm{Lr}}\left(t_3\right)\right)}^2+{\left(\frac{\left(\mathrm{NVout}\right)\beta }{Z_2}\right)}^2}& \left(5\right)\\ Z_2=\sqrt{\frac{Lr}{Cc+Coss1}}& \left(6\right)\\ {\omega }_2=\frac{1}{\sqrt{\left(Cc+C\mathrm{oss}1\right)·\mathrm{Lr}}}& \left(7\right)\\ \mathrm{tg}\left({\phi }_2\right)=\frac{Z_2·i_{\mathrm{Lr}}}{-\mathrm{NVout}·\beta }& \left(8\right)\end{array}$

where t is a time during time frame T3, t3 is an end time of time frame T3, tg is a phase shift time for a resonant frequency, and φ₂ is a phase difference. The primary current Ip is equal to the leakage inductance current I_Lr. The leakage inductance current I_Lr charges the clamping capacitor Cc coupled between the active clamp switch S2 and the primary winding Np.

During time frame T4, Vg1 has a low value (i.e., the power switch S1 is turned off), Vg2 has a high value (i.e., the active clamp switch S2 is turned on), and Vg3 has a low value (i.e., the secondary side switch is turned off). Still referring to the primary side model of FIG. 2C, at t3, the leakage inductance current I_Lr and the magnetizing inductance current I_Lm have equal and opposite current slope directions. After t3, the voltage across the inductor Lr is affected by only the magnetizing inductance current I_Lm. This results in a voltage drop of the sensed voltage V_sense and a voltage drop of the secondary winding voltage Vs. The voltage Vx across the power switch S1 remains at a level exceeding the input voltage Vin. Here, the voltage Vx is the sum of the input voltage Vin and a voltage across the clamping capacitor Cc where the voltage across the clamping capacitor Cc substantially equals the voltage NVout across the primary winding. The voltage across the inductor Lm is described by the following equation:

$\begin{array}{cc}{V}_{Lm}=V_{Cc}·V_{\mathrm{Lr}}=\mathrm{Lr}·\frac{d}{dt}iLm\left(t\right)& \left(9\right)\end{array}$

where V_Cc is the voltage across the clamping capacitor and V_Lr is the voltage across the inductor Lr.

During time frame T5, Vg1 has a low value (i.e., the power switch S1 is turned off), Vg2 has a low value (i.e., the active clamp switch S2 is turned off), and Vg3 has a low value (i.e., the secondary side switch is turned off). Operation of the switching power converter circuit 100 during this time frame T5 is represented by the primary side model 206 in FIG. 2D. The leakage inductance current I_Lr and the magnetizing inductance current I_Lm charge up the capacitor Coss2 of the active clamp switch S2 until the voltage across the capacitor Coss2 is equal to the voltage across the clamping capacitor Cc. As a result, the voltage Vx decreases and equals the input voltage Vin when the voltage across the capacitor Coss2 equals the voltage across the clamping capacitor Cc. The leakage inductance current I_Lr and the magnetizing inductance current I_Lm discharge the capacitor Coss1 of the power switch S1. As a result, the voltage Vx continues to decrease to zero. The ZVS condition is achieved when Vx reaches substantially zero.

In an example control scheme, the primary side controller 110 may control when it turns off power switch S1 based on sensed values or a predefined timing scheme. In an embodiment, the primary side controller 110 determines to turn off the power switch S1 based on detecting when the primary current Ip reaches a threshold level. For example, the threshold level may be detected by measuring the voltage across a resistor (not shown) placed in between the source connection of the power switch S1 and ground. When the voltage across this resistor equals the threshold level, the power switch S1 is turned off. In another embodiment, the power switch S1 is turned off after a predetermined amount of time, which may be estimated to correspond to the amount of time for the primary current Ip to reach the threshold level. In another example control scheme, the primary side controller 110 controls when to turn on the power switch S1. For instance, the power switch S1 is turned on after a fixed time period after the active clamp switch S2 turns off. This fixed time period is denoted Tb in FIG. 3. In some embodiments, the time period Tb may be a fixed time period based on output capacitance circuit characteristics of the switching power converter circuit 100.

In another example control scheme, the primary side controller 110 controls the active clamp switch S2 to turn on a short time after the power switch S1 turns off in each switching cycle. For example, the primary side controller 110 may turn the active clamp switch S2 on after the voltage Vx across the power switch S1 ramps up to a level above the input voltage Vin, which may be detected by V_sense exceeding a predefined value based on circuit design characteristics. The primary side controller 110 adjusts the on-time of the active clamp switch S2 to turn off the active clamp switch S2 based on the timing of the voltage drop occurring in the sensed voltage V_sense satisfying the predefined detection condition in a previous switching cycle. To detect the predefined detection condition, the primary side controller 110 senses the sensed voltage V_sense after the active clamp switch S2 turns on (and before the power switch S1 turns back on). The primary side controller 110 may then compare the timing of the detected predefined detection condition relative to a target timing and adjust the timing of turning off the active clamp switch S2 in subsequent switching cycles so that the timing of the detected predefined detection condition occurring and the active clamp switch S2 turning off in the subsequent cycle is closer to the target timing.

In FIG. 3, time period Ta represents a time between detecting the secondary side switch S3 turning off and the active clamp switch S2 turning off. The substantially fixed time period Ta+Tb represents the time between the sensed voltage V_sense satisfying the predefined detection condition and the ZVS condition taking place. The substantially fixed time period Ta+Tb may be a fixed time period based on circuit characteristics of the switching power converter circuit 100. Under the described control scheme, the primary side controller 110 detects Ta or Tb (or both) in each switching cycle and adjusts the on-time of the active clamp switch S2 in subsequent switching cycles so as to maintain Tb (and correspondingly Ta since Ta+Tb is constant) within a predefined range of a target time period. As a result, the power switch S1 can be controlled to turn on after the ZVS condition is reached, thereby enabling efficient switching.

For example, in one control scheme, if the time Ta between the sensed voltage V_sense satisfying the predefined detection condition and the active clamp switch S2 turning off is above a target time period in a current switching cycle, then the turn-off time of the active clamp switch S2 is adjusted to turn off the active clamp switch S2 earlier in the next switching cycle (thus decreasing the on-time of the active clamp switch S2). If the time Ta between the sensed voltage V_sense satisfying the predefined detection condition and the active clamp switch S2 turning off is below the target time period in the current switching cycle, then the turn-off time of the active clamp switch S2 is adjusted to turn off the active clamp switch S2 later in the next switching cycle (thus increasing the on-time of the active clamp switch S2).

In an alternative control scheme that operates equivalently given the fixed value of Ta+Tb, the primary side controller 110 may adjust switching based on detecting the time Tb between the off-time of the active clamp switch S2 and the on-time of the power switch S1. For example, the primary side controller 110 adjusts the turn-off time of the active clamp switch S2 to occur later in the next switching cycle if the detected time Tb is greater than a target time period, and adjust the turn-off time of the active clamp switch S2 earlier in the next switching cycle if the detected time Tb is less than the target time period. In an efficient switching power converter circuit, the target time period for Tb is a fixed time period between the turn-off time of the active clamp switch S2 and the turn-on time of the power switch S1.

Upon reading this disclosure, those of skill in the art will appreciate still additional alternative embodiments through the disclosed principles herein. Thus, while particular embodiments and applications have been illustrated and described, it is to be understood that the disclosed embodiments are not limited to the precise construction and components disclosed herein. Various modifications, changes and variations, which will be apparent to those skilled in the art, may be made in the arrangement, operation and details of the method and apparatus disclosed herein without departing from the spirit and scope described herein.

Claims

1. A switching power converter circuit comprising:

a transformer coupled between an input terminal receiving an input voltage and an output terminal supplying an output voltage, the transformer including a core, a primary winding around the core coupled to the input terminal, and a secondary winding around the core coupled to the output terminal;

a power switch coupled to the primary winding, the power switch to control current through the primary winding;

an active clamp switch to control leakage energy of the switching power converter circuit while the power switch is turned off;

a sensing circuit to generate a detection signal, the sensing circuit comprising: an auxiliary winding around the core of the transformer, and a detection circuit coupled to the auxiliary winding, the detection circuit to receive sensed voltage across the auxiliary winding and generate the detection signal based on the sensed voltage satisfying a predefined detection condition, wherein the sensed voltage satisfies the predefined detection condition when the sensed voltage decreases by at least a predefined amount over a predefined time interval while the power switch is turned off and the active clamp switch is turned on; and

a primary side controller coupled to the power switch and the active clamp switch, the primary side controller to receive the detection signal and to control switching of the power switch to regulate the output voltage and to turn on the active clamp switch following the power switch turning off and to turn off the active clamp switch based on a timing of the detection signal.

2. The switching power converter circuit of claim 1, further comprising:

a secondary side switch to control current through the secondary winding;

a current sensor to monitor current through the secondary winding and to generate a signal based on the current decreasing to substantially zero; and

a secondary side controller coupled to the secondary side switch, the secondary side controller to receive the signal and to turn off the secondary side switch based on the signal.

3. The switching power converter circuit of claim 2, wherein the sensed voltage satisfies the predefined detection condition at a same time as the secondary side controller turns off the secondary side switch.

4. The switching power converter circuit of claim 3, wherein a zero voltage switching condition of the power switch takes place at a substantially fixed time period after the sensed voltage satisfies the predefined detection condition and the secondary side controller turns off the secondary side switch.

5. The switching power converter circuit of claim 1, wherein the timing of the detection signal is an amount of time between the primary side controller receiving the detection signal and the primary side controller turning off the active clamp switch.

6. The switching power converter circuit of claim 5, wherein, in a first switching cycle the timing is greater than a target timing and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch earlier thereby decreasing an amount of on-time of the active clamp switch such that the timing in the second switching cycle is closer to the target timing than in the first switching cycle.

7. The switching power converter circuit of claim 5, wherein, in a first switching cycle the timing is less than a target timing and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch later thereby increasing an amount of on-time of the active clamp switch such that the timing in the second switching cycle is closer to the target timing than in the first switching cycle.

8. The switching power converter circuit of claim 1, wherein the timing of the detection signal is an amount of time between the primary side controller receiving the detection signal and the primary side controller turning on the power switch in a first switching cycle, and wherein the timing includes a first amount of time between the primary side controller receiving the detection signal and the primary side controller turning off the active clamp switch and a second amount of time between the primary side controller turning off the active clamp switch and the primary side controller turning on the power switch.

9. The switching power converter circuit of claim 8, wherein, in the first switching cycle the second amount of time is greater than a target time period and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch later thereby increasing an amount of on-time of the active clamp switch such that the second amount of time in the second switching cycle is closer to the target time period than in the first switching cycle.

10. The switching power converter circuit of claim 8, wherein, in the first switching cycle, the second amount of time is less than a target time period and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch earlier thereby decreasing an amount of on-time of the active clamp switch such that the second amount of time in the second switching cycle is closer to the target time period than in the first switching cycle.

11. A control circuit for a switching power converter circuit, the control circuit comprising:

a detection circuit coupled to an auxiliary winding around a core of a transformer of the switching power converter circuit, the detection circuit to receive sensed voltage across the auxiliary winding and generate a detection signal based on the sensed voltage satisfying a predefined detection condition, wherein the sensed voltage satisfies the predefined detection condition when the sensed voltage decreases by at least a predefined amount over a predefined time interval while a power switch is turned off and an active clamp switch is turned on; and

a primary side controller coupled to the power switch and the active clamp switch, the primary side controller to receive the detection signal and to control switching of the power switch and to turn on the active clamp switch following the power switch turning off and to turn off the active clamp switch based on a timing of the detection signal.

12. The control circuit of claim 11, wherein the timing of the detection signal is an amount of time between the primary side controller receiving the detection signal and the primary side controller turning off the active clamp switch.

13. The control circuit of claim 12, wherein, in a first switching cycle the timing is greater than a target timing and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch earlier thereby decreasing an amount of on-time of the active clamp switch such that the timing in the second switching cycle is closer to the target timing than in the first switching cycle.

14. The control circuit of claim 12, wherein, in a first switching cycle the timing is less than a target timing and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch later thereby increasing an amount of on-time of the active clamp switch such that the timing in the second switching cycle is closer to the target timing than in the first switching cycle.

15. The control circuit of claim 11, wherein the timing of the detection signal is an amount of time between the primary side controller receiving the detection signal and the primary side controller turning on the power switch in a first switching cycle, and wherein the timing includes a first amount of time between the primary side controller receiving the detection signal and the primary side controller turning off the active clamp switch and a second amount of time between the primary side controller turning off the active clamp switch and the primary side controller turning on the power switch.

16. The control circuit of claim 15, wherein, in the first switching cycle the second amount of time is greater than a target time period and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch later thereby increasing an amount of on-time of the active clamp switch such that the second amount of time in the second switching cycle is closer to the target time period than in the first switching cycle.

17. The control circuit of claim 15, wherein, in the first switching cycle, the second amount of time is less than a target time period and, in a second switching cycle subsequent to the first switching cycle, the primary side controller turns off the active clamp switch earlier thereby decreasing an amount of on-time of the active clamp switch such that the second amount of time in the second switching cycle is closer to the target time period than in the first switching cycle.

18. A method for controlling a switching power converter circuit, the switching power converter circuit including a transformer coupled between an input terminal receiving an input voltage and an output terminal supplying an output voltage, the transformer including a core, a primary winding around the core coupled to the input terminal, a secondary winding around the core coupled to the output terminal, and an auxiliary winding around the core of the transformer, a power switch coupled to control current through the primary winding, an active clamp switch coupled to control leakage energy of the switching power converter circuit, a detection circuit coupled to the auxiliary winding, and a primary side controller to control switching of the power switch and the active clamp switch, the method comprising:

receiving, by the detection circuit, sensed voltage across the auxiliary winding;

generating, by the detection circuit, a detection signal based on the sensed voltage satisfying a predefined detection condition, wherein the sensed voltage satisfies the predefined detection condition when the sensed voltage decreases by at least a predefined amount over a predefined time interval while the power switch is turned off and the active clamp switch is turned on;

receiving, by the primary side controller, the detection signal; and

controlling, by the primary side controller, a turn-off time of the active clamp switch based on a timing of the detection signal.

19. The method of claim 18, wherein the timing of the detection signal is an amount of time between the primary side controller receiving the detection signal and the primary side controller turning off the active clamp switch.

20. The method of claim 18, wherein the timing of the detection signal is an amount of time between the primary side controller receiving the detection signal and the primary side controller turning on the power switch, and wherein the timing includes a first amount of time between the primary side controller receiving the detection signal and the primary side controller turning off the active clamp switch and a second amount of time between the primary side controller turning off the active clamp switch and the primary side controller turning on the power switch.