DRIVER CIRCUIT FOR AN ADDRESSABLE ARRAY OF OPTICAL EMITTERS

Abstract

In some implementations, a driver circuit may include a source to provide an electrical input, and an array of optical emitters arranged in one or more rows and one or more columns. The array may include an optical emitter associated with a row and a column. The driver circuit may include a first switch having an open state and a closed state, and an inductive element connected to the row. The first switch in the closed state may cause current to charge the inductive element. The driver circuit may include a second switch having an open state and a closed state. The second switch in the closed state may select the column. The first switch transitioning from the closed state to the open state may cause the inductive element to discharge current through the row, and through the column when the second switch is in the closed state.

Description

CROSS-REFERENCE TO RELATED APPLICATION

This Patent Application claims priority to U.S. Provisional Patent Application No. 63/200,673, filed on Mar. 22, 2021, and entitled “TWO-DIMENSIONAL ADDRESSABLE LASER MATRIX DRIVING ARCHITECTURE,” and to U.S. Provisional Patent Application No. 63/201,137, filed on Apr. 14, 2021, and entitled “TWO-DIMENSIONAL ADDRESSABLE LASER MATRIX DRIVING ARCHITECTURE.” The disclosures of the prior Applications are considered part of and are incorporated by reference into this Patent Application.

TECHNICAL FIELD

The present disclosure relates generally to an addressable array of optical emitters and to a driver circuit for an addressable array of optical emitters.

BACKGROUND

Light detection and ranging (LIDAR) systems, such as time-of-flight (ToF)-based measurement systems, emit optical pulses, detect reflected optical pulses, and determine distances to objects by measuring delays between the emitted optical pulses and the reflected optical pulses.

SUMMARY

In some implementations, a driver circuit includes a source to provide an electrical input; an array of optical emitters arranged in one or more rows and one or more columns, wherein the array of optical emitters includes an optical emitter associated with a row of the one or more rows and a column of the one or more columns; a first switch having an open state and a closed state; an inductive element connected to the row, wherein the first switch in the closed state is to cause current to charge the inductive element; and a second switch having an open state and a closed state, wherein the second switch in the closed state is to select the column, and wherein the first switch transitioning from the closed state to the open state is to cause the inductive element to discharge current through the row, and through the column when the second switch is in the closed state, to provide an electrical pulse to the optical emitter associated with the row and the column.

In some implementations, a controller for an array of optical emitters arranged in a plurality of rows and a plurality of columns includes a plurality of inductive elements respectively connected to the plurality of rows; a plurality of first switches respectively connected to the plurality of inductive elements, wherein the plurality of first switches have an open state and a closed state, and wherein a first switch, of the plurality of first switches, in the closed state is to cause current to charge an inductive element, of the plurality of inductive elements, for a row of the plurality of rows; and a plurality of second switches respectively connected to the plurality of columns, wherein the plurality of second switches have an open state and a closed state, and wherein a second switch, of the plurality of second switches, in the closed state is to select a column of the plurality of columns.

In some implementations, an optical source includes an array of optical emitters arranged in one or more rows and one or more columns; and a driver circuit, comprising: one or more inductive elements respectively connected to the one or more rows, where the one or more inductive elements are configured to discharge current through respective rows of the one or more rows; and one or more switches respectively connected to the one or more columns, wherein the one or more switches have an open state and a closed state, and wherein a switch, of the one or more switches, in the closed state is to select a column of the one or more columns.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of an example driver circuit architecture described herein.

FIG. 2 is a diagram of an example driver circuit described herein.

FIG. 3 is a diagram of an example graph plotting electrical signals associated with an example driver circuit described herein.

DETAILED DESCRIPTION

The following detailed description of example implementations refers to the accompanying drawings. The same reference numbers in different drawings may identify the same or similar elements.

LIDAR systems, such as ToF-based measurement systems (e.g., a direct ToF LIDAR system), require high power optical pulses of short duration (e.g., 10 nanoseconds (ns) or less). High power optical pulses may enable greater distance range finding. Shorter duration optical pulses may enable improved resolution. For a laser-based optical load (e.g., a laser diode, a semiconductor laser diode, a vertical-cavity surface-emitting laser (VCSEL), or the like), a higher electrical current across the optical load corresponds to a higher power optical pulse. As noted, ToF-based measurement systems may determine distances to objects by measuring delays between an emitted optical pulse and a reflected optical pulse. Emitting pulses having a well-defined origin in time and rectangular shape simplifies the measurements. To achieve such a rectangular shape, emitted optical pulses should have short rise times (e.g., a time during which power of the optical pulse is rising from zero or near zero to peak power) and short fall times (e.g., a time during which power of the optical pulse is falling from peak power to zero or near zero).

A circuit for driving an optical load is a set of electronic components interconnected by current-carrying conductors (e.g., traces). Any of the electronic components and conductors may have parasitic elements (e.g., a parasitic inductance, a parasitic resistance, and/or a parasitic capacitance). For example, the traces in an array (e.g., a matrix) of optical emitters may be long, thereby resulting in high parasitic inductances. These parasitic elements may be undesirable, and, therefore, ought to be minimized. However, it may not be possible to completely eliminate these parasitic elements. When a supply voltage is provided to the circuit to drive the optical load, the parasitic elements in the circuit cause a delay between when the supply voltage is provided and when the current reaches a peak. The delay increases the rise time of the electrical pulse, which increases the rise time of the optical pulse. In other words, the parasitic elements make it difficult to produce optical pulses of short duration, which are useful for LIDAR systems. Furthermore, when the supply voltage is turned off, energy (e.g., electrical energy) stored by the parasitic inductance, the parasitic resistance, and/or the parasitic capacitance of the electrical components generates a decaying, oscillating (e.g., ringing) current in the circuit, which increases the fall time of the electrical pulse, which increases the fall time of the optical pulse.

Previous driver circuits for optical emitter arrays are complex, excessively bulky, and do not adequately address the aforementioned problems. For example, previous driver circuits may not be capable of generating optical pulses of short duration. As a result, previous driver circuits consume excessive power to create longer optical pulses.

Some implementations described herein provide a driver circuit for an array of optical emitters. The driver circuit provides addressability of individual emitters of the array. Moreover, the driver circuit is configured to generate narrow electrical pulses for generating narrow (e.g., less than 2 ns in width) optical pulses. Accordingly, the driver circuit can be used in ToF-based measurement systems, such as LIDAR systems, to provide greater distance range finding and improved resolution.

In some implementations, the driver circuit includes an array of optical emitters arranged in one or more rows and one or more columns. The driver circuit may include respective inductive elements connected to each row of the array of optical emitters, and charging of each inductive element may be controlled by a respective switch (e.g., thereby enabling a particular row to be addressed). The inductive elements, having relatively small inductance values, along with capacitive elements in a resonant mode, operate as current sources that boost input voltage and are capable of generating high peak current, narrow electrical pulses, and thus high peak power, narrow optical pulses. The driver circuit may also include respective switches associated with each column of the array of optical emitters. These switches control column selection (e.g., by controlling completion of respective circuit paths including the columns), thereby enabling a particular column to be addressed. Accordingly, the driver circuit described herein is simplified relative to previous driver circuits and suitable for miniaturization.

FIG. 1 is a diagram of an example driver circuit architecture 100 described herein. The driver circuit architecture 100 may include an array of optical emitters 102. The array of optical emitters 102 may include a plurality of optical emitters 102. An optical emitter 102 may include a light-emitting diode (LED), a laser diode, a semiconductor laser diode, a VCSEL, and/or an edge-emitting emitter (e.g., an edge-emitting laser), among other examples. The array of optical emitters 102 may be arranged into one or more (e.g., a plurality of) rows (shown as Rows 1-n) and one or more (e.g., a plurality of) columns (shown as Columns 1-m). For example, n and m may be equal, n may be greater than m, or m may be greater than n. In some implementations, the array of optical emitters 102 is a two-dimensional array whereby the optical emitters 102 are arranged into a plurality of rows and a plurality of columns. For example, the array of optical emitters 102 may include 10 or more rows, 12 or more rows, 15 or more rows, etc., and 10 or more columns, 12 or more columns, 15 or more columns, etc. As an example, the array of optical emitters 102 may include 16 rows and 12 columns. In some implementations, the array of optical emitters 102 is a one-dimensional array whereby the optical emitters 102 are arranged into a single row (that includes a plurality of columns) or arranged into a single column (that includes a plurality of rows).

The driver circuit architecture 100 may include a ground 104. The driver circuit architecture 100 may include one or more (e.g., a plurality of) inductive current sources 106. An inductive current source 106 may include an inductor configured to store energy in response to current flowing through the inductor, and configured to discharge the stored energy from the inductor as current (thus operating as a current source). Each row of the array of optical emitters 102 may be connected to a respective inductive current source 106 (e.g., at an anode side of the array of optical emitters 102). Thus, each inductive current source 106 operates as a current source for a particular row of the array of optical emitters 102.

As described in greater detail below, the driver circuit architecture 100 may be configured to supply current to an inductive current source 106 in response to a “charge” signal (e.g., provided by an external controller) for the inductive current source 106. The current supplied to the inductive current source 106 may charge the inductive current source 106. Moreover, the driver circuit architecture 100 may be configured to halt current flow through the inductive current source 106 in response to a “discharge” signal (e.g., provided by the external controller) for the inductive current source 106. When the current flow is halted, the inductive current source 106 may discharge current through a row of the array of optical emitters 102 to which the inductive current source 106 is connected.

The driver circuit architecture 100 may include one or more (e.g., a plurality of) switches 108 (which may be referred to herein as column switches 108). Each column of the array of optical emitters 102 may be connected to a respective column switch 108 (e.g., at a cathode side of the array of optical emitters 102). Thus, each column switch 108 controls selection of a particular column of the array of optical emitters 102 (e.g., by completing a circuit path that includes an optical emitter 102 of the particular column). In other words, each column switch 108 enables selection of a particular column of the array of optical emitters 102.

As described in greater detail below, in response to an “on” signal (e.g., provided by an external controller) for a column switch 108, the column switch 108 may close and complete a cathode path of a column of the array of optical emitters 102 (e.g., complete a circuit path that includes the column). That is, the “on” signal may provide selection of the column of the array of optical emitters 102. Thus, current discharged from an inductive current source 106 to a row of the array of optical emitters 102 may flow through the column that is selected by the column switch 108. In this way, the inductive current source 106 and the column switch 108 operate together to address (e.g., drive) a particular optical emitter 102 that is associated with the row and the column.

In some implementations, multiple inductive current sources 106 may be charged simultaneously or near-simultaneously (e.g., within 1 ns of each other) and discharged simultaneously or near-simultaneously. Additionally, or alternatively, multiple columns of the array of optical emitters 102 may be selected simultaneously or near-simultaneously. Here, respective peak currents for the multiple columns may be different. For example, a peak current of a column may be a function of a parasitic inductance of a circuit path that includes the column.

As indicated above, FIG. 1 is provided as an example. Other examples may differ from what is described with regard to FIG. 1.

FIG. 2 is a diagram of an example driver circuit 200 described herein. The driver circuit 200 may include the driver circuit architecture 100, described above.

The driver circuit 200 may include a source 202. The source 202 may provide an electrical input of the driver circuit 200. For example, the source 202 may provide current to the driver circuit 200. The source 202 may be a direct current (DC) voltage source, a DC current source with a resistive load, or the like. The driver circuit 200 may include a ground 204.

The driver circuit 200 may include an array of optical emitters 206, as described above. For example, the array of optical emitters 206 may correspond to the array of optical emitters 102, described above. In an example used throughout the description of FIG. 2, the array of optical emitters 206 may include an optical emitter 206 A associated with Row 1 and Column 1 of the array of optical emitters 206.

The driver circuit 200 may include one or more (e.g., a plurality of) inductive elements 208. An inductive element 208 may provide an inductive current source of the driver circuit 200, as described above. An inductive element 208 may include one or more inductor components and/or one or more sections of a trace of the driver circuit 200. An inductive element 208 may have an electrical inductance in a range from 0.5 nanohenry (nH) to 10 nH. For example, the inductive element 208 may have an electrical inductance of 2 nH.

Each row of the array of optical emitters 206 may be connected to (e.g., in a circuit path with) a respective inductive element 208. For example, an inductive element 208 B may be connected to Row 1. As shown, for an array that includes multiple rows of optical emitters 206, the driver circuit 200 may include multiple inductive elements 208, and the multiple inductive elements 208 may be respectively connected to the multiple rows.

The driver circuit 200 may include one or more (e.g., a plurality of) first switches 210 (which may be referred to herein as row switches 210). Each row of the array of optical emitters 206 may be connected to a respective row switch 210. Moreover, each inductive element 208 may be connected to (e.g., in a circuit path with) a respective row switch 210. For example, a row switch 210 C may be connected to the inductive element 208 B. An inductive element 208 may be in a high-side configuration with respect to an associated row switch 210. In this way, a row switch 210 may be ground referenced. As described below, a row switch 210 may control charging of an inductive element 208 that is in the same circuit path as the row switch 210.

As shown, charging circuit paths of the driver circuit 200 may include the source 202, an inductive element 208, and a row switch 210. For example, a first charging circuit path of the driver circuit 200 may include the source 202, a first inductive element 208, and a first row switch 210; a second charging circuit path of the driver circuit 200 may include the source 202, a second inductive element 208, and a second row switch 210; and so forth. As shown, for an array that includes multiple rows of optical emitters 206, the driver circuit may include multiple row switches 210 (e.g., respectively connected to the multiple rows) and multiple inductive elements 208 (e.g., respectively connected to the multiple rows). The multiple row switches 210 may control charging of respective inductive elements 208 of the multiple inductive elements 208.

A row switch 210 may have a closed state (e.g., an on state) where, when the row switch 210 is in the closed state, current may flow through the row switch 210. Additionally, the row switch 210 may have an open state (e.g., an off state), where, when the row switch 210 is in the open state, current may not flow through the row switch 210. The row switch 210 may transition to the closed state in response to a “charge” signal, as described above. The row switch 210 may transition to the open state in response to a “discharge” signal, as described above.

Thus, in the closed state, a row switch 210 for a particular row may cause current to charge an inductive element 208 connected to the row (e.g., by completing a circuit path that includes the source 202, the inductive element 208, and the row switch 210). That is, when the row switch 210 is in the closed state, current may flow through the row switch 210 and charge the inductive element 208. In some implementations, when the row switch 210 is in the closed state, current may flow through the row switch 210 and charge the inductive element 208 during a time interval (e.g., a charging time). The time interval may be in a range from 2 ns to 50 ns, 2 ns to 20 ns, or the like. When transitioning from the closed state to the open state, the row switch 210 may cause the inductive element 208 to discharge current through the row. That is, when the row switch 210 is in the open state, current may not flow through the row switch 210, and current discharges from the inductive element 208 through the row.

A row switch 210 may be a field effect transistor (FET). For example, the FET may be a gallium nitride (GaN) FET, a complementary metal-oxide-semiconductor (CMOS) FET, or the like. In some implementations, a row switch 210 may be capable of operation in the closed state (e.g., capable of transitioning from the open state to the closed state, and subsequently transitioning from the closed state to the open state) for a time duration in a range from 2 ns to 50 ns, 2 ns to 20 ns, or the like. For example, the row switch 210 (e.g., a CMOS FET) may have a relatively low switching speed (e.g., relative to a GaN FET) because the width of an optical pulse may be based on the discharge of current from an inductive element 208 (which has a high discharge speed) rather than the switching speed of the row switch 210.

The driver circuit 200 may include one or more (e.g., a plurality of) second switches 212 (which may be referred to herein as column switches 212). The column switches 212 may operate in a similar manner as the column switches 108 described above. Each column of the array of optical emitters 206 may be connected to (e.g., in a circuit path with) a respective column switch 212. For example, Column 1 may be connected to a column switch 212 D. As described below, a column switch 212 for a column may control selection of the column (e.g., by completing a cathode path of the column). In some implementations, the driver circuit 200 may omit the column switches 212 if the array of optical emitters 206 is a one-dimensional array having a single column.

As shown, discharging circuit paths of the driver circuit 200 may include the source 202, an inductive element 208, an optical emitter 206, and a column switch 212. For example, a first discharging circuit path of the driver circuit 200 may include the source 202, a first inductive element 208 of a first row, an optical emitter 206 of the first row and a first column, and a first column switch 212 of the first column; a second discharging circuit path of the driver circuit 200 may include the source 202, the first inductive element 208 of the first row, an optical emitter 206 of the first row and a second column, and a second column switch 212 of the second column; and so forth. As shown, for an array that includes multiple columns of optical emitters 206, the driver circuit 200 may include multiple column switches 212 (e.g., respectively connected to the multiple columns) that control selection of respective columns of the multiple columns.

A column switch 212 may have a closed state (e.g., an on state) where, when the column switch 212 is in the closed state, current may flow through the column switch 212. Additionally, the column switch 212 may have an open state (e.g., an off state), where, when the column switch 212 is in the open state, current may not flow through the column switch 212. The column switch 212 may transition to the closed state in response to an “on” signal, as described above. The column switch 212 may transition to the open state in response to an “off” signal, as described above. Thus, in the closed state, a column switch 212 for a particular column may select the column. For example, in the closed state, a column switch 212 for a particular column may close (e.g., complete) a cathode path of the column (e.g., current may flow through an optical emitter 206 in a column that has a column switch 212 in the on state in a cathode path of the column). Stated differently, in the closed state, a column switch 212 for a particular column may complete a circuit path that includes the column. In the open state of a column switch 212 for a particular column, the column is no longer selected (e.g., by opening the cathode path of the column).

A column switch 212 may be a FET. For example, the FET may be a GaN FET, a CMOS FET, or the like. A column switch 212 may be a low side switch. In some implementations, a column switch 212 may be capable of operation in the closed state (e.g., capable of transitioning from the open state to the closed state, and subsequently transitioning from the closed state to the open state) for a time duration in a range from 20 ns to 50 ns. In some implementations, a column switch 212 may have a slower switching speed than a row switch 210.

In an example operation of the driver circuit 200, the row switch 210 C may transition from the open state to the closed state (e.g., in response to a “charge” signal) to cause current (e.g., from the source 202) to charge the inductive element 208 B. Continuing with the example, the row switch 210 C may transition from the closed state to the open state (e.g., in response to a “discharge” signal) to cause the inductive element 208 B to discharge current through Row 1. Moreover, the discharged current may flow through the optical emitter 206 A of Column 1 when the column switch 212 D is in the closed state (e.g., in response to an “on” signal). The discharged current may provide an electrical pulse to the optical emitter 206 A. In response to the electrical pulse, the optical emitter 206 A may emit an optical pulse (e.g., an optical pulse of short duration, as described herein).

In some implementations, the driver circuit 200 may include one or more (e.g., a plurality of) capacitive elements 214. A capacitive element 214 may be in series between an inductive element 208 and a corresponding row of the array of optical emitters 206. That is, the capacitive element 214 may be a coupling capacitor for the inductive element 208 and the optical emitters 206 of the row. In other words, the inductive element 208 may be capacitively coupled (e.g., alternating current (AC)-coupled) to the optical emitters 206 of the row. As shown, for an array that includes multiple rows of optical emitters 206, the driver circuit 200 may include respective capacitive elements 214 for each of the multiple rows (e.g., the optical emitters 206 of each row may be respectively capacitively coupled to a corresponding inductive element 208).

A capacitive element 214 may have a capacitance in a range from 500 picofarads to 0.5 microfarads, such as a capacitance of 20 nanofarads. A capacitive element 214 may prevent an optical emitter 206 of a row from emitting light when a corresponding column switch 212 is in the closed state. Accordingly, the source 202 may provide an electrical input (e.g., a voltage, a current, or the like) to the driver circuit 200 that is equal to or greater than a threshold at which an optical emitter 206 emits light (e.g., a lasing threshold voltage or the like). In this way, higher peak currents at the array of optical emitters 206 may be achieved. Moreover, the capacitive coupling may reduce or eliminate undesirable after-pulse emissions caused by parasitic oscillations (e.g., ringing) that occur at higher peak currents.

In some implementations, the driver circuit 200 may omit capacitive elements 214. That is, in such implementations, the inductive element 208 and the optical emitters 206 of a row are not capacitively coupled (e.g., the inductive element 208 and the optical emitters 206 are DC-coupled). Here, the source 202 may provide an electrical input (e.g., a voltage, a current, or the like) to the driver circuit 200 that is less than the threshold at which an optical emitter 206 emits light.

The driver circuit 200 is a high-speed driver circuit capable of generating narrow optical pulses having a width (in a time domain) less than 2 ns or less than 1 ns. For example, the driver circuit 200 may generate optical pulses having a width in a range from 100 picoseconds (ps) to 2 ns. The width of an optical pulse may be a function of the capacitance of the capacitive elements 214 as well as an output capacitance of the row switches 210 and an inductance of the inductive elements 208. In some implementations, the driver circuit 200 may generate an optical pulse that is a Gaussian pulse. In other words, the driver circuit 200 may be configured as a resonant circuit. Moreover, the driver circuit 200 may generate a high peak current for an electrical pulse, thereby producing an optical pulse with high peak power. For example, the peak current may be in a range from 1 Amp to 100 Amps. The peak current may be a function of various parameters associated with the row switches 210, the inductive elements 208, and/or the capacitive elements 214. A desired peak current may be achieved through tailoring of the electrical input of the source 202 and/or tailoring of the charging time for the inductive elements 208.

As indicated above, FIG. 2 is provided as an example. Other examples may differ from what is described with regard to FIG. 2.

FIG. 3 is a diagram of an example graph 300 plotting electrical signals associated with an example driver circuit described herein. For example, the electrical signals of the graph 300 may be associated with the driver circuit 200, described above. The graph 300 shows the electrical signals associated with generating an optical pulse at an optical emitter of an array of optical emitters. That is, the optical emitter may be associated with a row and a column of the array of optical emitters.

Line 305 shows an “on” signal (high voltage) followed by an “off” signal (low voltage). As described above, the “on” signal causes a column switch (e.g., a column switch 212, described above) associated with the column to transition to the closed state. Line 310 shows a “charge” signal (high voltage) followed by a “discharge” signal (low voltage). As described above, the “charge” signal causes a row switch (e.g., a row switch 210, described above) associated with the row to transition to the closed state, and the “discharge” signal causes the row switch to transition to the open state. As shown, the “on” signal may have a longer duration than a “charge” signal. For example, the “on” signal may have a duration in a range from 20 ns to 50 ns (e.g., a duration of about 30 ns, as shown), and the “charge” signal may have a duration in a range from 2 ns to 50 ns (e.g., a duration of about 10 ns, as shown), as described above. Moreover, as shown, the “on” signal may begin earlier in time than the “charge” signal. That is, the column switch may transition to the closed state before the row switch transitions to the closed state. In some implementations, the column switch may transition to the closed state after the row switch transitions to the closed state (e.g., the “on” signal begins after the “charge” signal), provided that the column switch is completely closed before the row switch transitions from the closed state to the open state.

As shown by line 315, closing of the row switch for the row, in response to the “charge” signal, may cause current to charge an inductive element (e.g., an inductive element 208, described above) connected to the row. As described above, a charging time for the inductive element may be in a range from 2 ns to 50 ns (e.g., a charging time of about 10 ns, as shown). As further shown by line 315, opening of the row switch, in response to the “discharge” signal, may cause current to discharge from the inductive element. The current discharges through the row and through the column (e.g., through a circuit path that includes the optical emitter associated with the row and the column) due to the column switch being closed when the row switch opens (e.g., the “on” signal for the column switch endures past the “discharge” signal for the row switch). Current discharged from the inductive element provides an electrical pulse, shown by line 320, at the optical emitter associated with the row and the column. The electrical pulse generates an optical pulse at the optical emitter.

Accordingly, in some implementations, a method for generating an optical pulse of short duration may include causing a column switch, for a column of an array of optical emitters, to transition to a closed state, the column switch in the closed state selecting the column; causing a row switch, for a row of the array of optical emitters, to transition to a closed state, the row switch in the closed state causing current to charge an inductive element connected to the row; and/or causing the row switch to transition from the closed state to the open state, the row switch transitioning from the closed state to the open state causing the inductive element to discharge current through the row and the column to provide an electrical pulse to an optical emitter associated with the row and the column. In some implementations a method for generating an optical pulse of short duration may include selecting a column, that includes an optical emitter of an array of optical emitters, by closing a column switch for the column; charging an inductive element, connected to a row of the array of optical emitters that includes the optical emitter, by closing a row switch for the inductive element; and/or driving the optical emitter associated with the row and the column by opening the row switch to discharge current from the inductive element through the row and the column. The aforementioned methods may be performed by one or more processors of a device, one or more controllers of a device, or the like.

As indicated above, FIG. 3 is provided as an example. Other examples may differ from what is described with regard to FIG. 3.

In some implementations, a controller for an array of optical emitters may include the driver circuit architecture 100 or a portion thereof and/or the driver circuit 200 or a portion thereof. For example, the controller may include one or more inductive elements respectively connected to each row of the array, one or more row switches respectively connected to each inductive element, and/or one or more column switches respectively connected to each column of the array, in a similar manner as described above. In some implementations, an optical source may include the driver circuit architecture 100 or a portion thereof and/or the driver circuit 200 or a portion thereof. For example, the optical source may include an array of optical emitters, one or more inductive elements respectively connected to each row of the array, one or more row switches respectively connected to each inductive element, and/or one or more column switches respectively connected to each column of the array, in a similar manner as described above. In some implementations, an optical system may include the driver circuit architecture 100 or a portion thereof and/or the driver circuit 200 or a portion thereof. For example, the optical system may include an array of optical emitters, one or more inductive elements respectively connected to each row of the array, one or more row switches respectively connected to each inductive element, and/or one or more column switches respectively connected to each column of the array, in a similar manner as described above. Moreover, the optical system may include one or more lenses, one or more optical elements (e.g., diffractive optical elements, refractive optical elements, or the like), one or more reflector elements, and/or one or more optical sensors, among other examples. In some implementations the optical system may include the optical source and/or the controller.

In some implementations, the driver circuit architecture 100 or a portion thereof and/or the driver circuit 200 or a portion thereof may be included in a ToF-based (e.g., direct ToF) measurement system. For example, the ToF-based measurement system may include a LIDAR system. According to some implementations, a method may include generating an optical pulse for ToF-based measurement using the driver circuit architecture 100 or a portion thereof and/or the driver circuit 200 or a portion thereof; and/or detecting an object based on the optical pulse. According to some implementations, a method may include generating (or forming) an array of light spots for three-dimensional sensing using the driver circuit architecture 100 or a portion thereof and/or the driver circuit 200 or a portion thereof. According to some implementations, a method may include generating (or forming) a light pattern for three-dimensional sensing using driver circuit architecture 100 or a portion thereof and/or the driver circuit 200 or a portion thereof.

The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementations to the precise forms disclosed. Modifications and variations may be made in light of the above disclosure or may be acquired from practice of the implementations. Furthermore, any of the implementations described herein may be combined unless the foregoing disclosure expressly provides a reason that one or more implementations may not be combined.

As used herein, satisfying a threshold may, depending on the context, refer to a value being greater than the threshold, greater than or equal to the threshold, less than the threshold, less than or equal to the threshold, equal to the threshold, not equal to the threshold, or the like.

Even though particular combinations of features are recited in the claims and/or disclosed in the specification, these combinations are not intended to limit the disclosure of various implementations. In fact, many of these features may be combined in ways not specifically recited in the claims and/or disclosed in the specification. Although each dependent claim listed below may directly depend on only one claim, the disclosure of various implementations includes each dependent claim in combination with every other claim in the claim set. As used herein, a phrase referring to “at least one of” a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiple of the same item.

No element, act, or instruction used herein should be construed as critical or essential unless explicitly described as such. Also, as used herein, the articles “a” and “an” are intended to include one or more items, and may be used interchangeably with “one or more.” Further, as used herein, the article “the” is intended to include one or more items referenced in connection with the article “the” and may be used interchangeably with “the one or more.” Furthermore, as used herein, the term “set” is intended to include one or more items (e.g., related items, unrelated items, or a combination of related and unrelated items), and may be used interchangeably with “one or more.” Where only one item is intended, the phrase “only one” or similar language is used. Also, as used herein, the terms “has,” “have,” “having,” or the like are intended to be open-ended terms. Further, the phrase “based on” is intended to mean “based, at least in part, on” unless explicitly stated otherwise. Also, as used herein, the term “or” is intended to be inclusive when used in a series and may be used interchangeably with “and/or,” unless explicitly stated otherwise (e.g., if used in combination with “either” or “only one of”).

Claims

1. A driver circuit, comprising:

a source to provide an electrical input;

an array of optical emitters arranged in one or more rows and one or more columns, wherein the array of optical emitters includes an optical emitter associated with a row of the one or more rows and a column of the one or more columns;

a first switch having an open state and a closed state;

an inductive element connected to the row, wherein the first switch in the closed state is to cause current to charge the inductive element; and

a second switch having an open state and a closed state, wherein the second switch in the closed state is to select the column, and wherein the first switch transitioning from the closed state to the open state is to cause the inductive element to discharge current through the row, and through the column when the second switch is in the closed state, to provide an electrical pulse to the optical emitter associated with the row and the column.

2. The driver circuit of claim 1, wherein the inductive element is capacitively coupled to the optical emitter.

3. The driver circuit of claim 2, wherein the electrical input is equal to or greater than a threshold at which the optical emitter emits light.

4. The driver circuit of claim 1, wherein the array of optical emitters is arranged in multiple rows, and

wherein the first switch is one of multiple first switches respectively connected to the multiple rows, and the inductive element is one of multiple inductive elements respectively connected to the multiple rows.

5. The driver circuit of claim 4, wherein the multiple first switches control charging of respective inductive elements of the multiple inductive elements.

6. The driver circuit of claim 1, wherein the array of optical emitters is arranged in multiple columns, and

wherein the second switch is one of multiple second switches respectively connected to the multiple columns.

7. The driver circuit of claim 6, wherein the multiple second switches control selection of respective columns of the multiple columns.

8. The driver circuit of claim 1, wherein the first switch in the closed state is to cause current to charge the inductive element through a circuit path that includes the source, the inductive element, and the first switch.

9. The driver circuit of claim 1, wherein the first switch transitioning from the closed state to the open state is to cause the inductive element to discharge current through a circuit path that includes the source, the inductive element, the optical emitter, and the second switch.

10. The driver circuit of claim 1, wherein, in response to the electrical pulse, the optical emitter is to emit an optical pulse having a width in a range from 100 picoseconds to 2 nanoseconds.

11. A controller for an array of optical emitters arranged in a plurality of rows and a plurality of columns, comprising:

a plurality of inductive elements respectively connected to the plurality of rows;

a plurality of first switches respectively connected to the plurality of inductive elements, wherein the plurality of first switches have an open state and a closed state, and wherein a first switch, of the plurality of first switches, in the closed state is to cause current to charge an inductive element, of the plurality of inductive elements, for a row of the plurality of rows; and

a plurality of second switches respectively connected to the plurality of columns, wherein the plurality of second switches have an open state and a closed state, and wherein a second switch, of the plurality of second switches, in the closed state is to select a column of the plurality of columns.

12. The controller of claim 11, wherein the first switch in the closed state is to cause current to charge the inductive element during a time interval in a range from 2 nanoseconds to 50 nanoseconds.

13. The controller of claim 11, wherein the plurality of inductive elements are respectively capacitively coupled to the plurality of rows.

14. The controller of claim 11, wherein the plurality of first switches and the plurality of second switches are field effect transistors.

15. The controller of claim 11, wherein the inductive element is in a high-side configuration with respect to the first switch.

16. The controller of claim 11, wherein, when the second switch is in the closed state, the first switch transitioning from the closed state to the open state is to cause the inductive element to discharge current through an optical emitter, of the array of optical emitters, associated with the row and the column.

17. An optical source, comprising:

an array of optical emitters arranged in one or more rows and one or more columns; and

a driver circuit, comprising: one or more inductive elements respectively connected to the one or more rows, where the one or more inductive elements are configured to discharge current through respective rows of the one or more rows; and one or more switches respectively connected to the one or more columns, wherein the one or more switches have an open state and a closed state, and wherein a switch, of the one or more switches, in the closed state is to select a column of the one or more columns.

18. The optical source of claim 17, wherein the one or more inductive elements are current sources for the respective rows of the one or more rows.

19. The optical source of claim 17, wherein the switch, in the closed state, is to complete a circuit path that includes an inductive element, of the one or more inductive elements, and an optical emitter of the array of optical emitters.

20. The optical source of claim 17, wherein the switch, in the closed state, is to select the column by closing a cathode path of the column.