Absolute position length measurement type encoder
An absolute position length measurement type encoder includes: a scale in which an ABS pattern based on a pseudorandom code is provided; a light-receiving element for receiving bright and dark patterns formed by the scale; and a signal processing circuit for processing signals subjected to output of the light-receiving element and measuring an absolute position of the scale to the light-receiving element, wherein the signal processing circuit includes a space-dividing number conversion circuit that obtains finer intervals D than the array interval PPDA of the ABS light-receiving element array of the light-receiving element, and simultaneously obtains and outputs a digital value for each of the intervals D subjected to output of the ABS light-receiving element array. Therefore, even where the minimum line width of the ABS pattern is not an integral multiple of the array interval of the ABS light-receiving element array, an arithmetic operation for the correlation can be carried out, and the moving distance can be measured at high accuracy.
Latest Mitutoyo Corporation Patents:
- Three-dimensional-measuring-apparatus inspection gauges, three-dimensional-measuring-apparatus inspection methods and three-dimensional measuring apparatuses
- Metrology system utilizing annular optical configuration
- Heterodyne light source for use in metrology system
- Polarizing Fizeau interferometer
- DISPLACEMENT MEASURING APPARATUS
The disclosure of Japanese Patent Application No. 2008-125631 filed on May 13, 2008 including specifications, drawings and claims is incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates to an absolute position length measurement type encoder that includes a scale in which an ABS pattern based on a pseudorandom code is provided, a light-receiving element for receiving bright and dark patterns formed by the scale, and a signal processing circuit for processing signals in compliance with output of the light-receiving element and measuring an absolute position of the scale with respect to the light-receiving element, and in particular to an absolute position length measurement type encoder capable of measuring a moving distance at high accuracy by arithmetic operations for correlation without being influenced by an array interval of ABS light-receiving element array of the light-receiving element.
2. Description of the Related Art
Accurate position control and measurement are indispensable in measuring instruments and apparatuses. Therefore, an absolute position length measurement type encoder capable of executing absolute position measurement over some length has been used. In particular, where high accuracy is required, a photoelectric type encoder has been used.
Generally, an absolute position length measurement type photoelectric encoder has an absolute pattern (hereinafter called an ABS pattern) to roughly measure a moving distance and an incremental pattern (hereinafter called an INC pattern) to measure a moving distance at high resolution power by interpolating the interval of a roughly obtained moving distance on a scale. The light-receiving element includes ABS light-receiving element array for ABS pattern and INC light-receiving element array for INC pattern.
Since bright and dark patterns formed by ABS pattern and INC pattern, which are formed on the scale, change on the light-receiving element, which receives the bright and dark patterns, the moving distance can be measured at high accuracy by processing the change in a signal processing circuit. The ABS pattern is prepared based on a pseudorandom code, and patterns to be used can be made into one, wherein the absolute position length measurement type encoder itself can be downsized. Also, since highly accurate measurement is enabled for a moving distance in measurement of the absolute position, a method for arithmetic operation for correlation has been used (For example, Japanese Published Unexamined Patent Application No. 2002-230560 (hereinafter called Patent Document 1), and Japanese Published Unexamined Patent Application No. 2006-226987 (hereinafter called Patent Document 2)).
However, digital signals used for arithmetic operations for correlation are discrete data obtained per array interval of the ABS light-receiving element array. Therefore, when carrying out an arithmetic operation for correlation using the discrete data, it was assumed that an integral multiple of the array interval of the ABS light-receiving element array is equal to the minimum line width of the ABS pattern based on the pseudorandom code being an object of the arithmetic operation for correlation (Patent Documents 1 and 2). However, there is a restriction in the array interval of the ABS light-receiving element array, freedom for selection of the light-receiving elements was necessarily reduced. Also, the degree of freedom in design for the minimum line width of the ABS pattern could not be sufficiently secured. As a result, there is a problem in that adverse influences are given to the size and performance of the absolute position length measurement type encoder and to the production cost thereof.
SUMMARY OF THE INVENTIONThe present invention was developed to solve the above-described problems of the prior arts, and it is therefore an object to provide an absolute position length measurement type encoder capable of carrying out arithmetic operations for correlation even where the minimum line width of ABS pattern is not an integral multiple of the array interval of ABS light-receiving element array and measuring a moving distance at high accuracy.
A first aspect of the present invention is an absolute position length measurement type encoder including:
a scale in which an ABS pattern based on a pseudorandom code is provided;
a light-receiving element for receiving bright and dark patterns formed by the scale; and
a signal processing circuit for processing signals subjected to output of the light-receiving element and measuring an absolute position of the scale to the light-receiving element;
wherein the signal processing circuit includes a space-dividing number conversion circuit that obtains finer intervals D than the array interval PPDA of the ABS light-receiving element array of the light-receiving element, and simultaneously obtains and outputs a digital value for each of the intervals D subjected to output of the ABS light-receiving element array.
A second aspect of the present invention is featured in that the array interval PPDA of the ABS light-receiving element array is made into one-third or less the minimum line width PABS of the ABS pattern.
A third aspect of the present invention is featured in that the signal processing circuit further includes a correlation circuit for executing arithmetic operations for correlation between a digital value subjected to output of the space-dividing number conversion circuit and a design value of the pseudorandom code.
A fourth aspect of the present invention is featured in that the interval D is made into the maximum real number value, which satisfies expressions (1) and (2) with respect to the array interval PPDA and the minimum line width PABS of the ABS pattern.
PPDA=D*k1 (where k1 is an integral number greater than 1) (1)
PABS=D*k2 (where k2 is an integral number) (2)
A fifth aspect of the present invention is featured in that the digital values for each of the intervals D are obtained by linearly interpolating two digital values adjacent to each other in digital values subjected to output of the ABS light-receiving element array.
A sixth aspect of the present invention is featured in that the scale is provided with an INC pattern.
A seventh aspect of the present invention is featured in further including:
a light-receiving element for receiving bright and dark patterns formed by the INC pattern;
an incremental position detection circuit for detecting an incremental position by processing signals output from the light-receiving element; and
an absolute position outputting circuit for selecting which one of a signal output from the incremental position detection circuit and an ABS position signal output from a correlation circuit in the signal processing circuit is to be output as a position data signal.
An eighth aspect of the present invention is featured in that the absolute position outputting circuit normally selects the signal output from the incremental position detection circuit, references the same signal to the ABS position signal once every predetermined time interval, outputs the ABS position signal as the position data signal if there is a difference between the positions obtained from the two signals, feeds the position data signal back to the incremental position detection circuit, and simultaneously sets the same position data signal in the inside of the incremental position detection circuit as the current value.
A ninth aspect of the present invention is featured in that the feedback is carried out when the data are not renewed at a data refreshing rate in the correlation circuit.
Also, a tenth aspect of the present invention is featured in that the digital value subjected to arithmetic operations for correlation by the correlation circuit is made into a value binarized by the unit of the minimum line width PABS of the ABS pattern.
An eleventh aspect of the present invention is featured in that the signal processing circuit includes; in the front stage of the correlation circuit,
an edge position detection circuit for first binarizing a signal output from the space-dividing number conversion circuit;
a peak position detection circuit for preparing a histogram with respect to a position where a value obtained from a signal differentiated and made into an absolute value after being binarized becomes a local maximum value, for each of the minimum line width PABS of the ABS pattern and for obtaining a peak position PK from the histogram; and
a decoding circuit for processing the peak position PK based on the binarized value of a signal as the position where the pseudorandom code to be decoded is changed over; and includes: in the back stage of the correlation circuit,
a position data synthesizing circuit for obtaining an accurate absolute position, with respect to the before-ABS-correction position signal output from the correlation circuit, through position correction by shifting the absolute position only by the peak position PK by means of a peak position signal obtained by the peak position detection circuit.
A twelfth aspect of the present invention is featured in that the peak position detection circuit obtains the peak position PK by interpolating respective values of the histogram by fitting a probability distribution function by the least-squares method.
A thirteenth aspect of the present invention is featured in that the decoding circuit obtains respective total sums of the binarized values in the minimum line width PABS, determines and decodes the code of the minimum line width PABS with a value having a greater total sum.
A fourteenth aspect of the present invention is featured in that the correlation circuit carries out arithmetic operations for correlation between the decoded pseudorandom code and the design value of the pseudorandom code, and obtains the absolute position of the scale with respect to the light-receiving element.
A fifteenth aspect of the present invention is featured in that the position data synthesizing circuit synthesizes position data by adding the peak position PK of the peak position signal to the absolute position of the absolute position signal.
According to the present invention, where the minimum line width PABS of the ABS pattern is not an integral multiple of the array interval PPDA of the ABS light-receiving element array, a finer interval than the array interval PPDA may be made into a minimum resolution power, wherein the moving distance can be measured without lowering the accuracy. Therefore, the degree of freedom in design of the minimum line width of the ABS pattern and range of selection of the light-receiving element can be widened, wherein it becomes possible to compose an absolute position length measurement type encoder having a greater degree of freedom with respect to the size, performance and cost thereof.
Also, an absolute position length measurement type encoder can be composed, which, where an arithmetic operation for correlation is carried out, is robust and capable of correctly measuring the moving distance even if there is an error in output of the ABS light-receiving element array.
In particular, where the interval D is the maximum real number value that satisfies the expressions (1) and (2), it becomes possible to quickly measure the moving distance at a further higher accuracy without increasing the arithmetic operation amount more than necessary.
These and other novel features and advantages of the present invention will become apparent from the following detailed description of preferred embodiments.
The preferred embodiments will be described with reference to the drawings, wherein like elements have been denoted throughout the figures with like reference numerals, and wherein;
Hereinafter, a detailed description is given of embodiments of the present invention with reference to the drawings.
Embodiment 1 according to the present invention will be described using
First, a brief description is given of the entire configuration of the present embodiment.
Mainly as shown in
a scale 102 (Refer to
a light-receiving element 112 for receiving bright and dark patterns formed by the scale 102 and
a signal processing circuit 118 for processing signals subjected to output of the light-receiving element 112 and for measuring the absolute position of the scale 102 with respect to the light-receiving element 112.
Here, the signal processing circuit 118 includes
a space-dividing number conversion circuit 124 for obtaining a finer interval D than the array interval PPDA of the ABS light-receiving element array 114 of the light-receiving element 112 and obtaining and outputting a digital value for each of the intervals D in compliance with output of the ABS light-receiving element array 114; and
a correlation circuit 126 for carrying out arithmetic operations for correlation between a digital value subjected to output of the space-dividing number conversion circuit 124 and the design value of a pseudorandom code.
A detailed description is given below of respective components.
As shown in
A pseudorandom code is used for the ABS pattern 104. Here, for example, M-sequence code, which becomes the longest cycle, of the code series generated by a shift register may be used as the pseudorandom code. At this time, the line width per one pseudorandom code becomes the minimum line width PABS of the ABS pattern 104 as shown in
The lens 110 may be composed of a single lens (for example, cylindrical lens, etc.) by which two patterns 104 and 106 are simultaneously imaged as shown in
As shown in
The INC light-receiving element array 116 has a four-phase output with a phase difference of 90° (not illustrated). The INC light-receiving element array 116 sweeps the bright and dark patterns formed by the INC pattern 106 in the array direction (the X-axis direction), and outputs the INC bright and dark signal SI1. Where the bright and dark patterns formed by the INC pattern 106 are detected by the INC light-receiving element array 116 consisting of four phases with a phase difference of 90°, a four-phase sinusoidal wave signal with a phase difference of 90° is output. In addition, the array arrangement pitch of the INC light-receiving element array 116 is narrower than the array arrangement pitch PPDA of the ABS light-receiving element array 114 in order to interpolate between an obtained absolute position and the absolute position.
As shown in
As shown in
As shown in
PPDA=D*k1 (k1 is an integral number greater than 1) (1)
PABS=D*k2 (K2 is an integral number) (2)
That is, since k1 is greater than 1, the interval D is made finer than the array interval PPDA.
As a detailed example, when the minimum line width PABS of the ABS pattern 104 is 50 μm, and the array interval PPDA of the ABS light-receiving element array 114 is 3.5 μm, the interval D becomes 0.5 μm.
Also, although not corresponding to the present invention, where k1=1, since the array interval PPDA is made equal to the interval D, the expression (2) may be expressed by the expression (3) below.
PABS=PPDA+K2 (k2 is an integral number) (3)
That is, when the minimum line width PABS becomes an integral multiple of the array interval PPDA, the expressions (1) and (2) may be used. Therefore, even when the minimum line width PABS becomes an integral multiple of the array interval PPDA, no disadvantage is brought about if the space-dividing number conversion circuit 124 is used.
If the interval D is obtained by the expressions (1) and (2), the space-dividing number conversion circuit 124 newly obtains a digital value for each of the intervals D from the digital value (Signal SA3) subjected to output of the ABS light-receiving element array 114. In its most simplistic form, for example, digital values F(PPDA*x+D*i) for each of the intervals D can be obtained by linearly interpolating two digital values (Signal SA3) adjacent to each other. At this time, the following expression (4) may be used.
F(PPDA*x+D*i)=F(PPDA*x)+(F(PPDA*(x+1))−(F(PPDA*x))/k1*i (4)
Here, i is an integral number (0<i<k1), F(PPDA*x) and F(PPDA*(x+1)) respectively show digital values obtained at the xth time and at the (x+1)th time of the array interval PPDA. Also, a digital value F for each of the intervals D may be obtained by partially approximating by a high-order function. For example, by applying a three-order polynomial expression to digital values (Signal SA3) at four points adjacent to each other, the interval between the second point and the third point, which becomes just the middle, is interpolated, whereby the digital value F for each of the intervals D may be obtained.
The digital value F of the interval D thus obtained is output as a signal SA4.
As shown in
The noise filter/amplification circuit 140 processes a four-phase sinusoidal wave signal with a phase difference of 90°, which is an INC bright and dark signal SI1, as shown in
The INC position detection circuit 142 processes the signal SI2 output from the noise filter/amplification circuit 140 as shown in
The absolute position output circuit 144 selects, as shown in
Thus, even where the minimum line width PABS of the ABS pattern 104 is not an integral multiple of the array interval PPDA of the light-receiving element array 114, the interval D, which is finer than the array interval PPDA, may be made into the minimum resolution power. Therefore, since it is possible to obtain the absolute position at least further finer than the resolution power of the array interval PPDA, the moving distance can be measured without lowering the accuracy. Accordingly, the degree of freedom in design of the minimum line width PABS of the ABS pattern 104 and the range of selection of the light-receiving element 112 can be widened, wherein it becomes possible to compose an absolute position length measurement type encoder 100 having a higher degree of freedom with respect to the size, performance, and production costs thereof.
Also, the absolute position is obtained by carrying out an arithmetic operation for correlation in the correlation circuit 126. That is, since the absolute position is obtained with the highest correlation value, it is possible to correctly measure the moving distance even if there is some margin for error in output of the ABS light-receiving element array 114. That is, even if the scale 102 is subjected to damage and/or foreign substances and the bright and dark patterns based on the ABS pattern 104 are thereby influenced, it is possible to compose a robust absolute position length measurement type encoder 100 capable of securing the measurement accuracy.
In particular, in the present embodiment, since the interval D is the maximum real number value that satisfies the expressions (1) and (2), it becomes possible to quickly measure the moving distance at a further higher accuracy without increasing the arithmetic operation amount more than necessary.
Next, a description is given of Embodiment 2 according to the present invention with reference to
As shown in
Therefore, in
As shown in
As shown in
The decoding circuit 132 carries out processing based on a binarized value of the signal SA51 as the peak position PK of the signal SA6 as the position (reference position) where the pseudorandom code to be decoded is changed over as shown in
As shown in
As shown in
Next, referring to
First, when the signal SA3 (Refer to
Next, the signal SA4 output from the space-dividing number conversion circuit 124 is binarized using a predetermined threshold value TH in the edge position detection circuit 128 (Step S4). And, a binarized and output signal SA51 is brought into a pattern shown in
Next, the binarized value is differentiated in the same edge position detection circuit 128, wherein a rise position and a fall position are detected (Step S6). The signal at this time is brought into a pattern shown in
Next, the obtained differential signal is made into an absolute value in the same edge position detection circuit 128 (Step S8). The signal at this time is brought into a pattern shown in
Next, with respect to positions where the value made into an absolute value per minimum line width PABS of the ABS pattern 104 is locally maximized (the maximum value by the unit of the minimum line width PABS), a histogram is prepared at a zone of the minimum line width PABS of the ABS pattern 104 in the peak position detection circuit 126 (Step S10).
Next, the peak position PK for frequency in the histogram is calculated in the same peak position detection circuit 130 (Step S12).
Next, in the decoding circuit 132, the numbers of 1 and 0 are added up in the minimum line width PABS of the respective ABS pattern 104 for every zone of the minimum line width PABS from the position where shifted only by the peak position PK of the peak position signal SA6, and the total numbers thereof are obtained (Step S14).
Next, with respect to the added-up result, the same decoding circuit 132 compares whether the total number of 1 is greater or the total number of 0 is greater by the unit of the minimum line width PABS of the ABS pattern 104, and determines the code based on the value of the total number of which is greater. Based on the determined code, the code is decoded (Step S16). The ABS decoding signal SA7 output decoded and output from the decoding circuit 132 is brought into a pattern shown in
Next, the correlation circuit 134 carries out an arithmetic operation for correlation between the decoded pseudorandom code of the ABS decoding signal SA7 and the design value of the pseudorandom code, and obtains the absolute position of the scale 102 with respect to the light-receiving element 112 (Step S18). The value is output as the before-ABS-correction position signal SA8.
Next, position data are synthesized by adding the peak position PK of the peak position signal SA6 to the absolute position of the before-ABS-correction position signal SA8 in the position data synthesizing circuit 136 (Step S20). The synthesized value is output to the absolute position output circuit 144 as the ABS position data signal SA9.
Thus, in the present embodiment, in addition to the effects obtained in Embodiment 1, the arithmetic operation for correlation is not executed based on the bit number of the A/D converted digital value but is executed by the correlation circuit 134 after binarization and decoding to a code. That is, the digital value subjected to output of the space-dividing number conversion circuit 124 is a value binarized by the unit of the minimum line width PABS of the ABS pattern 104, and an arithmetic operation for correlation is carried out with the value and the pseudorandom code of the design value, wherein the arithmetic operation amount can be remarkably decreased. For example, if it is assumed that the arithmetic operation for correlation has conventionally been carried out using a 4-bit digital value by the unit of the array internal PPDA of the ABS light-receiving element array 114, in the present embodiment, it is possible to carry out the arithmetic operation for correlation at a remarkably small amount of data, which is based on only 1-bit, by the unit of the minimum line width PABS of the ABS pattern 104. That is, even if the absolute position is frequently measured using the ABS pattern 104, stabilized measurement having favorable slaved tracking is enabled for the moving distance.
Simultaneously, the decoding is carried out by the unit of the minimum line width PABS of the ABS pattern 104, which is the same as the minimum unit of the pseudorandom code of the design value. Therefore, since the lengths of mutual codes are matched with each other when the arithmetic operation for correlation is carried out, it is possible to remarkably clearly determine whether or not there is any correlation. And, since the absolute position is corrected by the peak position PK, highly accurate measurement of the absolute position is enabled.
That is, in the present embodiment, the absolute position can be calculated at high accuracy with a small arithmetic operation amount even if the pseudorandom code is used for the ABS pattern 104. Therefore, the absolute position can be frequently calculated from the ABS pattern 104, wherein, for example, if the scale 102 quickly moves greatly, measurement of the moving distance of the scale with respect to the light-receiving element 112 can be carried out with a good slaved tracking performance and the accuracy kept.
The present invention has been described based on Embodiments 1 and 2 described above. However, the present invention is not limited to the above-described embodiments. That is, it is a matter of course that the present invent ion may be subjected to various modifications and variations in design within the scope not departing from the gist of the present invention.
In the above-described embodiments, it was configured that bright and dark patterns are imaged all in the X-axis direction of the ABS light-receiving element array 114 by a single lens 110. However, the present invention is not limited thereto. For example, as in Embodiment 3 shown in
Also, in the above-described embodiments, although the absolute position was obtained by carrying out an arithmetic operation for correlation using the correlation circuits 126 and 134, the present invention is not limited thereto. For example, a circuit for obtaining an absolute position by referencing a table may be provided instead of the correlation circuits 126 and 134. Describing the detailed functions thereof, for example, the digital values subjected to output of the space-dividing number conversion circuit are regarded as address signals, and reference is made to memories shown by the respective address signals. At this time, absolute positions corresponding to the respective address signals are stored in the respective memories in advance, whereby it becomes possible to obtain the absolute positions from the address signals. In this case, although it is difficult to obtain accurate absolute positions if an error occurs in the address signals, it is possible to obtain absolute positions at a high speed since no complicated arithmetic operations are carried out.
Further, although, in the embodiments described above, the bright and dark patterns formed by the scale 102 are formed by transmission light of the scale 102, for example, the present invention is not limited thereto. For example, as in Embodiment 4 shown in
Also, for example, in the embodiment described above, in order to decode the pseudorandom code from the binarized values, decoding is carried out in such a manner that the total numbers of 1 and 0 are obtained at a cycle of the minimum line width PABS, comparison is carried out with respect to whether the total number of 1 is greater or the total number of 0 is greater, and the code is determined by the value the total number of which is greater. However, the present invention is not limited thereto. For example, the code of the minimum line width PABS may be determined and decoded by determining that the value at a specified position (for example, the center) of the cycle of the minimum line width PABS is 1 or 0.
In addition, in the above-described embodiments, although the interval D is the maximum real number value D that satisfies the expressions (1) and (2), the present invention is not limited thereto. It is sufficient that the interval D is smaller than the array internal PPDA. If so, since the correlation can be obtained by the resolution power of the interval D when carrying out an arithmetic operation for correlation, the absolute positions can be measured further minutely than the array interval PPDA, and the total amount of calculation can be further decreased, wherein the absolute positions can be measured at a further higher speed.
It should be apparent to those skilled in the art that the above-described embodiments are merely illustrative which represent the application of the principles of the present invention. Numerous and varied other arrangements can be readily devised by those skilled in the art without departing from the spirit and the scope of the invention.
Claims
1. An absolute position length measurement encoder comprising:
- a scale in which an absolute (ABS) pattern based on a pseudorandom code is provided;
- a light-receiving element for receiving bright and dark patterns formed by the scale, the light receiving element including an ABS light-receiving element array having an array interval PPDA; and
- a signal processing circuit for processing signals subjected to output of the light-receiving element and measuring an absolute position of the scale to the light-receiving element;
- wherein the signal processing circuit includes a space-dividing number conversion circuit that obtains a smaller interval D than the array interval PPDA of the ABS light-receiving element array of the light-receiving element, and simultaneously obtains and outputs a digital value for each interval D subjected to output of the ABS light-receiving element array.
2. The absolute position length measurement encoder according to claim 1, wherein the array interval PPDA of the ABS light-receiving element array is made into one-third or less a minimum line width PABS of the ABS pattern.
3. The absolute position length measurement encoder according to claim 1, wherein the signal processing circuit further includes a correlation circuit for executing arithmetic operations for correlation between the digital value subjected to output of the space-dividing number conversion circuit and a design value of the pseudorandom code.
4. The absolute position length measurement encoder according to claim 1, wherein the interval D is made into a maximum real number value, which satisfies the following expressions with respect to the array interval PPDA and a minimum line width PABS of the ABS pattern: wherein k2 is an integral number.
- PpDA=D*k1, wherein k1 is an integral number greater than 1; and
- PABS=D*k2,
5. The absolute position length measurement encoder according to claim 1, wherein the digital values for each interval D are obtained by linearly interpolating two digital values adjacent to each other in the digital values subjected to output of the ABS light-receiving element array.
6. The absolute position length measurement encoder according to claim 1, wherein the scale is provided with an incremental (INC) pattern.
7. The absolute position length measurement encoder according to claim 6, further comprising:
- a light-receiving element for receiving bright and dark patterns formed by the INC pattern;
- an incremental position detection circuit for detecting an incremental position by processing signals output from the light-receiving element; and
- an absolute position outputting circuit for selecting which one of a signal output from the incremental position detection circuit and an ABS position signal output from a correlation circuit in the signal processing circuit is to be output as a position data signal.
8. The absolute position length measurement encoder according to claim 7, wherein the absolute position outputting circuit usually selects the signal output from the incremental position detection circuit, references the same signal to the ABS position signal once every predetermined time interval, outputs the ABS position signal as the position data signal if there is a difference between the positions obtained from the two signals, feeds the position data signal back to the incremental position detection circuit, and simultaneously sets the same position data signal in the inside of the incremental position detection circuit as the current value.
9. The absolute position length measurement encoder according to claim 8, wherein the feedback is carried out when the data are not renewed at a data refreshing rate in the correlation data circuit.
10. The absolute position length measurement encoder according to claim 3, wherein a digital value subjected to arithmetic operations for correlation by the correlation circuit is made into a value binarized by a unit of a minimum line width PABS of the ABS pattern.
11. The absolute position length measurement encoder according to claim 10, wherein the signal processing circuit comprising;
- in the front stage of the correlation circuit, an edge position detection circuit for first binarizing a signal output from the space-dividing number conversion circuit; a peak position detection circuit for preparing a histogram with respect to a position where a value obtained from a signal differentiated and made into an absolute value after being binarized becomes a local maximum value, for each of the minimum line width PABS of the ABS pattern and for obtaining a peak position PK from the histogram; and
- a decoding circuit for processing the peak position PK based on the binarized value of a signal as the position where the pseudorandom code to be decoded is changed over; and
- in the back stage of the correlation circuit, a position data synthesizing circuit for obtaining an accurate absolute position, with respect to a before-ABS-correction position signal output from the correlation circuit, through position correction by shifting the absolute position only by the peak position PK by means of a peak position signal obtained by the peak position detection circuit.
12. The absolute position length measurement encoder according to claim 11, wherein the peak position detection circuit obtains the peak position PK by interpolating respective values of the histogram by fitting a probability distribution function by the least-squares method.
13. The absolute position length measurement encoder according to claim 11, wherein the decoding circuit obtains respective total number of the binarized values in the minimum line width PABS, determines and decodes the code of the minimum line width PABS with a value having a greater total number.
14. The absolute position length measurement encoder according to claim 11, wherein the correlation circuit carries out arithmetic operations for correlation between the decoded pseudorandom code and the design value of the pseudorandom code, and obtains the absolute position of the scale with respect to the light-receiving element.
15. The absolute position length measurement encoder according to claim 11, wherein the position data synthesizing circuit synthesizes position data by adding the peak position PK of the peak position signal to the absolute position of the absolute position signal.
5068529 | November 26, 1991 | Ohno et al. |
5825307 | October 20, 1998 | Titus et al. |
6271661 | August 7, 2001 | Andermo et al. |
7022975 | April 4, 2006 | Horton |
7199355 | April 3, 2007 | Lippuner |
7446306 | November 4, 2008 | Yaku et al. |
7663093 | February 16, 2010 | Kusano |
20010003422 | June 14, 2001 | Andermo et al. |
20060049342 | March 9, 2006 | Lippuner |
20070187583 | August 16, 2007 | Yaku et al. |
20080252906 | October 16, 2008 | Kusano |
20080315076 | December 25, 2008 | Kusano |
20090256065 | October 15, 2009 | Kusano et al. |
20090272886 | November 5, 2009 | Kusano et al. |
20090283667 | November 19, 2009 | Morimoto |
20090294637 | December 3, 2009 | Kusano et al. |
20100140463 | June 10, 2010 | Villaret |
Type: Grant
Filed: May 12, 2009
Date of Patent: Jul 19, 2011
Patent Publication Number: 20090283667
Assignee: Mitutoyo Corporation (Kawasaki-shi)
Inventor: Kouji Morimoto (Kawasaki)
Primary Examiner: John Lee
Attorney: Rankin, Hill & Clark LLP
Application Number: 12/464,358
International Classification: G01D 5/36 (20060101);