Printed circuits with sacrificial test structures
Electrical components may be soldered to a printed circuit. The printed circuit may have an edge with an opening. Printed circuit contacts in the opening may be configured to form electrical connections with mating contacts on a flexible printed circuit or other external structure. A tester may test the electrical components by conveying signals through the contacts. Following testing, the external structure may be removed from the opening. The opening may then be filled with dielectric to isolate the printed circuit contacts. A printed circuit may have traces that extend under a ground on a surface of the printed circuit, may have edge test points formed from contacts that are cut in half when removing portions of the printed circuit, or may have through-mold vias that are formed through encapsulant over the electrical components.
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This relates generally to testing and, more particularly, to test structures for testing electrical components.
Electronic devices include electrical components mounted on printed circuit boards. Shield layers are sometimes formed over the components to reduce electromagnetic signal interference. During manufacturing, it may be necessary to perform tests on electrical components. For example, it may be desirable to probe test points on a printed circuit board after electrical components have been mounted on the printed circuit board. If a faulty component is detected, the printed circuit board may be scrapped or repaired.
To minimize printed circuit board size, some printed circuit board designs include regions with test pad that are machined away after testing. If care is not taken, the structures used for implementing the test pads on a printed circuit board may add undesirable bulk or may be incompatible with electromagnetic interference shielding structures.
It would therefore be desirable to be able to provide improved testing structures for electrical components mounted on printed circuits.
SUMMARYPrinted circuits may be provided with structures such as test pads that facilitate testing. To ensure that the printed circuits are not overly large, the test pads may be removed from a printed circuit following testing or may otherwise be implemented without consuming excessive space on the printed circuit.
A printed circuit may be formed from a dielectric substrate with metal traces. The dielectric substrate may include rigid printed circuit board layers and/or flexible layers of printed circuit material. A printed circuit may, for example, be implemented using an embedded flex printed circuit configuration having a rigid printed circuit board portion with a removable flexible printed circuit tail portion.
Electrical components may be soldered to the printed circuit. The printed circuit may have an edge with an opening. Contacts in the opening may be configured to form electrical connections with mating contacts on a flexible printed circuit or other external structure. A tester may test the electrical components by forming electrical connections with the contacts in the opening and other metal traces in the printed circuit through the mating contacts on the external structure.
Following testing, the external structure that is used by the tester to form electrical connections with the contacts on the printed circuit may be removed from the opening. The opening may then be filled with dielectric to isolate the contacts.
If desired, a printed circuit may have traces that extend under a ground formed on a surface of the printed circuit adjacent to an encapsulation layer, may have edge test points formed form contacts that are cut in half when removing portions of the printed circuit, may have through-mold vias that are formed through encapsulant covering the electrical components, or may have other configurations.
Electronic devices may be provided with electrical components mounted on printed circuits. An illustrative electronic device of the type that may include components on printed circuits is shown in
Input-output circuitry in device 10 such as input-output devices 12 may be used to allow data to be supplied to device 10 and to allow data to be provided from device 10 to external devices. Input-output devices 12 may include buttons, joysticks, click wheels, scrolling wheels, touch pads, key pads, keyboards, microphones, speakers, tone generators, vibrators, cameras, sensors, light-emitting diodes and other status indicators, data ports, displays, etc. A user can control the operation of device 10 by supplying commands through input-output devices 12 and may receive status information and other output from device 10 using the output resources of input-output devices 12.
Control circuitry 16 and input-output devices 12 may include one or more electrical components 14. Components 14 may include integrated circuits, surface mount technology (SMT) parts, discrete components such as inductors, capacitors, and resistors, electronic components such as switches, sensors, connectors, audio components, light-emitting components, or other devices.
Components 14 may be mounted on one or more printed circuits. To ensure that the components are operating properly, tests may be performed on the components.
A flow chart showing how components such as components 14 may be tested during manufacturing is shown in
At step 18, electrical components 14 may be mounted on a printed circuit. For example, conductive material such as conductive adhesive or solder may be used in coupling contacts on a component to mating contacts (e.g., metal traces in the shape of pads) on the printed circuit.
At step 20, the components may be tested. A tester may use test pins and other structures to form electrical connections to the printed circuit. The printed circuit may have, for example, test pads that may be contacted by respective test pins in a tester. If a defect is detected during testing, the printed circuit board can be scrapped or reworked (e.g., to replace a faulty component, etc.).
If the printed circuit and the electrical components on the printed circuit are determined to be operating satisfactorily during the test of step 20, the printed circuit can be processed at step 22.
During the operations of step 22, the printed circuit can be reconfigured to minimize its size. For example, the size of the printed circuit can be reduced by removing sacrificial test structures from the printed circuit. The sacrificial test structures may include test signal paths (e.g., test contacts such as test pads, associated signal lines for coupling the test pads to circuitry in the electrical components, etc.). Portions of the printed circuit such as a printed circuit portion having test pads can be removed using machining equipment or other tools, a removable structure such as a detachable strip of flexible printed circuit material with test pads may be detached from the printed circuit, or other structures with test pads may be removed from the printed circuit to reduce the size of the printed circuit. Because the test pads may be removed before use of the printed circuit in a system, the size and spacing of the test pads (e.g., test pad pitch) may generally be larger than the size and spacing of corresponding test structures in the printed circuit.
Following the operations of step 22, a dielectric material may be used to encapsulate the components on the printed circuit. For example, components 14 and some or all of the printed circuit may be covered with a polymer encapsulant (e.g., a thermoset plastic or a thermoplastic). The encapsulated components may then be covered with electromagnetic interference shielding. For example, one or more layers of metal or other conductive coatings may be formed on the polymer that is encapsulating components 14. By covering the polymer encapsulant that surrounds components 14 with a conductive metal shield layer, components 14 may be electromagnetically shielded.
As shown in
In the example of
In the example of
The ability to reduce the size of embedded flex printed circuit 34 by removing flexible printed circuit portion 36″-2 from the rest of embedded flex printed circuit 34 can be used to implement sacrificial test structures. As shown in
Traces 32-2 in rigid layers 36′ and/or other layers in printed circuit 34 may be used to couple contacts 54 to components on printed circuit 34 such as component 14 (see, e.g.,
Flexible printed circuit 36″-2 serves as a removable sacrificial test structure. Tester 50 uses pins 52 to form electrical connections with respective contacts (test pads) such as test pads 48. Signal lines 32-1 in flexible printed circuit 36″-2 and contacts 56 are used to electrically connect test pads 48 (and therefore tester 50) to printed circuit contacts 54, signal paths 32-2 and the circuitry of components 14. This allows tester 50 to perform tests on the circuitry of components 14. Once testing is complete, flexible printed circuit 36″-2 may be pulled out of opening 58 in printed circuit 34, thereby disconnecting flexible printed circuit 36″-2 from printed circuit 34. Opening 58 may then be filled with plastic or other dielectric, if desired. Shielding may be formed by coating components 14 with a dielectric and by coating the dielectric over components 14 and the dielectric of printed circuit 34 with a metal coating or other conductive layer.
As shown in
As shown in
During testing, external structure 72 may be inserted into opening 102 in printed circuit 34 in direction 74. The tester can then make contact with the contacts in structure 72 that are coupled to the printed circuit contacts in printed circuit 34 to test circuitry mounted on printed circuit 34 of
If desired, a groove or other feature may be formed in the edge of printed circuit 34 to minimize the size of printed circuit 34 when removing a sacrificial extended test portion of the printed circuit following use of the extended test portion and pads on the extended test portion to perform tests on circuitry mounted on printed circuit 34. As shown in
As shown in
Printed circuit 34 may have signal traces that run under a shielding layer. This type of configuration is shown in
As shown in
Following testing, encapsulant 204 may be used to cover components 14, as shown in
As shown in
Dielectric layers 210 may then be used to cover and insulate conductive vias 208 and metal shielding layer 212 may then be deposited as a coating covering encapsulant 204 and the dielectric layers 210 on the upper and lower surfaces of printed circuit 34, as shown in
After testing the components on printed circuit 34 by contacting the surfaces of the conductive vias formed from material 304 of
The foregoing is merely illustrative and various modifications can be made by those skilled in the art without departing from the scope and spirit of the described embodiments. The foregoing embodiments may be implemented individually or in any combination.
Claims
1. Apparatus, comprising:
- a printed circuit board comprising a plurality of printed circuit layers, wherein the printed circuit board has first and second opposing surfaces connected by an edge and at least two of the printed circuit layers are separated by a gap forming an opening along the edge of the printed circuit board;
- conductive traces in the printed circuit layers that form printed circuit contacts in the opening;
- an electrical component mounted directly to the first surface of the printed circuit board, wherein the printed circuit contacts in the opening are coupled to the electrical component by the conductive traces and are configured to mate with contacts on an external structure during testing; and
- dielectric in the opening that covers the printed circuit contacts in the opening after testing.
2. The apparatus defined in claim 1 wherein the conductive traces include ground traces that are exposed along the edge.
3. The apparatus defined in claim 2 further comprising encapsulant covering the electrical component.
4. The apparatus defined in claim 3 further comprising a metal coating on the encapsulant.
5. The apparatus defined in claim 4 wherein the metal coating is shorted to the ground traces that are exposed along the edge and forms an electromagnetic signal interference shield for the electrical component.
6. The apparatus defined in claim 5 wherein the printed circuit layers include at least a first layer on which the electrical component is soldered and at least a second layer, an additional electrical component is soldered to the second layer, the encapsulant includes portions that cover the additional electrical component, and the metal coating covers the encapsulant that covers the electrical component and encapsulant that covers the additional electrical component.
7. A method, comprising:
- forming an embedded flex printed circuit having a rigid printed circuit board portion and a removable flexible printed circuit portion;
- soldering an electrical component on the rigid printed circuit board portion;
- with test pins in a tester, testing the electrical component on the rigid printed circuit board portion by probing test pads on the removable flexible printed circuit portion;
- pulling the removable flexible printed circuit portion out of the rigid printed circuit board portion after testing the electrical components, wherein pulling the removable flexible printed circuit portion out of the rigid printed circuit board portion forms an opening between rigid printed circuit board dielectric layers in the rigid printed circuit board portion along an edge of the rigid printed circuit board portion and the rigid printed circuit board dielectric layers have printed circuit contacts in the opening that are configured to mate with corresponding contacts on the removable flexible printed circuit portion; and
- filling the opening with dielectric to cover the printed circuit board contacts after pulling the removable flexible printed circuit portion out of the rigid printed circuit board portion.
8. Apparatus, comprising:
- a printed circuit substrate with first and second opposing surfaces connected by an edge;
- an electrical component soldered to the first surface of the substrate;
- contacts on the edge of the printed circuit substrate, wherein exposed edge surfaces of the contacts are formed by cutting through the contacts to form the edge of the printed circuit substrate; and
- dielectric covering a first of the contacts on the edge while leaving a second of the contacts on the edge uncovered with dielectric.
9. The apparatus defined in claim 8 further comprising encapsulant covering the electrical component.
10. The apparatus defined in claim 9 wherein the first of the contacts on the edge forms an edge test point and the second of the contacts on the edge comprises a ground contact.
11. The apparatus defined in claim 10 further comprising a metal shielding layer coating the encapsulant, wherein the metal shielding layer is isolated from the first of the contacts by the dielectric and is shorted to the second of the contacts along the edge.
12. Apparatus, comprising:
- a printed circuit substrate;
- electrical components mounted on the printed circuit substrate;
- plastic encapsulant covering the electrical components;
- test pads on the printed circuit substrate;
- through-mold vias filled with conductive material to form conductive vias, wherein the conductive vias are shorted to the test pads;
- dielectric covering the conductive vias; and
- a metal shield coating that covers the plastic encapsulant and the dielectric.
13. The apparatus defined in claim 12 wherein the dielectric covers the conductive vias and portions of the plastic encapsulant.
14. The apparatus defined in claim 13 wherein the printed circuit substrate has opposing upper and lower surfaces, the electrical components comprise a first electrical component soldered to the upper surface and a second electrical component soldered to the lower surface, and the plastic encapsulant covers the first electrical component and the second electrical component.
15. The apparatus defined in claim 14 wherein the conductive vias include conductive vias on the upper surface and the lower surface and the dielectric comprises a first layer of dielectric that covers the conductive vias on the upper surface and a second layer of dielectric that covers the conductive vias on the lower surface.
16. A method of testing electrical components mounted on a printed circuit, wherein the printed circuit has first and second opposing surfaces connected by an edge, the edge has an opening with first and second opposing sides, a first contact is on the first side of the opening, and a second contact is on the second side of the opening, the method comprising:
- contacting the first and second contacts in the opening with respective first and second spring-loaded pins on an external structure;
- with a tester, testing the electrical components by conveying signals through the first and second contacts in the opening using the first and second spring-loaded pins on the external structure; and
- following testing with the tester, removing the external structure from the opening.
17. The method defined in claim 16 wherein contacting the first and second contacts in the opening comprises inserting the external structure into the opening to align the first spring-loaded pin with the first contact and the second spring-loaded pin with the second contact.
18. The method defined in claim 16 further comprising:
- filling the opening with dielectric after removing the external structure from the opening.
19. Apparatus, comprising:
- a printed circuit substrate;
- electrical components mounted on the printed circuit substrate;
- plastic encapsulant covering the electrical components;
- test pads on the printed circuit substrate;
- through-mold vias filled with conductive material to form conductive vias, wherein the conductive vias are shorted to the test pads, the conductive vias are surrounded by and in direct contact with the plastic encapsulant, the conductive vias have an upper surface, and the plastic encapsulant has an upper surface that is coplanar with the upper surface of the conductive vias;
- a planar dielectric layer that covers and directly contacts the upper surface of the conductive vias and the upper surface of the plastic encapsulant; and
- a metal shield coating that covers the plastic encapsulant and the planar dielectric layer.
4922190 | May 1, 1990 | Reinholz |
5315241 | May 24, 1994 | Ewers |
6030254 | February 29, 2000 | Johnson et al. |
6124716 | September 26, 2000 | Kanamori |
7863918 | January 4, 2011 | Jenkins et al. |
8058888 | November 15, 2011 | Wu |
8536875 | September 17, 2013 | Ogle et al. |
20060006892 | January 12, 2006 | Green et al. |
20080048639 | February 28, 2008 | Sutono |
20080233769 | September 25, 2008 | Grover |
20120052697 | March 1, 2012 | Yu |
20120320558 | December 20, 2012 | Foster |
20130257659 | October 3, 2013 | Darnell |
2013163210 | October 2013 | WO |
- Foster et al., U.S. Appl. No. 13/488,382, filed Jun. 4, 2012.
Type: Grant
Filed: Jan 27, 2014
Date of Patent: Apr 11, 2017
Patent Publication Number: 20150212114
Assignee: Apple Inc. (Cupertino, CA)
Inventors: Sean A. Mayo (Mountain View, CA), Shankar S. Pennathur (San Jose, CA)
Primary Examiner: Patrick Assouad
Assistant Examiner: Taqi Nasir
Application Number: 14/164,769
International Classification: B05D 1/02 (20060101); B05D 1/28 (20060101); G01R 31/28 (20060101); H05K 1/02 (20060101); H05K 1/14 (20060101);