Integrated circuit extraction tool
Description
FIG. 1 is a perspective view of a Integrated Circuit Extraction Tool showing my new design;
FIG. 2 is a front elevational view thereof;
FIG. 3 is a rear elevational view thereof;
FIG. 4 is a left side elevational view thereof;
FIG. 5 is a right side elevational view thereof;
FIG. 6 is a top plan view thereof; and,
FIG. 7 is a bottom plan view thereof.
Referenced Cited
Patent History
Patent number: D331527
Type: Grant
Filed: Sep 27, 1990
Date of Patent: Dec 8, 1992
Inventor: Yee-Chang Feng (Tai Chung City, Taiwan)
Primary Examiner: Bernard Ansher
Assistant Examiner: P. Hyder
Law Firm: Varndell Legal Group
Application Number: 7/589,479
Type: Grant
Filed: Sep 27, 1990
Date of Patent: Dec 8, 1992
Inventor: Yee-Chang Feng (Tai Chung City, Taiwan)
Primary Examiner: Bernard Ansher
Assistant Examiner: P. Hyder
Law Firm: Varndell Legal Group
Application Number: 7/589,479
Classifications
Current U.S. Class:
D 8/52