Front panel for a circuit sled module

- Netezza Corporation
Skip to: Description  ·  Claims  ·  References Cited  · Patent History  ·  Patent History
Description

The present invention comprises a front panel for a circuit sled module. It is used to assist in the insertion and extraction of a circuit sled module from a mount or tray which holds several such circuit sled modules.

FIG. 1 shown a front panel attached to a circuit sled module.

FIG. 2 shows a front panel for a circuit sled module viewed from the back.

FIG. 3 shows a front panel for a circuit sled module viewed from the right side.

FIG. 4 shows a front panel for a circuit sled module viewed from the top.

FIG. 5 shows a front panel for a circuit sled module viewed from the front.

FIG. 6 shows a front panel for a circuit sled module viewed from the bottom.

FIG. 7 shows a front panel for a circuit sled module viewed from the left side.

FIG. 8 shows a perspective view of a front panel for a circuit sled module viewed from the front left; and,

FIG. 9 shows a perspective view of a front panel for a circuit sled module viewed from the back right.

A front panel design, as shown in FIG. 1, attaches to a circuit sled module. The broken line showings of the circuit sled module, grounding tabs, hooks and screws are for illustrative purposes only and forms no part of the claimed design.

Claims

The ornamental design for a front panel for a circuit sled module, as shown and described.

Referenced Cited
U.S. Patent Documents
D253887 January 8, 1980 Turner et al.
D268754 April 26, 1983 Chaney et al.
5121295 June 9, 1992 Lam
D357461 April 18, 1995 Zaplatynsky et al.
D360419 July 18, 1995 Weber et al.
5432682 July 11, 1995 Giehl et al.
D409159 May 4, 1999 Wein, Jr.
D415116 October 12, 1999 Creutz et al.
6008995 December 28, 1999 Pusateri et al.
6304456 October 16, 2001 Wortman
Patent History
Patent number: D473197
Type: Grant
Filed: Feb 28, 2002
Date of Patent: Apr 15, 2003
Assignee: Netezza Corporation (Framingham, MA)
Inventor: Eric T. Bovell (Branford, CT)
Primary Examiner: Ted Shooman
Assistant Examiner: Selina Sikder
Attorney, Agent or Law Firm: Hamilton, Brook, Smith & Reynolds, P.C.
Application Number: 29/156,718
Classifications
Current U.S. Class: Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)
International Classification: 1303;