Portion of a printed circuit board

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a front, bottom and right side perspective view of a portion of a printed circuit board, showing our new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom plan view thereof;

FIG. 6 is a right side elevational view thereof;

FIG. 7 is a left side elevational view thereof;

FIG. 8 is an enlarged view thereof showing the portion marked with 8—8 in FIG. 6; and,

FIG. 9 is an enlarged view thereof showing the portion marked with 9—9 in FIG. 5.

The uneven spaced broken lines define the bounds of the claimed design and form no part thereof. The even spaced broken line showing of the printed circuit board is for illustrative purpose only and forms no part of the claimed design.

Claims

The ornamental design for a portion of a printed circuit board, as shown and described.

Referenced Cited
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Patent History
Patent number: D576577
Type: Grant
Filed: May 8, 2007
Date of Patent: Sep 9, 2008
Assignee: Kabushiki Kaisha Toshiba
Inventors: Atsushi Kobayashi (Tokyo), Hiroshi Takei (Tokyo)
Primary Examiner: Selina Sikder
Attorney: Banner & Witcoff, Ltd.
Application Number: 29/279,843