Tray for semiconductor devices with castellations
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Description
The broken line showing of the environment is for illustrative purposes only and forms no part of the claimed design.
Claims
The ornamental design for tray for semiconductor devices with castellations, as shown and described.
Referenced Cited
U.S. Patent Documents
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Patent History
Patent number: D589011
Type: Grant
Filed: Feb 22, 2008
Date of Patent: Mar 24, 2009
Assignee: Centipede Systems, Inc. (San Jose, CA)
Inventor: Thomas H. Di Stefano (Monte Sereno, CA)
Primary Examiner: Selina Sikder
Attorney: Townsend and Townsend and Crew LLP
Application Number: 29/304,013
Type: Grant
Filed: Feb 22, 2008
Date of Patent: Mar 24, 2009
Assignee: Centipede Systems, Inc. (San Jose, CA)
Inventor: Thomas H. Di Stefano (Monte Sereno, CA)
Primary Examiner: Selina Sikder
Attorney: Townsend and Townsend and Crew LLP
Application Number: 29/304,013
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)