Insulation unit cover of semiconductor manufacturing apparatus

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Description

FIG. 1 is a perspective view of an insulation unit cover of semiconductor manufacturing apparatus showing my new design;

FIG. 2 is a front elevational view thereof;

FIG. 3 is a rear elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a right side elevational view thereof;

FIG. 6 is a top plan view thereof;

FIG. 7 is a bottom plan view thereof; and,

FIG. 8 is a cross-sectional view thereof taken in the direction of line 8-8 in FIG. 6.

The dot-dash broken lines FIG. 6 are for reference purposes only; the broken lines form no part of the claimed design.

Claims

I claim the ornamental design for an insulation unit cover of semiconductor manufacturing apparatus, as shown and described.

Referenced Cited
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Foreign Patent Documents
2009194297 August 2009 JP
Other references
  • Ferrotec. <URL: https://quartz.ferrotec.com/products/.> Visited Sep. 12, 2017. Quartz Insulator.
Patent History
Patent number: D818961
Type: Grant
Filed: Jul 28, 2016
Date of Patent: May 29, 2018
Assignee: HITACHI KOKUSAI ELECTRIC INC. (Tokyo)
Inventor: Takatomo Yamaguchi (Toyama)
Primary Examiner: Thomas Johannes
Assistant Examiner: Lauren McVey
Application Number: 29/572,569
Classifications
Current U.S. Class: Insulator (7) (D13/129)