Patents Issued in September 20, 2001
  • Publication number: 20010022505
    Abstract: A rotation detector apparatus and a rotation control apparatus for the DC motor is disclosed wherein rotational operations of a rotor of the DC motor are controlled by detecting at least one of the rotational direction, the rotational speed, the cumulative rotation number, and the rotational position of the rotor. The pulsed output signal from at least one motor rotor rotation detector brush is processed by signal processing circuitry to regulate the at least one of the rotational direction, the rotational speed, the cumulative rotation number, and the rotational position of the rotor.
    Type: Application
    Filed: December 27, 2000
    Publication date: September 20, 2001
    Applicant: RICOH COMPANY, LTD.
    Inventors: Yoshimi Ohno, Ikuya Tsurukawa, Kenji Koyama
  • Publication number: 20010022506
    Abstract: A method for automatically operating a robot, attached to a lawnmower or other unmanned machine, within an enclosed area is disclosed.
    Type: Application
    Filed: April 23, 2001
    Publication date: September 20, 2001
    Inventors: Ehud Peless, Shai Abramson, Gideon Dror
  • Publication number: 20010022507
    Abstract: A motor speed control for controlling the speed of an electric induction motor by modulating the amplitude and frequency of the driving voltage. When the load increases the speed control controls the speed so as to be relatively constant with respect to the frequency of the driving voltage. Preferably, the speed control controls the amplitude of the driving voltage in proportion to the square of the frequency.
    Type: Application
    Filed: January 11, 2001
    Publication date: September 20, 2001
    Inventors: Harry Marinus, Wilhelmus Gerardus Maria Ettes, Gaatze Bareld Bosma, Jacob Dijkstra
  • Publication number: 20010022508
    Abstract: A method of operating an electric three-phase machine with a polyphase winding arrangement in a vehicle. The phases of the winding arrangement are connected to a vehicle network with the aid of power converters and the winding arrangements are interconnected in a first method of connection for motor operation and interconnected in a second method of connection for generator operation. Switching over from one method of connection to the other is performed at an instant at which the three-phase machine changes from the state of picking up torque to outputting torque, or from the state of outputting torque to picking up torque.
    Type: Application
    Filed: February 23, 2001
    Publication date: September 20, 2001
    Inventors: Juergen Lang, Conrad Roessel
  • Publication number: 20010022509
    Abstract: A device for operating a rechargeable storage for electrical energy, comprising a charging module for providing electric power to charge the storage; a data acquisition module for continually acquiring instantaneous operating parameters of the storage during operation; a prediction module having implemented an adaptive model for deriving from data describing a state of the storage before start-up and data acquired in operation and optionally acquired from other expert knowledge predictions about future states of the storage, the model being operable to be automatically optimized continuously using data acquired in operation and optionally using further expert knowledge; a data memory, and a control module for controlling the charging module, the control module being operable to choose an instantaneous charging strategy for the storage depending on predictions derived from the model and on currently acquired operating parameters of the storage.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 20, 2001
    Inventors: Gunter Schulmayr, Dirk A. Fiedler, Hans Leysieffer
  • Publication number: 20010022510
    Abstract: An electrical storage capacitor system that efficiently initializes itself to its initial state during pause intervals between charging/discharging cycles of operation without providing any special initializing cycles. The capacitor system comprises capacitors connected in series to store electricity, a variation decision means for judging the amount of variation in amount of charge between the capacitors, an operation decision means for judging whether the capacitors are being charged or discharged, and a initializing charging means for charging the capacitors to initialize themselves to their initial state according to the results of decisions made by the variation decision means and by the operation decision means.
    Type: Application
    Filed: December 28, 2000
    Publication date: September 20, 2001
    Inventors: Michio Okamura, Akinori Mogami
  • Publication number: 20010022511
    Abstract: A control system for a variable frequency generator is disclosed of the type having a main stator winding for providing a generator output, excited by a main rotor winding, and a main exciter rotor winding for energizing the main rotor winding, excited by a main exciter field winding, the control system having:
    Type: Application
    Filed: February 21, 2001
    Publication date: September 20, 2001
    Inventor: Christopher John Adams
  • Publication number: 20010022512
    Abstract: A comparator 5 changes an output signal from [H] to [L] when a voltage drop VR occurring at a current sensing resistance Rsens becomes greater than a reference voltage VS by a current IL. When the output signal of the comparator 5 is [H], a control circuit 1 outputs a control signal of a duty ratio responsive to the voltage deviation signal outputted from a differential amplification circuit 4 to a switching element 2. When the output signal of the comparator 5 is [L], the control circuit 1 outputs a control signal, which turns off the switching element 2, to the switching element 2. When the switching element 2 is switched, the control circuit 1 connects a filter F of a large time constant to the input side of the comparator 5 by switching off a switching element Tr1 in a predetermined period of time.
    Type: Application
    Filed: March 8, 1999
    Publication date: September 20, 2001
    Inventor: TETSUO TATEISHI
  • Publication number: 20010022513
    Abstract: The invention regards a method and device for the current feed of a mobile communications device in a device comprising at least one dissipation-type voltage regulator (201), such as a linear regulator, in which the first voltage value of the regulator's input voltage (Vs, 211) is decreased with voltage-decreasing means (202-207, 212) to the second voltage value of the input voltage (Vs) compared to the used voltage (Vbat, 208), which is smaller than the first input voltage, to form the voltage regulator's (201) output voltage (Vout, 209).
    Type: Application
    Filed: March 16, 2001
    Publication date: September 20, 2001
    Inventor: Erkki Nokkonen
  • Publication number: 20010022514
    Abstract: A method and apparatus is shown for implementing magnetostrictive sensor techniques for the nondestructive short term inspection or long term monitoring of a structure. A plurality of magnetostrictive sensors are arranged in parallel on the structure and includes (a) a thin ferromagnetic strip that has residual magnetization, (b) that is coupled to the structure with a couplant, and (c) a coil located adjacent the thin ferromagnetic strip. By a transmitting coil, guided waves are generated in a transmitting strip and coupled to the structure and propagate along the length of the structure. For detection, the reflected guided waves in the structure are coupled to a receiving strip and are detected by a receiving magnetostrictive coil. Reflected guided waves may represent defects in the structure.
    Type: Application
    Filed: May 15, 2001
    Publication date: September 20, 2001
    Inventors: Glenn M. Light, Hegeon Kwun, Sang-Young Kim, Robert L. Spinks
  • Publication number: 20010022515
    Abstract: A magnetic resonance imaging apparatus generates an MR signal from an object to be examined by applying a gradient field pulse generated by a gradient field coil and a high-frequency magnetic field pulse generated by a high-frequency coil onto the object in a static field generated by a static field magnet, and reconstructs an image on the basis of the MR signal. The gradient field coil is housed in a sealed vessel. A cable extending from an external power supply and connected to the gradient field coil has predetermined flexibility.
    Type: Application
    Filed: January 19, 2001
    Publication date: September 20, 2001
    Inventors: Masatoshi Yamashita, Manabu Ishii, Yoshitomo Sakakura, Hiromitsu Takamori, Kazuto Nakabayashi, Yoshinori Hamamura, Shinji Mitsui, Yasutake Yasuhara
  • Publication number: 20010022516
    Abstract: The invention relates to a magnetic resonance imaging method which employs multiple magnetic resonance signals from an array of multiple sensors or coils for the reconstruction of images. The method is used in fast dynamic MR imaging. Prior to the formation of the fast dynamic image a normal magnetic resonance image with the fall set of phase encoding steps is acquired for each sensor or coil. Then a subset of phase encoding trajectories is extracted commensurate with the phase encoding trajectories obtained by the fast dynamic imaging and an image is reconstructed from the above mentioned subset. Subsequently, the signals of the fast dynamic image are compared with the signals of the reconstructed image, thus yielding an estimate of the fold-over artefacts of the fast dynamic image. The signals of the fold-over artefacts thus compensate the signals obtained by the fast dynamic imaging and deliver a corrected image without artefact parts.
    Type: Application
    Filed: December 12, 2000
    Publication date: September 20, 2001
    Inventor: Miha Fuderer
  • Publication number: 20010022517
    Abstract: In a method for operating a magnetic resonance device, a magnetic resonance signal is recorded over a span of time, and in order to produce a magnetic resonance spectrum, the magnetic resonance signal in the time domain is subjected to a Fourier transformation. The magnetic resonance signal is weighted with a bell-shaped window function before the Fourier transformation, thereby preventing broadening of resonance lines in the displayed frequency spectrum, so that non-dominant resonance lines, such as those associated with the metabolites, can be more readily analyzed.
    Type: Application
    Filed: March 13, 2001
    Publication date: September 20, 2001
    Applicant: Siemens Aktiengesellschaft
    Inventor: Oliver Heid
  • Publication number: 20010022518
    Abstract: A capacity estimation method for a Li-ion cell is provided. In the method, according to a first aspect, an elapsed time from the time when charge voltage in constant current charge reaches a predetermined voltage to the time when charge condition is changed to a constant voltage mode is used for calculating an estimated capacity of said Li-ion cell. According to a second aspect, a charge current after a lapse of a predetermined time from the time when charge condition is changed to a constant voltage mode is used. According to a third aspect an elapsed time from the time when charge condition is changed to a constant voltage mode to the time when charge current becomes &agr; (0<&agr;<1) times is used.
    Type: Application
    Filed: March 12, 2001
    Publication date: September 20, 2001
    Inventors: Kaoru Asakura, Toshiro Hirai
  • Publication number: 20010022519
    Abstract: A programmable logic array integrated circuit device has a plurality of regions of programmable logic disposed on the device in a two-dimensional array of intersecting rows and columns of regions. The output signals of several regions share a group of drivers for applying region output signals to interconnection conductors that convey signals between regions. This conserves driver resources and increases signal routing flexibility. Various approaches can be used for configuring the interconnection conductors to also conserve interconnection conductor resources. Logic regions may be used to directly drive specific input/output cells, thereby simplifying signal routing to the I/O cells and also possibly simplifying the structure of the I/O cells (e.g., by allowing certain I/O cell functions to be performed in the associated logic region).
    Type: Application
    Filed: May 25, 2001
    Publication date: September 20, 2001
    Applicant: Altera Corporation
    Inventors: Richard G. Cliff, Francis B. Heile, Joseph Huang, Christopher F. Lane, Fung Fung Lee, Cameron McClintock, David W. Mendel, Ninh D. Ngo, Bruce B. Pedersen, Srinivas T. Reddy, Chiakang Sung, Kerry Veenstra, Bonnie I. Wang
  • Publication number: 20010022520
    Abstract: A control circuit of a control part sets the gate potential of a p-channel MOSFET of a driver part to a level lowering from a supply potential by at least the threshold voltage of the p-channel MOSFET while setting the gate potential of an n-channel MOSFET to a level rising from a low level of an input signal by at least the threshold voltage of the n-channel MOSFET in response to the input signal, thereby strongly turning on one of the p-channel MOSFET and the n-channel MOSFET and weakly turning on the other MOSFET.
    Type: Application
    Filed: February 28, 2001
    Publication date: September 20, 2001
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Publication number: 20010022521
    Abstract: For the relation between the first and second pass-transistor circuits (PT1, PT2), the output signal of the preceding-stage is supplied to the gate of the succeeding-stage, and for the relation between the second and third pass-transistor circuits (PT2, PT3), the output signal of the preceding-stage is supplied to the source-drain path of the succeeding-stage. The first pass-transistor circuit (PT1) receives on its first input node (In1) and second input node (In2) the first input signal and the second input signal that are logically independent from each other. This logic circuit requires a smaller number of transistors and is capable of reducing the power consumption and delay and accomplishing an intricate logic function.
    Type: Application
    Filed: May 21, 2001
    Publication date: September 20, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Yasuhiko Sasaki, Kazuo Yano, Shunzo Yamashita, Koichi Seki
  • Publication number: 20010022522
    Abstract: A clock generating circuit for compensating for a delay difference using a closed loop analog synchronous mirror delay structure is provided. The clock generating circuit divides a delay clock signal and a reference clock signal to generate first and second divided signals, and synchronizes an internal clock signal with the reference clock signal using the first and the second divided signals, at the initial stage of an operation. After predetermined clock cycles, the clock generating circuit divides the internal clock signal to generate the first and the second divided signals. The quick synchronization of the internal clock signal with the reference clock obviates any error which may occur between the delay time of a mirror delay circuit and the delay time of an actual circuit.
    Type: Application
    Filed: December 6, 2000
    Publication date: September 20, 2001
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dae-yun Shim, Won-chan Kim
  • Publication number: 20010022523
    Abstract: The PLL (Phase Lock Loop) circuit generates a sampling clock for sampling an analog image signal and a second clock having a frequency equal to that of the sampling clock and a phase different from that of the sampling clock based on the horizontal synchronizing signal supplied together with the analog image signal. The measuring circuit counts the number of pulses of the sampling clock and the number of pulses of the second clock for a predetermined time period. The MPU (Micro Processing Unit) determines whether or not the numbers of pulses of the sampling clock and second clock have been counted correctly based on the number of pulses of the sampling clock and the number of pulses of the second clock. Then, the MPU adjusts the frequency and phase of the sampling clock, when it is determined that the numbers have been counted correctly.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 20, 2001
    Inventor: Kazuhiko Takami
  • Publication number: 20010022524
    Abstract: A delay-locked loop (DLL) circuit having a master-slave structure wherein the DLL circuit includes a master delay loop and a slave stage. The master delay loop delays an external clock signal by a predetermined delay time and generates a feedback signal which is phase-synchronized with the external clock signal. The slave stage delays the external clock signal by the predetermined delay time and generates an internal clock signal. The master delay loop includes a phase comparator, a delay controller, a delay part and a compensation delay part. The slave stage includes a low-pass filter and a slave delay part. The master delay loop may have a structure in which a plurality of delay parts are connected in series. According to the DLL circuit, the high frequency phase noise of the internal clock signal can be minimized in a locked state.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 20, 2001
    Inventor: Kyu-Hyoun Kim
  • Publication number: 20010022525
    Abstract: A MOS-type power device having a drain terminal, a source terminal, and a gate terminal; and a protection circuit having a first conduction terminal connected to the gate terminal, via a diffused resistor, and a second conduction terminal connected to the source terminal. The protection circuit has a resistance variable between a first value and a second value according to the operating condition of the power device. In a first embodiment of the protection circuit, an ON-OFF switch made by means of a horizontal MOS transistor has a control terminal connected to the drain terminal of the power device. In a second embodiment of the protection circuit, the ON-OFF switch is replaced with a gradual-intervention switch made by means of a P-channel JFET transistor having a control terminal connected to the gate terminal of the power device.
    Type: Application
    Filed: January 11, 2001
    Publication date: September 20, 2001
    Inventors: Antonio Grimaldi, Luigi Arcuri, Salvatore Pisano
  • Publication number: 20010022526
    Abstract: A CMOS technology voltage booster having plurality of charge-pump stages cascade connected together and driven by a plurality of phases, each stage having a terminating input node and a terminating output node, with at least one transistor connected therebetween that has its control terminal connected to an internal circuit node of the same stage and applied one of the phases. This voltage booster further includes a pair of additional circuit elements for transferring, onto the internal node, a potential exceeding the voltage at the input node by at least one threshold. A first of the additional elements is essentially a MOS transistor having its control terminal connected to the control terminal of that transistor that is connected between the input and the output of the stage, while the second additional element is an auxiliary capacitor having one end connected directly to the first additional element and connected to the internal node through a transistor.
    Type: Application
    Filed: December 15, 2000
    Publication date: September 20, 2001
    Inventors: Luca Lo Coco, Maurizio Gaibotti
  • Publication number: 20010022527
    Abstract: There is disclosed a semiconductor device, which allows the ripple rejection characteristics to be improved and the operating voltage to be reduced. The semiconductor device comprises a power supply circuit arranged between an input terminal and internal circuits so as to make a connection therebetween, said power supply circuit including a transistor Q41 for supplying each of the internal circuits with a drive voltage and another transistor Q44 for allowing a current to pass therethrough in response to a magnitude of a reference voltage supplied to a base thereof and a magnitude of the drive voltage supplied to an emitter thereof. A part of the circuit composed of transistors Q42, Q43 and a resistor R5 controls a current flowing through of the transistor Q41 based on the current that has passed though the transistor Q44, so that the drive voltage could be set to a value higher than the reference voltage approximately by a magnitude of a forward voltage between the base and the emitter of the transistor Q44.
    Type: Application
    Filed: April 23, 2001
    Publication date: September 20, 2001
    Inventors: Rinya Hosono, Takeyuki Kouchi, Yukinori Kiya, Takashi Sogabe
  • Publication number: 20010022528
    Abstract: A semiconductor circuit for providing decoupling capacitance to an integrated circuit voltage supply that includes a decoupling capacitance comprised of an array of memory cells connected in series at a node and a source of biasing voltage connected to the array of memory cells at the node for maintaining the voltage level at the node lower than the voltage level of the voltage supply.
    Type: Application
    Filed: May 31, 2001
    Publication date: September 20, 2001
    Inventors: Russell J. Houghton, Christopher P. Miller
  • Publication number: 20010022529
    Abstract: A method for coupling a differential signal generated by a digital processing unit includes high-pass filtering the differential signal. The filtered output of the high-pass filter is then provided to an input of a differential amplifier, the output of which is fed back to the input of the differential amplifier.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 20, 2001
    Applicant: Dolphin Interconnect Solutions AS, a Norweigan corporation
    Inventor: Inge Birkeli
  • Publication number: 20010022530
    Abstract: An electronic device is described which includes at least two sampling circuits, and at least two switching stages configured in parallel. Each of the switching stages is coupled to one of the sampling circuits. The sampling circuits and the switching stages enable the electronic device to exhibit more than two quantization states. The electronic device further includes clock generation circuitry for generating independent clock signals for each of the sampling circuits.
    Type: Application
    Filed: February 28, 2001
    Publication date: September 20, 2001
    Applicant: Tripath Technology Inc.
    Inventor: Cary L. Delano
  • Publication number: 20010022531
    Abstract: An integrated power operational amplifier can alternatively be operated in a master or a slave mode, such that a master amplifier can be connected in parallel with one or more slave amplifiers. This arrangement allows very low impedance loads to be driven, as well as allowing the heat dissipation to be distributed over a number of operational amplifiers, thereby raising the maximum dissipation limits of integrated power systems. In addition, by eliminating the ballast resistors, more power can be delivered by the system, for the same supply voltage, and less power is dissipated.
    Type: Application
    Filed: May 25, 2001
    Publication date: September 20, 2001
    Inventors: Giorgio Ghiozzi, Claudio Tavazzani
  • Publication number: 20010022532
    Abstract: This invention relates to a phase and amplitude detector (160) required to identify small signal errors in a signal envelope having a large dynamic range, especially in the context of linearization of a power amplifier (122) arrangement employing a pre-distortion technique. A vector generator (300, 352, 372) responsive to a reference signal R (110) produces a frame of reference vectors R1-Rn (274-280) generated by a combination of the reference signal R (110) with first A (270) and second P (272) offset vectors that provide an amplitude and phase displacement of the reference signal R (110). A signal combiner (290-296, 360-366, 390-396) is arranged to generate difference vectors E1-En by combining the frame of reference vectors R1-Rn (274-280) and the feedback signal F (124, 150), with the difference vectors E1-En expressing the phase (p, 254) and the gain (a, 252) error terms relative to the reference signal R (110) and the first A (270) and second P (272) offset vectors.
    Type: Application
    Filed: January 16, 2001
    Publication date: September 20, 2001
    Inventor: Graham Ainsley Dolman
  • Publication number: 20010022533
    Abstract: An RF-FET bias and fast and controlled switching circuit, apt to ensure a good receiving of all signals from all users sharing the same access network. The circuit is software controlled and uses an open loop regulation for fast transitions and a closed loop adjusting for control of output power and thermal compensations.
    Type: Application
    Filed: March 6, 2001
    Publication date: September 20, 2001
    Inventor: Marco Mariotti
  • Publication number: 20010022534
    Abstract: Disclosed is a power amplifier, which can lessen distributive and synthetic losses, minimize the size and realize a high effective signal wave thereof. The power amplifier comprises phase converters allocated at front and rear ends of the amplifying elements to include inductors employing an air core coil having a high Q value in a high frequency band, where the phase converter located at the front end of the amplifying elements distributes an input signal to an antiphase signal with the same oscillating width so as to be amplified by the amplifying elements, and the phase converter located at the rear end of the amplifying elements synthesizes and outputs the antiphase signal amplified by the amplifying elements.
    Type: Application
    Filed: March 14, 2001
    Publication date: September 20, 2001
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Norihisa Otani
  • Publication number: 20010022535
    Abstract: Resonator comprising first and second balanced integrators (I1, I2) each composed with a balanced amplifier and having a non-inverting (in+) and an inverting (in−) input terminal, as well as a non-inverting (out+) and an inverting (out−) output terminal. First and second coupling circuits (Y1, Y2) are interconnected between the non-inverting output terminal (out+) of the first integrator (I1) and the non-inverting input terminal (in+) of the second integrator (I2) and between the inverting output terminal (out−) of the first integrator (I1) and the inverting input terminal (in−) of the second integrator (I2) respectively.
    Type: Application
    Filed: March 12, 2001
    Publication date: September 20, 2001
    Inventor: Eduard Ferdinand Stikvoort
  • Publication number: 20010022536
    Abstract: The invention relates to a method for adjusting an oscillator (44), a packet switched network (21) locating between the oscillator and a specified time source (31), which knows a clock time with a specified accuracy. In the method, a clock (42), which is on the same side of the packet switched network (21) as the adjustable oscillator (44), is updated over the packet switched network (21) on the basis of the clock time known to said time source (31). Said clock (42) is used in the adjustment of the oscillator (44) for making the oscillator (44) to oscillate at a desired frequency. The invention also relates to an apparatus and computer software for adjusting the oscillator.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 20, 2001
    Inventors: Janne Kallio, Ari Helaakoski
  • Publication number: 20010022537
    Abstract: A prescaler is used for generating an output frequency from an input frequency by fractional division. It comprises a component signal composer (402) arranged to generate a number of parallel component signals that differ in phase from each other. Additionally it comprises a controllable phase selector (403) arranged to respond to a control signal by either selecting a constant number of unchanged ones of the parallel component signals or to repeatedly change its selection among the parallel component signals. The component signal composer (402) is arranged to generate more than four parallel component signals for the phase selector (403) to choose from.
    Type: Application
    Filed: March 9, 2001
    Publication date: September 20, 2001
    Inventors: Jari Markus Melava, Mikael Goran Svard
  • Publication number: 20010022538
    Abstract: In a frequency synthesizer with a phase locked loop a charge pump (2) is present with an idle path (5-C, 6-C, 7, 8). The idle path (5-C, 6-C, 7, 8) is activated only shortly before an up or down pulse appears at an output (15, 16) of a phase frequency detector (1) and the idle path (5-C, 6-C, 7, 8) is disabled shortly after the disappearance of an up or down signal. Means (20) to generate a signal for controlling the enablement and disablement of the idle path (5-C, 6-C, 7, 8) may comprise a down-counter divider (30) or a zipper divider (35).
    Type: Application
    Filed: March 12, 2001
    Publication date: September 20, 2001
    Inventor: Matthias Locher
  • Publication number: 20010022539
    Abstract: A voltage controlled crystal oscillator (VCXO) 25, for example, as used in a mobile communications terminal 23, has its output frequency Fref stabilised against temperature drift using frequency correction information received, for example, in a downlink signal 35 from a base station 33. A controller 31 uses the frequency correction information to produce a digital value 39 which is supplied to a DAC 29 which controls the output frequency of the VCXO 25. While the frequency is being stabilised in this manner, compensation values are determined based on the DAC value 39 and temperature values from a temperature ADC 45, and stored in memory 41. When the correction information ceases to be available, the compensation values from the memory 41 are used to compensate for temperature fluctuations. Each compensation value corresponds to a linear temperature region, and relates to the gradient for that temperature region.
    Type: Application
    Filed: March 6, 2001
    Publication date: September 20, 2001
    Inventor: Peter Jakobsson
  • Publication number: 20010022540
    Abstract: The present invention teaches a system for selectably oscillating at a first or a second oscillating frequency. The system comprises an oscillator for providing an oscillating output. Moreover, the system comprises a switching device for selecting a first or a second impedance in response to a select signal having a voltage. Each of the first and second impedances are fixed independently of the select signal voltage such that the oscillating output oscillates at the first oscillating frequency when the first impedance is provided and oscillates at the second oscillating frequency when the second impedance is provided.
    Type: Application
    Filed: April 16, 2001
    Publication date: September 20, 2001
    Applicant: UT Automotive Dearborn, Inc.
    Inventor: John P. Hill
  • Publication number: 20010022541
    Abstract: A micro-machine switch which causes a contact electrode to make contact with or separate away from a signal line formed on a substrate, to thereby turn on or off the signal line, includes (a) first to N-th lower electrodes formed on the substrate, wherein N is an integer equal to or greater than 2, (b) first to N-th upper electrodes supported facing the first to N-th lower electrodes, respectively, and (c) an electrode supporter for vertically raising and lowering the first to N-th upper electrodes between a first position where the contact electrode makes contact with the signal line when electrostatic force is generated between the first to N-th upper electrodes and the first to N-th lower electrodes, respectively, and a second position where the contact electrode is separated away from the signal line when the electrostatic force is not generated.
    Type: Application
    Filed: March 16, 2001
    Publication date: September 20, 2001
    Inventors: Shigeru Kasai, Kenichirou Suzuki, Yoshinori Ota, Tatsumi Ide
  • Publication number: 20010022542
    Abstract: A dielectric filter, a transmission-reception shared unit, and a transceiver, which incorporate the filter, are disclosed; in which spurious modes such as HE110 mode, HE210 mode, HE310 mode, etc., can be suppressed so as to improve blocking-band attenuation characteristics. The dielectric filter comprises a dielectric plate; electrodes having electrodeless parts, which are formed on both main surfaces of the dielectric plate so as to form dielectric resonators; and probes disposed parallel to the line along which the dielectric resonators are aligned.
    Type: Application
    Filed: December 29, 2000
    Publication date: September 20, 2001
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Toshiro Hiratsuka, Tomiya Scnoda, Kenichi Iio
  • Publication number: 20010022543
    Abstract: A resonator includes a conductive casing provided with a threaded screw hole, a screw at least partially inserted into the casing, and a fixing member fixing the screw and having a threaded screw hole. In the resonator, the linear expansivity of the casing and the linear expansivity of the fixing member, and preferably also that of the screw, are substantially equal.
    Type: Application
    Filed: March 9, 2001
    Publication date: September 20, 2001
    Inventors: Masamichi Ando, Norihiro Tanaka, Hidekazu Sasai
  • Publication number: 20010022544
    Abstract: The present invention provides a surface acoustic wave filter having an unbalance-to-balance conversion function and an impedance conversion function. This surface acoustic wave filter includes a piezoelectric substrate, a first surface acoustic wave filter that is made up of input and output interdigital transducers (IDTs), and a second surface acoustic wave filter that is also made up of input and output IDTs. The phase difference between the first. surface acoustic wave filter and the second surface acoustic wave filter is approximately 180°. The input IDT of the first surface acoustic wave filter is connected to the input IDT of the second surface acoustic wave filter by a connecting wire, and a terminal extending from this connecting wire serves as an unbalanced terminal.
    Type: Application
    Filed: December 27, 2000
    Publication date: September 20, 2001
    Inventors: Gou Endoh, Osamu Kawachi, Masanori Ueda
  • Publication number: 20010022545
    Abstract: A surface acoustic wave device includes a piezoelectric substrate, a first plurality of resonator which is connected in series and formed on said piezoelectric substrate, a second plurality of resonator which is connected in parallel, and formed on said piezoelectric substrate, a input signal line receiving input signals, a floating electrode being in a floating state and a wire connecting a point of said input signal line to said floating electrode.
    Type: Application
    Filed: March 15, 2001
    Publication date: September 20, 2001
    Inventor: Wataru Ohashi
  • Publication number: 20010022546
    Abstract: A filter for electric signals has a substrate, a vibrating body capable of vibrating with at least two antipodes deflected in phase opposition relative to the substrate and has electrodes connected to a signal input and a signal output for electric excitation and for detection of the vibration of the vibrating body. The electrodes for detecting the vibration, each assigned to antipodes deflected in phase opposition, are connected to two separate terminals of the signal output.
    Type: Application
    Filed: March 14, 2001
    Publication date: September 20, 2001
    Inventors: Wilhelm Frey, Karsten Funk
  • Publication number: 20010022547
    Abstract: A small-sized multilayer inductor having a greatly increased inductance value includes two thin-film coils with an insulation layer interposed therebetween, the coils being disposed on a coil-winding portion of a wound-core member. At positions opposing flanges of the wound-core member, two terminal electrodes for a first thin-film coil are respectively provided. To one of the two terminal electrodes, the starting end of the first thin-film coil is electrically connected via one connection opening while the finishing end of the first thin-film coil is electrically connected to the other terminal electrode via the other connection opening. Similarly, at positions opposing the flanges of the wound-core member, two terminal electrodes, which are electrically connected to a second thin-film coil, are respectively provided.
    Type: Application
    Filed: March 12, 2001
    Publication date: September 20, 2001
    Inventors: Satoshi Murata, Hideyuki Mihara, Etsuji Yamamoto, Yoshihiro Nishinaga, Minoru Tamada
  • Publication number: 20010022548
    Abstract: In a transformer (13) having a primary winding (19) and a secondary winding (20) and a primary magnet core (21) with at least one primary end face (22) and a secondary magnet core (23) with at least one secondary end face (24) and insulation means in a gap (25) between the at least one primary end face (22) and the at least one secondary end face (24), the insulation means are formed with the aid of a mounting plate (26) which is suitable as a mounting plate (26) for a printed circuit.
    Type: Application
    Filed: January 25, 2001
    Publication date: September 20, 2001
    Inventor: Rudolf Josef Hasler
  • Publication number: 20010022549
    Abstract: An electrically controllable motor vehicle door lock, a motor vehicle door lock system with such a motor vehicle door lock, and a process for controlling the motor vehicle door lock. Simple and optimum adjustability of the functionality of the motor vehicle door lock is enabled by storing control parameters which determine the functionality of the motor vehicle door lock in an electrical storage. The control parameters are adaptable and can be changed so that the functionality of the motor vehicle door lock is fixed by its control parameters. Moreover, different control parameters or sets of control parameters can be used for different functioning states or closing states of the motor vehicle door lock, and therefore, the conditions for the passage from one state into another state of the motor vehicle door lock can be fixed regardless of which states or combination possibilities occur.
    Type: Application
    Filed: January 16, 2001
    Publication date: September 20, 2001
    Inventors: Ingo Mauel, Rainer Josef Berger
  • Publication number: 20010022550
    Abstract: A monitoring device for vehicles has a housing and at least one mirror glass arranged in the housing so as to have a front side facing an observer. The at least one mirror glass has a reflective layer being reflective in the visible spectral range of light. At least one camera is arranged behind the reflective layer in a viewing direction viewed from the front side. The monitoring device can be used for driver identification, monitoring the driver's condition, identifying passengers and passenger positions, controlling airbags, theft surveillance, and similar purposes.
    Type: Application
    Filed: January 26, 2001
    Publication date: September 20, 2001
    Applicant: Reitter & Schefenacker Gmbh & Co. KG
    Inventor: Hans-Clemens Steffel
  • Publication number: 20010022551
    Abstract: The present invention is a novel technique and system that allows the pressure of a tire to be remotely monitored by sensing a tire parameter indicative of the tire's pressure without mounting any device on the tire itself, while the tire is or is not rotating. In the illustrative embodiment, a tire parameter indicative of the pressure inside the tire, such as the temperature, acoustical signature, or shape of the tire, is measured remotely with a remotely mounted sensor. The measured parameter is compared to a range of known acceptable limits for that particular parameter, and a warning signal is generated if the measured parameter is not within that range of acceptable limits.
    Type: Application
    Filed: May 17, 2001
    Publication date: September 20, 2001
    Inventor: Ronald J. Barnett
  • Publication number: 20010022552
    Abstract: Tamper detection and prevention for an object control and tracking system and particularly a Key Track system is provided. Where objects being tracked are keys, a key card having a touch memory device, RF id tag, or other circuitry for storing and transmitting an ID to a controller is provided. A tether attaches a key to the card. In one embodiment, the tether is conductive and the transmission of the ID code passes through the tether. If the tether is cut, transmission is interrupted to indicate a tampering condition. In another embodiment, the tether is resistive and circuitry is provided to monitor a voltage drop across the tether. A change in the voltage drop indicates a tampering condition. An object of the invention is to detect an attempt to remove the key (or other object) from its ID card while leaving the card intact.
    Type: Application
    Filed: May 22, 2001
    Publication date: September 20, 2001
    Applicant: Key-Trak, Inc.
    Inventor: William C. Maloney
  • Publication number: 20010022553
    Abstract: A vehicle display system includes a display which is selectively movable between a first position in which it is viewable by a driver and a second position in which it is viewable by the rear passengers but not the driver. In the first position, the display provides a rear view from a camera mounted at the rear of the vehicle. In the second position, the display provides entertainment to the passengers in the rear seats.
    Type: Application
    Filed: January 29, 1999
    Publication date: September 20, 2001
    Inventors: SILVIU PALA, PHIL LEMAY, SCOTT SHIELDS, TERENCE DUNCAN, MICHAEL MAASS, JOSEPH STEVENS, JOHN MCCONNELL, JEROME NG, OZER M.N. TEITELBAUM
  • Publication number: 20010022554
    Abstract: The invention relates to a method of converting a stream of databits of a binary information signal into a stream of databits of a constrained binary channel signal. This stream of databits of the binary information signal is divided into n-bit information words. These information words are converted into m1-bit channel words, in accordance with a channel code C1, or m2-bit channel words, in accordance with a channel code C2, where m1, m2 and n are integers for which it holds that m2>m1≧n. The m2-bit channel word is chosen from of at least two m2-bit channel words, at least two of which have opposite parities, the concatenated m1-bit channel words and the m2-bit channel words complying with a runlength constraint of the binary channel signal.
    Type: Application
    Filed: January 8, 2001
    Publication date: September 20, 2001
    Inventor: Willem Marie Julia Marcel Coene