Patents Issued in February 20, 2003
  • Publication number: 20030035455
    Abstract: An integrated tunable laser structure comprising a substrate made of semiconductor material, the substrate (1; FIG. 2) comprising a first (2), a second (3), and a third (4) section. The first section (2) provides a low-selective interferometric filtering together with an amplification of a light wave resonating in the laser structure. The second section (3) provides continuous fine-tuning and phase adjustment of the light wave, and the third section (4) provides a wavelength selective reflection of the light wave. Each section allows current injection, wherein a current into the first section (2) causes a wavelength shift of the low-selective interferometric filtering, a current into the second section (3) causes a wavelength shift of resonator modes, and a current into the third section (4) causes a wavelength shift of the wavelength selective reflection.
    Type: Application
    Filed: April 10, 2002
    Publication date: February 20, 2003
    Applicant: Agilent Technologies, Inc.
    Inventor: Wolf Steffens
  • Publication number: 20030035456
    Abstract: A common assembly structure of laser diode and PIN detector comprises a subassembly structure formed by connecting a laser diode to a submount made of low-capacitance material, and the sub-assembly structure is then implemented on a PIN detector. The so-called laser diode comprises a vertical cavity surface emitting laser (VCSEL) and an edge-emitting laser (EEL), wherein the EEL further comprises, for example, a Fabry-Perot Laser (F-P Laser) and a Distributed Feedback Bragg Laser. The common assembly structure of laser diode and PIN detector completely separates the anode and cathode of the semiconductor laser from the anode and cathode of the PIN detector thereby effectively reducing the parasitic capacitance effect derived from the PIN detector itself and the assembly structure, and is suitable for use in the high-speed laser driving circuits.
    Type: Application
    Filed: August 6, 2002
    Publication date: February 20, 2003
    Applicant: TrueLight CORPORATION
    Inventors: Yung-Sen Lin, Fu-Hsing Hou, Chih-Hao Chang, Kuo-Jen Chen
  • Publication number: 20030035457
    Abstract: A photodiode configuration having at least two photodiodes is described. Accordingly, the photodiodes are formed in a symmetrical configuration on a common carrier, and electrical contacts are situated in a region between the photodiodes. It is therefore possible, in particular, to use monitor diode configurations of identical construction at the two sides of a laser diode array. Accordingly, a laser diode configuration having a correspondingly configuration having a photodiode configuration is further disclosed. Finally, a method for connecting a photodiode configuration to a submount is specified.
    Type: Application
    Filed: August 14, 2002
    Publication date: February 20, 2003
    Inventor: Martin Franke
  • Publication number: 20030035458
    Abstract: A system for producing singlet delta oxygen has a source of liquid oxygen. A reactor has an input connected to the source of liquid oxygen. An optical pump is connected to an optical input of the reactor. The system can be by used as a laser by placing an optical resonator and a source of molecular iodine near the output of the reactor.
    Type: Application
    Filed: July 18, 2002
    Publication date: February 20, 2003
    Inventors: David K. Neumann, Thomas L. Henshaw
  • Publication number: 20030035459
    Abstract: A semiconductor laser includes first and second laser cavities. The first and second cavities share a common optical gain medium and lase at different wavelengths.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 20, 2003
    Inventors: William Larry Wilson, Jin Z. Zhang
  • Publication number: 20030035460
    Abstract: Methods of and systems for illuminating objects using planar laser illumination beams having substantially-planar spatial distribution characteristics that extend through the field of view (FOV) of image formation and detection modules employed in such systems. Each planar laser illumination beam is produced from a planar laser illumination beam array (PLIA) comprising an plurality of planar laser illumination modules (PLIMs). Each PLIM comprises a visible laser diode (VLD, a focusing lens, and a cylindrical optical element arranged therewith. The individual planar laser illumination beam components produced from each PLIM are optically combined to produce a composite substantially planar laser illumination beam having substantially uniform power density characteristics over the entire spatial extend thereof and thus the working range of the system.
    Type: Application
    Filed: March 21, 2002
    Publication date: February 20, 2003
    Applicant: Metrologic Instruments, Inc.
    Inventors: Constantine J. Tsikos, C. Harry Knowles, Timothy A. Good, Patrick A. Giordano
  • Publication number: 20030035461
    Abstract: Methods of and systems for illuminating objects using planar laser illumination beams having substantially-planar spatial distribution characteristics that extend through the field of view (FOV) of image formation and detection modules employed in such systems. Each planar laser illumination beam is produced from a planar laser illumination beam array (PLIA) comprising an plurality of planar laser illumination modules (PLIMs). Each PLIM comprises a visible laser diode (VLD, a focusing lens, and a cylindrical optical element arranged therewith. The individual planar laser illumination beam components produced from each PLIM are optically combined to produce a composite substantially planar laser illumination beam having substantially uniform power density characteristics over the entire spatial extend thereof and thus the working range of the system.
    Type: Application
    Filed: March 22, 2002
    Publication date: February 20, 2003
    Applicant: Metrologic Instruments, Inc.
    Inventors: Constantine J. Tsikos, C. Harry Knowles, Michael D. Schnee, Timothy A. Good
  • Publication number: 20030035462
    Abstract: The level detection device has a heat sensitive device, a heat device, and a processor for controlling the operation of measurement. The level detection device is externally mounted to tanks. The level detection device heats the heat sensitive device and monitors the output of the heat sensitive device. The date obtained by the level detection device is transferred to an external device.
    Type: Application
    Filed: August 20, 2002
    Publication date: February 20, 2003
    Inventor: Paul-Andre Savoie
  • Publication number: 20030035463
    Abstract: A method and system for automated temperature measurement is described. The system includes a programmable logic controller, a temperature measurement diode, an analog-to-digital converter coupled to the diode and the programmable logic controller, a current source coupled to the diode and configured to generate a first current and a second current different from said first current, and a processor coupled to the current source and to the analog-to-digital converter. The processor controls the current source such that the current source sequentially applies the first current to the diode at a first point in time and applies the second current to the diode at a second point in time. The processor also receives a first voltage across the diode measured when the first current is applied to the diode and a second voltage across the diode measured when the second current is applied to the diode. Based on the first and second voltages, the processor determines the temperature proximate the diode.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 20, 2003
    Applicant: Schneider Automation Inc.
    Inventor: Richard H. Breinlinger
  • Publication number: 20030035464
    Abstract: A method and apparatus for facilitating handoff from a network access point (NAP) that is arranged and constructed to provide service to a communications unit (CU) in a frequency hopped communications system is disclosed. The operations that are performed are providing service between the CU and the NAP on a connection using a first frequency hopping pattern (FHP); determining that the connection is suitable for discontinuation based on RSSI or load; sending a first message including an ID for the NAP and schedule for the CU to neighboring NAPS, the message requesting assistance with the service on the first FHP; and receiving a second message from a neighboring NAP, arranged and constructed to provide connections to CUs using a second FHP, the second message indicating that assistance can be provided by the neighboring NAP.
    Type: Application
    Filed: February 28, 2001
    Publication date: February 20, 2003
    Inventors: Leo Dehner, Phillip David Neumiller, Richard Allen Comroe, Charles W. Bethards
  • Publication number: 20030035465
    Abstract: A radio communications system in which a desired signal can be accurately discriminated from interfering signals, even when signals from a plurality of transmitters are received simultaneously, is provided. A transmitter for this system communicates information using signals which are repeated over predetermined periods. A pulse generator generates pulses having a predetermined repetition period based on an information bit to be communicated. Transmission means transmit the pulses generated by the pulse generator. Pulse amplitude alterating means control the amplitude of the pulses to be transmitted by the transmitting means in accordance with a predefined pattern under the control of a control unit.
    Type: Application
    Filed: August 9, 2002
    Publication date: February 20, 2003
    Inventor: Kazuhisa Takamura
  • Publication number: 20030035466
    Abstract: A technique for allowing a first and second group of users to share access to a communication channel such as a wireless radio channel is disclosed. The first group of users can be a group of legacy users such as those that use digital CDMA cellular telephone equipment based on the IS-95 standard. The second group of users can be a group of web surfers that code their transmissions using one of multiple formats. The first group of users can share one modulation structure such as, on a reverse link, using unique phase offsets of a common pseudorandom noise (PN) code. The second group of users can share another modulation structure, but in a manner that is consistent and compatible with the users of the first group. Specifically, the users of the second group may all use the same PN code and code phase offset. Each channel used by the second group of users can be uniquely identified by a corresponding unique orthogonal code.
    Type: Application
    Filed: July 15, 2002
    Publication date: February 20, 2003
    Applicant: Tantivy Communications, Inc.
    Inventors: James A. Proctor, Pertti O. Alapuranen
  • Publication number: 20030035467
    Abstract: Disclosed is a communication system in which it is possible to detect a TFI (Transport Format Indicator) even if a TFCI (Transport Format Combination Indicator) cannot be decoded correctly. The system includes a transmitting apparatus which, when a transmission is made, encodes transmit data of each transport channel (TrCH) at a prescribed transmission time interval (TTI), partitions the encoded data at a frame period to obtain frame data of a prescribed bit length, multiplexes and transmits the frame data of each TrCH and transmits TFCI information that specifies the frame data length of each TrCH. The system includes a receiving apparatus for comparing, on a per-TrCH basis, the TFIs of a plurality of frames within a transmission time interval (TTI) conforming to the TrCH and, if TFIs differ, deciding the transport format (TFI) in this transmission time interval (TTI) by majority decision, etc.
    Type: Application
    Filed: January 3, 2002
    Publication date: February 20, 2003
    Inventor: Masatsugu Shimizu
  • Publication number: 20030035468
    Abstract: Method and apparatus to compute the combiner coefficients for wireless communication systems using an adaptive algorithm. One embodiment trains the weights on a signal known a priori that is time multiplexed with other signals, such as a pilot signal in a High Data Rate, HDR, system, wherein the signal is transmitted at full power. The adaptive algorithm recursively computes the weights during the pilot interval and applies the weights generated to the traffic signals. In one embodiment, the algorithm is a recursive least squares algorithm employing a transversal filter and weight calculation unit.
    Type: Application
    Filed: May 17, 2001
    Publication date: February 20, 2003
    Inventors: Ivan Jesus Fernandez Corbaton, John Edward Smee, Srikant Jayaraman
  • Publication number: 20030035469
    Abstract: The present invention provides linear MMSE equalization with parallel interference cancellation for symbol determination in a forward link of a CDMA communication system which has a plurality of code channels in use. Use of the linear MMSE equalization with parallel interference cancellation of the present invention provides significantly increased performance. The preferred method linearly filters a received signal to form a first filtered signal (410), despreads and demodulates the first filtered signal (415, 420) and provides a plurality of symbol estimates for all corresponding code channels (430). An estimated transmitted signal is generated from the plurality of symbol estimates (435), and with a channel estimate (405), an estimated received signal is generated (440).
    Type: Application
    Filed: August 20, 2001
    Publication date: February 20, 2003
    Inventors: Colin D. Frank, Eugene Visotsky, Prashant Choudhary, Amitava Ghosh
  • Publication number: 20030035470
    Abstract: The present invention is a method and apparatus to remove the adverse effects due to the imbalance between in-phase (I) and quadrature (Q) channels for I-Q demodulators and modulators in multi-carrier systems. A first balancer generates a first balancing signal from a first signal of a first index corresponding to a first frequency. A first combiner combines the first balancing signal and a second signal of a second index corresponding to a second frequency. The second frequency is symmetrical to the first frequency with respect to a center frequency in a multi-carrier composite signal. The first combiner generates a first balanced signal corresponding to the second frequency.
    Type: Application
    Filed: August 2, 2001
    Publication date: February 20, 2003
    Inventor: Jian Gu
  • Publication number: 20030035471
    Abstract: The present invention is directed to an integrated access device (IAD) that provides multiple communication interfaces for communications to a variety of service providers. The disclosed IAD acts as a DSL modem and combines the functions of a gateway, router, and Ethernet hub to provide high-speed Internet access to PCs sharing a local network. It provides the networking functions that let PCs connect through a variety of methods, including traditional Ethernet, wireless, universal serial bus (USB), and home phoneline networking alliance (HPNA). It also provides point-to-point protocol over Ethernet (PPPOE) tunneling through network address translation (NAT).
    Type: Application
    Filed: July 12, 2002
    Publication date: February 20, 2003
    Inventor: George Pitsoulakis
  • Publication number: 20030035472
    Abstract: A power supply distributor according to the invention permits to broadcast data received in phantom mode at one of its port to at least few of the other ports such that the respective apparatus connected to said power supply distributor will receive them. Main characteristics are the modems for at least few of the communications links, while said modems being connected between each other through a multiplexer. Optionally, said multiplexer is setup with a switching function. This enables advantageously to select the ports to which received data in phantom mode will be forwarded allowing to buildup a communications link between different apparatus, such link being based solely on transmission of data in phantom mode. Such links can be setup in a bi-directional modus between at least two apparatus. This allows to design a new ghost network mapped on an existing network and based on transmission of data in phantom mode.
    Type: Application
    Filed: August 19, 2002
    Publication date: February 20, 2003
    Applicant: ALCATEL
    Inventors: Michel Mouton, Raymond Gass, Michel Le Creff
  • Publication number: 20030035473
    Abstract: A data transceiver including a self-test data generator for generating test data, which includes a first pseudo-random number generator capable of generating a digital word. The first pseudo-random number generator is also programmable so as to allow the operator to input the test data values. The data transceiver further includes a transmitter section coupled to the self-test data generator, which is operable for receiving the test data and processing the test data in the same manner as any other data to be transmitted by the transmitter section. The data transceiver also includes a receiver section coupled to the transmitter section, which is operable for receiving the test data output by the transmitter section and for processing the test data in the same manner as any other data to be received by the receiver section.
    Type: Application
    Filed: August 16, 2001
    Publication date: February 20, 2003
    Inventor: Jun Takinosawa
  • Publication number: 20030035474
    Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs variable delay FIR equalizer in the transmitter module to increase the system performance in channel communications.
    Type: Application
    Filed: August 16, 2002
    Publication date: February 20, 2003
    Inventors: James Gorecki, John T. Stonick
  • Publication number: 20030035475
    Abstract: The invention relates to a method of video processing applied to N encoded video input signals, for decoding and reducing by a factor N the format of said encoded video input signals, and for generating a set of decoded video signals in the pixel domain, each encoded video input signal comprising DCT blocs. The method according to the invention is characterized in that it comprises a first and second inverse DCT step, each inverse DCT step being applied simultaneously on a plurality of DCT blocs of reduced size extracted from said N encoded video input signals. Thus are generated N output blocs of reduced size defining one of said decoded video signal of reduced format by a factor N.
    Type: Application
    Filed: March 22, 2002
    Publication date: February 20, 2003
    Inventors: Joseph Adelaide, Robin Didier, Olivier Elbaz
  • Publication number: 20030035476
    Abstract: A bit-plane processor reads out a code block, which serves as a unit for arithmetic coding, from an SRAM. After converting the code block to the form of a bit-plane, the bit-plane processor supplies bit data to a pass processor. The pass processor includes an s pass processor, an r pass processor and a c pass processor. Each of s pass, r pass and c pass processings are executed in parallel in a state such that start time thereof is shifted by a predetermined unit time by operation of two delay units.
    Type: Application
    Filed: July 10, 2002
    Publication date: February 20, 2003
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Tatsushi Ohyama, Yuji Yamada, Hideki Yamauchi
  • Publication number: 20030035477
    Abstract: In partitioning and encoding an image into multiple regions, the degree of freedom of the region shape has generally been low and setting regions based on image features was difficult. A moving image encoding apparatus includes a region partitioning section, an encoder, and a memory for motion-compensated prediction. The region partitioning section includes a partitioning processing section and a integration processing section. The partitioning processing section partitions the input image based on a criterion relating to the state of partition. The integration processing section integrates mutually close regions based on a criterion relating to the state of integration. Thereafter, each region is encoded. A large variety of region shapes can be produced by the integration processing section.
    Type: Application
    Filed: October 24, 1997
    Publication date: February 20, 2003
    Inventors: SHUNICHI SEKIGUCHI, YOSHIMI ISU, KOHTARO ASAI
  • Publication number: 20030035478
    Abstract: The present invention relates to a method and apparatus for producing a fully scalable compressed representation of video sequences, so that they may be transmitted over networks, such as the Internet, for example. Because the signal is scalable, users receiving the signal can obtain the signal at the appropriate resolution and quality that their system will handle or that they desire.
    Type: Application
    Filed: June 14, 2002
    Publication date: February 20, 2003
    Inventor: David Taubman
  • Publication number: 20030035479
    Abstract: The invention relates to a method of using MPEG-7 in object segmentation to extract a desired moving or still image object. The method includes extracting the feature of an existing video object Plane (VOP) by MPEG-7 technique and storing it in an MPEG-7 database, segmenting an input image into a plurality of objects by using the watershed process, comparing each of the plurality of objects to the stored object descriptor feature, and extracting the shape and position of the most similar object in the input image.
    Type: Application
    Filed: November 21, 2001
    Publication date: February 20, 2003
    Applicant: NATIONAL CHUNG CHENG UNIVERSITY
    Inventors: Ming-Cheng Kan, Chung J. Kuo
  • Publication number: 20030035480
    Abstract: In a Fine Granular Video encoding system, a method for determining the number of transmission bits of SNR encoded and temporally encoded video data within a frame to balance image quality and object motion is presented. In accordance with the principles of the invention, a number of transmission bits at a known bit-rate for a quality enhanced video frame and a temporal enhanced video frame is determined to balance image quality and object motion smoothness. In one aspect of the invention, the number of bits transmitted in each frame is determined by comparing a ratio of a measure of video encoded information within the quality enhanced video frame and a measure of video encode information within the quality enhanced video frame and the temporally enhanced video frame to a known threshold level. The number of transmission bits in each enhancement layer is then determined using a first method when the ratio is above a known threshold and using a second method otherwise.
    Type: Application
    Filed: August 15, 2001
    Publication date: February 20, 2003
    Applicant: Philips Electronics North America Corporation
    Inventors: Mihaela van der Schaar, Hayder Radha
  • Publication number: 20030035481
    Abstract: A method of transcoding an input image bit stream into an output image bit stream having a different bit rate. The method includes determining a cut area of an input image to be removed, cutting the input image according to the cut area, and generating an output image of the output image bit stream corresponding to the input image after the cutting. In the present method, image areas of not interest to a user are removed so as to lower the bit rate. In addition, removed bits are reassigned to concern areas so as to improve a picture quality.
    Type: Application
    Filed: April 19, 2002
    Publication date: February 20, 2003
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventor: Cheul-Hee Hahm
  • Publication number: 20030035482
    Abstract: The image processing unit (200,201,203,205,207) comprises an extension unit (208) for extending a first image (110) at a side of the first image (110) with pixels of a second image (108) based on a second set of motion vectors (212). The image processing unit (200,201,203,205,207) further comprises a motion estimation unit (204) for estimating a first set of motion vectors (210) of pixels corresponding to a first portion (105) of a scene (100) which is visible in the first image (110) and a second image (108), and a motion extrapolation unit (206) for estimating the second set of motion vectors (212) of pixels corresponding to a second portion (103) of the scene (100) which is visible in the second image (108), but invisible in the first image (110), based on the first set of motion vectors (210).
    Type: Application
    Filed: August 15, 2002
    Publication date: February 20, 2003
    Inventors: Michiel Adriaanszoon Klompenhouwer, Mark Jozef Willem Mertens, Frederik Jan De Bruijn, Robert Jan Schutten
  • Publication number: 20030035483
    Abstract: A method of simplifying the arithmetic operation in a global motion compensation process approximates the motion vector field of the whole image without using many parameters. Motion vectors in the global motion compensation are found by the interpolation and/or extrapolation of the motion vectors of a plurality of representative points 602, 603 and 604 having particular features in the spatial distance thereof. Since the shift operation can be substituted for the division for synthesizing a predicted image of global motion compensation, the processing using a computer or a dedicated hardware is simplified.
    Type: Application
    Filed: October 3, 2002
    Publication date: February 20, 2003
    Applicant: Hitachi, Ltd.
    Inventor: Yuichiro Nakaya
  • Publication number: 20030035484
    Abstract: An encoder includes a segmenter that segments a reference frame, assigning some or all of the pixels of the reference frame to segments based on pixel color values and/or pixel location. A kinetic information generator generates kinetic information that relates regions of a nonkey frame to segments of the reference frame as indicated by the segmentation. A decoder includes its own segmenter that segments at least a part of the reference frame extracted from the compressed video data, thereby eliminating the need for the encoder to include all of the segmentation in the compressed video data. The decoder includes a nonkey frame generator that regenerates a nonkey frame using kinetic information about the nonkey frame from the compressed video data and using at least a part of the segmentation of the reference frame generated by the decoder's segmenter. The encoder segmentation and decoder segmentation can be the same or different.
    Type: Application
    Filed: March 20, 2002
    Publication date: February 20, 2003
    Applicant: Pulsent Corporation
    Inventors: Adityo Prakash, Eniko Fodor
  • Publication number: 20030035485
    Abstract: A clock recovery circuit is provided with an STC counter, an adder for setting the initial value of the STC counter by adding the value of a PCR and the multiplexing delay time; a subtracter for subtracting the multiplexing delay time from the output of the STC counter; a latched STC register for latching the subtraction result of the subtracter; a PCR register for latching the value of the PCR; and a PWM for controlling the frequency of an external clock oscillation source that supplies a clock signal to the STC counter. The clock oscillation source is provided with an LPF and a VCO, wherein a clock signal outputted from the VCO is supplied to the STC counter and a timer within a stream multiplexing circuit. The clock signal outputted from the clock oscillation source is a reference clock signal of an MPEG system. Thereby, the scale of the entire device can be reduced by reducing the number of separation and decoding circuits.
    Type: Application
    Filed: August 1, 2002
    Publication date: February 20, 2003
    Applicant: NEC Corporation
    Inventors: Hiroshi Honmura, Atsushi Miyamoto
  • Publication number: 20030035486
    Abstract: Provided is an MPEG encoding apparatus that prevents an influence of a portion of discontinuity that occurs in a partial TS when an analog stream is switched, from being exerted on video/audio reproduction at a decoding side. A CPU 21 holds a program number of a PAT for an analog stream before switching. When the analog stream is switched, the CPU 21 reports to a PAT generating section 15 a value of the program number that is different from the one held therein. The PAT generating section 15 generates the PAT containing the reported program number. Thereafter, an input stream switching section 11 switches the input stream according to an instruction from the CPU 21. Thus, an encoding side changes the program number of the PAT every time the stream is changed. With this, the decoding side can carry out muting and stop decoding based on the program number, thereby preventing the influence of the portion of discontinuity that occurs in the partial TS.
    Type: Application
    Filed: July 10, 2002
    Publication date: February 20, 2003
    Inventors: Naoe Kato, Keishi Sugimoto
  • Publication number: 20030035487
    Abstract: A method for concealing errors in texture partition of a video packet is described. The method includes determining a particular macroblock within the texture partition where error is detected, concealing the error starting at the particular macroblock, and evaluating image smoothness of concealed macroblocks. The concealing and evaluating are repeated with one more macroblock added prior to the previous particular macroblock. The concealing and evaluating are repeated until all macroblocks in the texture partition have been concealed. A set of macroblocks, including a combination of decoded and concealed macroblocks, that produces best image smoothness is then selected to replace the corrupted texture partition.
    Type: Application
    Filed: August 16, 2001
    Publication date: February 20, 2003
    Applicant: Sony Corporation and Sony Electronic Inc.
    Inventor: Joseph C. Chan
  • Publication number: 20030035488
    Abstract: The invention relates to a scalable video transcoding method for transcoding an input video signal (103) coded according to MPEG-2 video standard, resulting in four transcoding architectures. Scalability is obtained by means of to switches (120) and (130) determining whether or not reconstruction (118) and motion compensation (128) of the coding error (119) are performed. Each architecture thus defined having a different processing complexity, the overall processing resources available can be optimally used and minimized along a group of frames in the transcoding of parts of said frames in accordance with one of these four architectures, while ensuring a good video quality of tanscoded signal (109). A cost-effective control strategy of said switches based on an energy prediction of said coding error is also proposed.
    Type: Application
    Filed: September 6, 2002
    Publication date: February 20, 2003
    Inventor: Eric Barrau
  • Publication number: 20030035489
    Abstract: A method and apparatus for encoding and decoding signals using code position modulation (CPM) in a communication system. The encoding method includes storing an N-chip pseudo-random noise sequence, such as an m-sequence, in a circular shift register and circularly shifting it to obtain a shifted m-sequence. The shifted m-sequence is compared to an m-bit symbol corresponding to the k bit information value. If the shifted m-sequence and the m-symbol match, the shifted m-sequence is output as the N-chip CPM sequence. Alternatively, the m-symbol is used as an initial condition for a pseudo-noise sequence generator. The corresponding decoder stores an N-chip m-sequence in a circular shift register and a correlates shifted version of the m-sequence with a received N-chip CPM sequence. When a peak in the correlation value is detected, an m-bit field is retrieved from the circular shift register and mapped back to a k-bit information value.
    Type: Application
    Filed: April 8, 2002
    Publication date: February 20, 2003
    Inventors: Paul E. Gorday, Edgar H. Callaway, Neiyer S. Correal
  • Publication number: 20030035490
    Abstract: This invention relates to a closed loop duplex communications system having at least two antennae at the forward link transmitter. A feedback channel from the forward link receiver to the forward link transmitter carries feedback information about the phase and magnitude relationships of the forward link channels from different transmitter antennae. The feedback information is used to compute beamforming weights for the forward link. The signals received on the at least two antennae of the reverse link are used to compute code correlation parameters for application on the forward link.
    Type: Application
    Filed: May 9, 2001
    Publication date: February 20, 2003
    Inventor: Sridhar Gollamudi
  • Publication number: 20030035491
    Abstract: Techniques to “successively” process received signals at a receiver unit in a MIMO system to recover transmitted data, and to “adaptively” process data at a transmitter unit based on channel state information available for the MIMO channel. A successive cancellation receiver processing technique is used to process the received signals and performs a number of iterations to provide decoded data streams. For each iteration, input (e.g., received) signals for the iteration are processed to provide one or more symbol streams. One of the symbol streams is selected and processed to provide a decoded data stream. The interference due to the decoded data stream is approximately removed (i.e., canceled) from the input signals provided to the next iteration. The channel characteristics are estimated and reported back to the transmitter system and used to adjust (i.e., adapt) the processing (e.g., coding, modulation, and so on) of data prior to transmission.
    Type: Application
    Filed: May 11, 2001
    Publication date: February 20, 2003
    Inventors: Jay R. Walton, Mark Wallace, John W. Ketchum, Steven J. Howard
  • Publication number: 20030035492
    Abstract: The present invention is a machine or method used in digital communications. Symbols are selected in periodic fashion from at least two different symbol constellations. At least one of the symbol constellations has a non-conjugated second moment not equal to zero. The non-conjugated second moment is a second-order statistic. Symbol selection leads to second-order input statistics having cyclostationary phase, and thus to second-order output statistics having cyclostationary phase. These statistics can be used for low-complexity identification and equalization of both linear and nonlinear channels. The invention allows for low-complexity identification and equalization of linear channels and of nonlinear channels without requiring constant-modulus constellations.
    Type: Application
    Filed: August 14, 2001
    Publication date: February 20, 2003
    Inventor: Charles Douglas Murphy
  • Publication number: 20030035493
    Abstract: A transmitter 108 converts a complex baseband signal 140 having I and Q quadrature signal components 141 and 142 for transmission by an antenna 114. An intermediate frequency based complex-to-real up-converter 130 uses subsampling to convert the complex baseband signal 140 into a real digital signal 144 having digital signal representations 174. An intermediate frequency based bandpass filtering digital-to-analog converter 132 uses Delta-Sigma, bandpass techniques to convert the real digital signal 144 into a first analog signal 146 having analog signal representations 182. A post-conversion bandpass filter 134 isolates and boosts the signal-to-noise ratio of a selected analog signal representation 186 to output a second analog signal 148 having a post-filtered selected analog signal representation 192. A tracking bandpass filter 136 further bandpasses and up-converts the second analog signal 148 to output a transmittable signal 150 having a tracking-filtered selected analog signal representation 196.
    Type: Application
    Filed: August 19, 2002
    Publication date: February 20, 2003
    Inventor: Steven M. Mollenkopf
  • Publication number: 20030035494
    Abstract: A Wideband Code-Division Multiple Access (WCDMA) transceiver and a method of operating the same. In one embodiment, the transceiver includes: (1) a transmit chain having a lookup table that provides coefficients to a digital predistorter based on power indicators and (2) a predistorter training circuit, coupled to the transmit chain, that employs a receive chain of the WCDMA transceiver to provide a digital compensation signal that is a function of an output of the transmit chain and employs both the power indicators and the digital compensation signal to cause the lookup table to provide alternative coefficients to the digital predistorter thereby to reduce distortion in the output.
    Type: Application
    Filed: July 23, 2001
    Publication date: February 20, 2003
    Inventors: Ruediger Bauder, Qing Yan, Jeffrey Lihbor Yiin
  • Publication number: 20030035495
    Abstract: The present invention concerns a method and apparatus for implementing channel equalization on a digital communications path. According to the method, the outgoing bit stream is coded into symbols, the channel distortion is compensated for by means of symbol preceding (TML), the precoded symbols are sent over a communications channel (2, CHN), whereby means are provided for recovering symbols that have passed over the communications channel (2, CHN) and via the signal processing means of the receiver into a bit stream.
    Type: Application
    Filed: July 11, 2002
    Publication date: February 20, 2003
    Inventors: Heikki Laamanen, Janne Vaananen
  • Publication number: 20030035496
    Abstract: In a phase modulation apparatus for modulating a phase of a carrier signal by an input signal to produce a phase-shift-keying-modulated wave, a data converter converts an input data signal having 3 bits long as the input signal into first and second ternary converted data signals. A ternary phase shift keying modulator modulates, in synchronism with a clock signal, the phase of the carrier signal by the first and the second ternary converted data signals to produce, as the phase-shift-keying-modulated wave, first and second ternary phase shift keying modulated signals, respectively. Disposed between the data converter and the ternary phase shift keying modulator, a parallel-serial converter temporally multiplexes the first and the second ternary converted data signals into first and second multiplexed signals, respectively.
    Type: Application
    Filed: August 16, 2002
    Publication date: February 20, 2003
    Applicant: NEC CORPORATION
    Inventor: Seiichi Noda
  • Publication number: 20030035497
    Abstract: The present invention relates in general to a method, apparatus, and article of manufacture for providing high-speed digital communications through a communications channel. In one aspect, the present invention employs an automatic slicer level adaption to enhance the performance of a high speed communications system.
    Type: Application
    Filed: August 16, 2002
    Publication date: February 20, 2003
    Inventors: James Gorecki, David A. Martin, Yaohua Yang
  • Publication number: 20030035498
    Abstract: Embodiments of the present invention relate generally to receivers. One embodiment relates to a digital FM receiver having multiple sensors (e.g. antennas). In one embodiment, the digital receiver includes a baseband unit having a channel processing unit. In one embodiment, the channel processing unit is capable of calculating or estimating a phase difference between the incoming signals prior to combining them. One embodiment uses phase estimation method for diversity combining the signals while another embodiment utlizes a hybrid phase lock loop method. Also, some embodiments of the present invention provide for echo-cancelling after diversity combining. An alternate embodiment of the channel processing unit utilizes a space-time unit to diversity combine and provide echo cancelling for the incoming signals.
    Type: Application
    Filed: July 27, 2001
    Publication date: February 20, 2003
    Inventors: Junsong Li, Yui-Luen Ho
  • Publication number: 20030035499
    Abstract: A radio receiver 2000 with a sampling mixer 1100 for creating a discrete-time sample stream by directly sampling an RF current with history and rotating capacitors 1111 and 1112, wherein the accumulated charge on the rotating capacitors is read-out to produce a sample. The mixer provides immunity to noise glitches by predicting the occurrence of the glitch (or detecting a significant difference between observed and predicted samples) and creating corrected samples for the corrupted samples. These corrected samples can be created with special circuitry 1933 (digital) or in the mixer 1100 (analog).
    Type: Application
    Filed: July 8, 2002
    Publication date: February 20, 2003
    Inventors: Robert B. Staszewski, Khurram Muhammad, Kenneth J. Maggio, Dirk Leipold
  • Publication number: 20030035500
    Abstract: Clocks are synchronized using a reference clock in two possible ways. One method uses two-way communication between a reference clock and a moving clock. The other method uses one-way communication from the moving clock.
    Type: Application
    Filed: February 27, 2002
    Publication date: February 20, 2003
    Inventor: Lin Jin
  • Publication number: 20030035501
    Abstract: A method and apparatus is provided for use in an inband signaling system for quickly resynchronizing devices in the system after synchronization is lost. Synchronization is quickly established by continuing to apply a synchronization technique even while the devices are synchronized, as opposed to starting the synchronization technique only after synchronization is lost.
    Type: Application
    Filed: August 20, 2001
    Publication date: February 20, 2003
    Inventor: Brian R. Hoppes
  • Publication number: 20030035502
    Abstract: Data reception circuit for receiving a serial input data stream with a high data transfer rate, where the data reception circuit has a data stream separation circuit (4) for separating the serial input data stream into a plurality of separate data streams with a reduced data transfer rate, a reference clock signal generation circuit (13) for generating a reference clock signal whose clock frequency corresponds to the data transfer rate of the separate data streams, a delay circuit (12) having a delay element chain (27) which comprises a plurality of series-connected delay elements, the first delay element (27-1) in the delay element chain (27) receiving the generated reference clock signal, and each delay element outputting a delayed reference clock signal via a signal output (11) in the delay circuit (12), a first, asynchronously clocked register array (8) which comprises a plurality of register banks (26), each register bank (26) in the first register array (8) being asynchronously clocked by an associated
    Type: Application
    Filed: July 24, 2002
    Publication date: February 20, 2003
    Inventor: Philipp Boerker
  • Publication number: 20030035503
    Abstract: A Data and Clock Recovery circuit comprising an input for receiving a first signal (DATA) having a first frequency within a first frequency range and a first phase. The DCR circuit comprises an output for transmitting a first output signal (OUT) having a second frequency and a second phase, the DCR further comprising a Phase Locked Loop (PLL) coupled to the input. Said DCR further comprises a Frequency Locked Loop (FLL) coupled to the input for transmitting to the PLL a first control signal (C_S) indicative for the first frequency. The PLL is conceived to transmit the output signal (OUT) under the control of the first control signal (C_S), the output signal having the second frequency substantially equal to the first frequency and the second phase substantially equal to the first phase.
    Type: Application
    Filed: August 12, 2002
    Publication date: February 20, 2003
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N. V.
    Inventor: Mihai Adrian Tiberiu Sanduleanu
  • Publication number: 20030035504
    Abstract: A skip-free retiming system and method for transmission of digital information in a plesiochronous data communication system is described. The system is capable of supporting an unlimited number of retimers in serial data path between a first and a last node. The retimers are configured to retime, amplify and retransmit a received data stream without altering the received data rate. Thus, the data rate from the first node is received at the same frequency at the last node, regardless of the number of retimers. In general, the retimer performs rate compensation on a retimer local clock, rather than on the data stream, so the attributes of the clean retimer clock can be applied to the data stream without changing the data rate.
    Type: Application
    Filed: August 19, 2002
    Publication date: February 20, 2003
    Inventors: Brian Wong, Benjamim Tang, Scott Southwell, Allen Sakai