Patents Issued in September 9, 2003
  • Patent number: 6617152
    Abstract: A method, apparatus and product for producing an advantaged cell growth surface. According to the present invention, a stream of plasma is comprised of activated gaseous species generated by a microwave source. This stream is directed at the surface of a polymer substrate in a controlled fashion such that the surface is imparted with attributes for cell adhesion far superior to that of untreated polymer or polymer treated by other known methods.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: September 9, 2003
    Inventors: Marie D. Bryhan, Paul E. Gagnon, Oliva V. LaChance, Zhong-he Shen, Hongming Wang
  • Patent number: 6617153
    Abstract: A method of delivery of reactive substances that are attached to magnetizable needle-like particles using a magneto-mechanical delivery device. The subject method and device can be utilized for the delivery of reactive or other substances, such as DNA via the penetration of a target body. Such penetration of a target or multiple targets can initiate the interaction between the material contained within the target site and the chemical substances delivered by the particles into the targets. In a preferred embodiment, the subject device is portable and does not require electrical power.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: September 9, 2003
    Inventors: Adelheid Kuehnle, Manfred R. Kuehnle
  • Patent number: 6617154
    Abstract: An improved electrode for use in generating an electrical field in a saline solution is provided. In particular, a continuous crystalline metal nitride coated electrode is provided for use in a variety of saline solution applications, such as in an electrophoresis device for separating proteins or nucleic acids or an electroporation apparatus for the encapsulation of biologically-active substances in various cell populations. A method and apparatus are provided for the encapsulation of biologically-active substances in red blood cells, characterized by an optionally automated, continuous-flow, self-contained electroporation system which allows withdrawal of blood from a patient, separation of red blood cells, encapsulation of a biologically-active substances in the cells, and optional recombination of blood plasma and the modified red blood cells thereby producing blood with modified biological characteristics.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: September 9, 2003
    Assignee: MaxCyte, Inc.
    Inventor: Peter Meserol
  • Patent number: 6617155
    Abstract: Disclosed is a bioreactor apparatus having a bed of buoyant media pellets floating within a filtrate to be processed. The apparatus includes a tank (22) having a peripheral wall for containing filtrate (34) and a bed (36) of media pellets (38). A central manifold (100) is rotatably supported within the tank, the central manifold being mounted for rotation about a vertical axis (22) and having a plurality of longitudinally spaced openings (140) intermediate its ends, the openings adapted to eject filtrate in a generally horizontal direction and along a substantially vertical plane toward the wall of the tank, cyclically fluidize pellets in a directly narrow zone. In a preferred aspect, there is also a thrust manifold (140), generally parallel to the axis of the central manifold and having a plurality of longitudinally spaced openings intermediate its ends directed horizontally and generally perpendicularly to the plane.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: September 9, 2003
    Inventor: J. Wayne Van Toever
  • Patent number: 6617156
    Abstract: The invention provides isolated polypeptide and nucleic acid sequences derived from Enterococcus faecalis that are useful in diagnosis and therapy of pathological conditions; antibodies against the polypeptides; and methods for the production of the polypeptides. The invention also provides methods for the detection, prevention and treatment of pathological conditions resulting from bacterial infection.
    Type: Grant
    Filed: August 13, 1998
    Date of Patent: September 9, 2003
    Inventors: Lynn A. Doucette-Stamm, David Bush
  • Patent number: 6617157
    Abstract: Methods and compositions for selectively modifying nucleic acid molecules in biological compositions, including contacting the composition with an inactivating agent having the formula: where each of R1, R2, R3, R4, R6, R7, and R8 is, independently, H or a monovalent hydrocarbon moiety containing between 1 and 4 carbon atoms, inclusive, provided that R1, R2, R3, R4, R6, R7, and R8 cannot all be H; R5 is a divalent hydrocarbon moiety containing between 2 and 4 carbon atoms, inclusive; X is a pharmaceutically acceptable counter-ion; and n is an integer between 2 and 10, inclusive are disclosed.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: September 9, 2003
    Assignee: V.I. Technologies, Inc.
    Inventors: Edward I. Budowsky, Samuel K. Ackerman, Andrei A. Purmal, Clark M. Edson
  • Patent number: 6617158
    Abstract: The present invention provides a method for ameliorating &bgr;-globin disorders in a mammal. In one aspect of the invention, the treatment involves ex vivo treatment of early erythroid progenitor cells that leads to an increase in the relative amounts of cells subsequently expressing and accumulating HbF. The cell treatment is to be followed by transplantation of the modified cells. In another aspect of the invention, the same modification of progenitor cells occurs in vivo. Both treatments are based on the novel discovery that the modification can be performed very early in the erythroid maturation process, without disturbance of the subsequent proliferation and maturation of the erythroid precursor. The present invention also provides a procedure for the monitoring of &bgr;-globinopathies and the response of a patient to treatment.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: September 9, 2003
    Assignee: New England Medical Center
    Inventor: Ralph M. Bohmer
  • Patent number: 6617159
    Abstract: Serum free media for growth and proliferation of chondrocytes and mesenchymal stem cells in culture are provided. A serum free medium for growth of chondrocytes includes a serum free composition comprising FGF-2, linoleic acid, ascorbic acid, B-mercaptoethanol, transferrin and dexamethasone. Further the composition comprises EGF, PDGFbb, insulin and albumin. A method for growing chondrocytes in a serum free medium comprising the composition is also provided. Also provided for mesenchymal stem cell growth, is a serum free medium which includes a composition comprising FGF-2, LIF, SCF, pantotenate, biotin and selenium and method, therefore.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: September 9, 2003
    Assignees: Consorzio per la Gestione del Centro di Biotechnologie Avanzate, Istituto Nazionale per la Ricerca Sul Cancro
    Inventors: Ranieri Cancedda, Beatrice Dozin
  • Patent number: 6617160
    Abstract: The present invention provides a monoclonal antibody which immunologically reacts with human VEGF receptor Flt-1 and cells in which human VEGF receptor Flt-1 is expressed on the cell surface and a monoclonal antibody which inhibits binding of human VEGF to human VEGF receptor Flt-1. It also provides a means for the diagnosis or treatment of diseases in which their morbid states progress by abnormal angiogensis, such as proliferation or metastasis of solid tumors, arthritis in rheumatoid, arthritis, diabetic retinopathy, retinopathy of prematurity, psoriasis, and the like.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: September 9, 2003
    Assignee: Kyowa Hakko Kogyo Co., Ltd.
    Inventors: Kenya Shitara, Mikito Ito, Nobuo Hanai
  • Patent number: 6617161
    Abstract: A chemically defined-serum free growth medium for the in vitro and ex vivo of cells and cell lines. The medium consists of about a one to one ratio (v/v) of two basal growth media containing &agr;-ketoglutarate, insulin, transferrin, selenium, bovine serum albumin, linoleic acid, ceruloplasmin, cholesterol, phosphatidyl-ethanolamine, &agr;-tocopherol acid succinate, reduced glutathione, taurine, triiodothyronine, hydrocortisone, parathyroid hormone, L-ascorbic acid 2-sulfate, &bgr;-glycerophosphate, PDGF, EGF and FGF. Chondrocytes, when cultured in this medium in the presence of a cartilage derived morphogenetic protein or bone morphogenetic protein, retain their cartilaginous phenotype.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: September 9, 2003
    Assignee: The United States of America as represented by the Department of Health and Human Services
    Inventors: Frank P. Luyten, Ludwig Erlacher
  • Patent number: 6617162
    Abstract: Antisense compounds, compositions and methods are provided for modulating the expression of estrogen receptor alpha. The compositions comprise antisense compounds, particularly antisense oligonucleotides, targeted to nucleic acids encoding estrogen receptor alpha. Methods of using these compounds for modulation of estrogen receptor alpha expression and for treatment of diseases associated with expression of estrogen receptor alpha are provided.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: September 9, 2003
    Assignee: ISIS Pharmaceuticals, Inc.
    Inventors: Kenneth W. Dobie, Mark P. Roach
  • Patent number: 6617163
    Abstract: The invention concerns a new tool for efficient mutagenesis enabling the generation of a collection of mutants in fungi by random insertion of a characterized Fusarium oxysporum Impala transposon in the genome of said fungi. The invention also concerns the resulting mutants.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: September 9, 2003
    Assignee: Aventis Cropscience S.A.
    Inventors: Marie-Claire Grosjean-Cournoyer, Francois Villalba, Marc-Henri Lebrun, Marie-Josee Daboussi
  • Patent number: 6617164
    Abstract: The invention, relates to a method for producing standard gases (CO and H2) for determining the isotope relationships of oxygen and/or hydrogen, in particular during on-line operation, with a sample being decomposed in a (hot) reactor (11) to produce CO and/or H2, and these components being fed to a mass spectrometer (15), and with the mass spectrometer also the gases obtained from the sample. The invention also relates to an apparatus for providing standard gases. The method according to the invention provides for the standard gases in the reactor (11) to be formed by decomposition, and for initial products which are suitable for this purpose to be fed to the reactor.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: September 9, 2003
    Assignee: Finnigan MAT GmbH
    Inventor: Hairigh Avakgharagelou
  • Patent number: 6617165
    Abstract: A method for the automatic monitoring and control of the content of surfactants of an aqueous process solution, wherein, under program control: a sample having a predetermined volume is taken from the aqueous process solution; the content of surfactants in the sample is determined utilizing measuring equipment capable of analyzing the sample; the results of the analysis are output by the system; the functional capacity of the measuring equipment is checked by determining the surfactant content of one or more standard solutions if the results of the analysis of the content of surfactants on two consecutive drawn samples differs by a preselected value; and corrective action is automatically taken if the check of the measuring equipment reveals any problems. Bath maintenance measures may be initiated automatically or by request from a remote location according to pre-determined criteria. The method reduces the number of staff for bath monitoring and bath maintenance and increases process safety.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: September 9, 2003
    Assignee: Henkel Kommanditgesellschaft auf Aktien
    Inventors: Werner Opitz, Hans-Willi Kling, Ibolya Bartik-Himmler, Ludger Buetfering, Friedhelm Siepmann, Bernd Schenzle, Wolfgang Krey
  • Patent number: 6617166
    Abstract: Disclosed is The method of in vitro testing of the state of the blood coagulation system. The Accelerated Whole Blood Clotting Time (A. W. B. C. T.) reflects the degree of over or under activity of the coagulation system of the blood.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: September 9, 2003
    Assignee: Prophylaxis Limited
    Inventor: Charles Richardson White Gray
  • Patent number: 6617167
    Abstract: A method of screening a subject for the presence of lipoprotein X includes the steps of: producing a measured lipid signal lineshape of an NMR spectrum of a blood plasma or serum sample obtained from a subject; generating a calculated lineshape for the sample, the calculated lineshape being based on derived concentrations of lipoprotein components potentially present in the sample, the derived concentration of each of the lipoprotein components being the function of a reference spectrum for that component and a calculated reference coefficient, wherein one of the lipoprotein components for which a concentration is calculated is lipoprotein X; and determining the degree of correlation between the calculated lineshape of the sample and the measured lineshape spectrum of the sample.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: September 9, 2003
    Assignee: LipoScience, Inc.
    Inventors: James D. Otvos, Elias J. Jeyarajah, Irina Y. Shalaurova
  • Patent number: 6617168
    Abstract: The present invention provides an evaluation method and an evaluation system of free halogen concentration which eliminate the necessity of early exchanging or recycling of catalysts, as compared with a conventional method or system. In the present evaluation method of free halogen concentration, a main flow path of a sample liquid for evaluation and a sub-region that communicates with the main flow path are formed, a potential-measuring electrode is installed in the main path, while a reference electrode is installed in the sub-region at a position where free halogen in the sample liquid has been decomposed. Moreover, free halogen in the sample liquid is decomposed by a free-halogen decomposing substance in the sub-region, and the free halogen concentration is evaluated from the electric potential difference between the reference electrode and the potential-measuring electrode.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: September 9, 2003
    Assignee: Omega Co., Ltd.
    Inventors: Shinichi Nakamura, Kunihiko Fukutsuka, Yasushi Hanano
  • Patent number: 6617169
    Abstract: The invention features methods of selecting chemical peaks from two-dimensional magnetic resonance spectra for one-dimensional extraction and quantification methods using these one-dimensional extractions. The methods permit enhanced differentiation of particular peaks in two-dimensional magnetic resonance spectroscopy and allow for quantification of chemical concentrations in test samples, such as human brain tissue, having complex magnetic resonance spectra due to the presence of numerous chemicals. These new techniques can be used to provide information about the concentrations of a variety of chemicals, including metabolites, in both biological and non-biological media.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: September 9, 2003
    Assignee: McLean Hospital Corporation
    Inventors: Yong Ke, Perry F. Renshaw, Bruce Cohen
  • Patent number: 6617170
    Abstract: A collection container and method for collecting a predetermined volume of a biological sample, and particularly a whole blood sample, includes at least one gene induction blocking agent in an amount effective to stabilize and inhibit gene induction. The gene induction blocking agent is able to stabilize nucleic acids in the biological sample at the point of collection to block ex vivo gene induction in the sample when stored at room temperature. The stabilizing agents include cationic compounds, detergents, particularly cationic detergents, chaotropic salts, ribonuclease inhibitors, chelating agents, organic solvents, organic reducing reagents, and mixtures thereof. The biological sample is collected directly from the animal and immediately mixed with the gene induction blocking agent without any intermediate processing or handling.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: September 9, 2003
    Assignees: Becton, Dickinson and Company, Qiagen GmbH
    Inventors: Frank A. Augello, Lynne Rainen, Matthew Walenciak, Uwe Oelmüller, Ralf Wyrich, Helge Bastian
  • Patent number: 6617171
    Abstract: The invention provides a method of detecting autoimmune disease in a mammal, comprising providing a biological sample from a mammal and detecting proteasome activity, wherein a reduction in proteasome activity from a basal state is indicative of autoimmune disease. In addition, the invention encompasses a method of treating an autoimmune disease in a mammal, comprising administering to a mammal suspected of suffering from an autoimmune disease an agent which restores NF&kgr;B activity in an amount and for a time sufficient to result in normal NF&kgr;B activity in the mammal.
    Type: Grant
    Filed: February 27, 1998
    Date of Patent: September 9, 2003
    Assignee: The General Hospital Corporation
    Inventors: Denise L. Faustman, Takuma Hayashi
  • Patent number: 6617172
    Abstract: The present invention aims to economically implement an ultra-compact semiconductor device having an identification number according to the efficient utilization of an electron-beam writing method. A memory for identifying a 128-bit identification number, which makes use of a transistor, is configured by each contact hole selectively defined by an electron-beam writing method. A plane long-side size of a semiconductor chip is set to 0.5 mm or less. The contact holes are defined simultaneously with contact holes for peripheral circuits. In addition, the plane long-side size of the semiconductor chip is set smaller than the thickness of a wafer prior to the start of its manufacture and set larger than the thickness of the post-thinning wafer. Otherwise, the same data as a barcode is further stored in the memory. Additionally, data obtained by enciphering the identification number is used to test or inspect the semiconductor chip.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: September 9, 2003
    Assignee: Hitachi, Ltd.
    Inventor: Mitsuo Usami
  • Patent number: 6617173
    Abstract: A technique to form an ultrathin dielectric layer over a ferromagnetic layer by atomic layer deposition.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: September 9, 2003
    Assignee: Genus, Inc.
    Inventor: Ofer Sneh
  • Patent number: 6617174
    Abstract: A fieldless CMOS image sensor that include a non-LOCOS isolation structure surrounding the photodiode diffusion region of each pixel. The isolation structure is formed by an anti-punchthrough (APT) implant isolation region formed in the substrate around the photodiode diffusion region, and spacer oxide that is formed using a special mask to cover the APT implant region. The APT implant isolation region is self-aligned with the special spacer oxide mask. A width of the isolation structure between two adjacent photodiodes is 0.5 &mgr;m or more. Similarly, LOCOS structures that are used, for example, in the image sensor active circuitry, are separated from the image-sensing (e.g., photodiode) region of each pixel by portions of the isolation structure having a width of 0.5 &mgr;m or more.
    Type: Grant
    Filed: May 4, 2001
    Date of Patent: September 9, 2003
    Assignee: Tower Semiconductor Ltd.
    Inventor: Israel Rotstein
  • Patent number: 6617175
    Abstract: A thermopile-based detector for monitoring and/or controlling semiconductor processes, and a method of monitoring and/or controlling semiconductor processes using thermopile-based sensing of conditions in and/or affecting such processes.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: September 9, 2003
    Assignee: Advanced Technology Materials, Inc.
    Inventor: Jose Arno
  • Patent number: 6617176
    Abstract: A method (M) of determining the effectiveness of a deposited thin conformal barrier layer (30) by forming a test specimen and measuring the copper (Cu) penetration from a metallization layer (40) through the barrier layer (30) (e.g., refractory metals, their nitrides, their carbides, or their other compounds), through a thin insulating dielectric layer (20) (e.g., SiO2), and into a semiconductor (10) substrate (e.g., Si), wherein the interaction between the migrating metal ions and the semiconductor ions are detected/monitored, and wherein the detection/monitoring comprises (1) stripping at least a portion of the insulating dielectric layer (20) and the barrier layer (30) and (2) examining the semiconductor substrate (10) surface of the test specimen, thereby improving interconnect reliability, enhancing electromigration resistance, improving corrosion resistance, reducing copper diffusion, and a test specimen device thereby formed.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: September 9, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: John E. Sanchez, Jr., Pin-Chin Connie Wang, Christy Mei-Chu Woo, Paul R. Besser
  • Patent number: 6617177
    Abstract: A method of fabricating LCOS devices and testing them at the wafer-scale to identify known-bad dice, to facilitate completing fabrication of only known-good dice. A wafer-scale transparent electrode glass is temporarily placed over the wafer, and liquid crystal material is injected into the LCOS device cavities through fill holes extending through the wafer. After removing the glass and separating the wafer into dice, only the good dice have their die-scale glass attached, liquid crystal material re-injected, solder bumps affixed, and substrate attached.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 9, 2003
    Assignee: Intel Corporation
    Inventor: Paul Winer
  • Patent number: 6617178
    Abstract: A method is provided for ferroelectric layer testing. An adhesion layer is deposited over a semiconductor substrate to be of a phase pure material lacking a first material. A lower electrode is deposited over the adhesion layer and a ferroelectric layer is deposited over the lower electrode. The ferroelectic layer contains the first material. The ferroelectric layer is x-rayed and the x-ray fluorescence from the ferroelectric layer is detected for characterizing the ferroelectric layer.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: September 9, 2003
    Assignees: Agilent Technologies, Inc, Texas Instruments, Applied Materials
    Inventors: Sanjeev Aggarwal, Kaushal K. Singh
  • Patent number: 6617179
    Abstract: A method and system for qualifying an oxide-nitride-oxide (QNO) layer including a first oxide layer, a nitride layer and a control oxide layer in a semiconductor device is disclosed. The method and system including determining a first plurality of dielectric breakdown voltages and a first plurality of lifetimes and determining a second plurality of dielectric voltages and a second plurality of lifetimes. The first plurality of dielectric breakdown voltages and lifetimes being determined utilizing a plurality of ramp rates for a first plurality of ONO layers having a particular nitride layer thickness and a plurality of control oxide layer thicknesses. The second plurality of dielectric breakdown voltages and lifetimes layer being determined utilizing the plurality of ramp rates for each of a second plurality of ONO layers having a particular control oxide layer thickness and a plurality of nitride layer thicknesses.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: September 9, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Hyeon-Seag Kim
  • Patent number: 6617180
    Abstract: A new method is provided for the interconnection of bit lines in the test structure. The invention provides for the creation of a cross comb bit line design in the test structure which allows for the detection and identification of diagonal or horizontal bridging between two identifiable capacitors of DRAM structures.
    Type: Grant
    Filed: April 16, 2001
    Date of Patent: September 9, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Chien-Jung Wang
  • Patent number: 6617181
    Abstract: An integrated circuit having circuit structures, including at least one of logic elements and memory elements. A core is disposed at an interior portion of the integrated circuit. The core contains core power contacts and core ground contacts for providing electrical power to the circuit structures during functional operation of the integrated circuit. A peripheral is disposed at an edge portion of the integrated circuit. The peripheral contains signal contacts for sending and receiving electrical signals between the circuit structures and external circuitry. The peripheral also has peripheral power contacts and peripheral ground contacts for providing electrical power to the circuit structures during testing of the integrated circuit. The peripheral power contacts are redundant to at least some of the core power contacts, and the peripheral ground contacts are redundant to at least some of the core power contacts.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: September 9, 2003
    Assignee: LSI Logic Corporation
    Inventors: Peter J. Wright, Payman Zarkesh-Ha
  • Patent number: 6617182
    Abstract: A semiconductor device includes: a crystalline substrate including a primary surface and a crystal plane provided within the primary surface so as to have a surface orientation different from a surface orientation of the primary surface; a semiconductor layered structure grown over the crystalline substrate; and an active region provided at a portion in the semiconductor layer structure above the crystal plane.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: September 9, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Ishida, Shinji Nakamura, Kenji Orita, Osamu Imafuji, Masaaki Yuri
  • Patent number: 6617183
    Abstract: A method for forming a p-type semiconductor film comprises the steps of: providing on a substrate a group II-VI compound semiconductor film which is doped with a p-type impurity and comprises either MgXZn1−XO (0≦X≦1) or CdXZn1−XO (0≦X≦1) and activating the p-type impurity by annealing the doped semiconductor film.
    Type: Grant
    Filed: April 19, 2001
    Date of Patent: September 9, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Michio Kadota, Yasuhiro Negoro, Yoshinori Miura
  • Patent number: 6617184
    Abstract: The process of minimizing the operating voltage of an organic light emitting diode includes the steps of providing a transparent substrate and applying a transparent bottom electrode thereto. It furthermore includes the step of applying to the bottom electrode a semitransparent layer of a metal having a work function in the range from 4 to 7 eV and applying to the semitransparent layer at least one organic functional layer and a top electrode including magnesium and silver.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: September 9, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Achim Böhler, Stefan Wiese, Dirk Metzdorf, Wolfgang Kowalsky
  • Patent number: 6617185
    Abstract: In one embodiment, the present invention is directed to a method of fabricating a micro-mechanical latching device, comprising: depositing a structural layer in a fabrication plane, wherein the first structural layer possesses a topography; depositing a sacrificial layer adjacent to the first layer such that the sacrificial layer conforms to the topography of the first layer; depositing a second structural layer that conforms to the topography of the first layer; removing the sacrificial layer; and using at least the first structural layer and second structural layer to fabricate the micro-mechanical latching device.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: September 9, 2003
    Assignee: Zyvex Corporation
    Inventor: Aaron Geisberger
  • Patent number: 6617186
    Abstract: The main object of the present invention is to provide a method for producing an EL element for realizing the high luminous efficiency, the high light takeout efficiency, the simplicity of the production process, and the formation of highly fine patterns. In order to achieve the above-mentioned object, the present invention provides a method for producing an EL element wherein at least one organic EL layer constituting the EL element is patterned by the use of a photolithography method.
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: September 9, 2003
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventor: Mitsuhiro Kashiwabara
  • Patent number: 6617187
    Abstract: A method for fabricating a monolithically integrated liquid crystal array display and control circuitry on a silicon-on-sapphire structure comprises the steps of: a) forming an epitaxial silicon layer on a sapphire substrate to create a silicon-on-sapphire structure; b) ion implanting the epitaxial silicon layer; c) annealing the silicon-on sapphire structure; d) oxidizing the epitaxial silicon layer to form a silicon dioxide layer from portion of the epitaxial silicon layer so that a thinned epitaxial silicon layer remains; e) removing the silicon dioxide layer to expose the thinned epitaxial silicon layer; f) fabricating an array of pixels from the thinned epitaxial silicon layer; and g) fabricating integrated circuitry from the thinned epitaxial silicon layer which is operably coupled to modulate the pixels. The thinned epitaxial silicon supports the fabrication of device quality circuitry which is used to control the operation of the pixels.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: September 9, 2003
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Randy L. Shimabukuro, Stephen D. Russell, Bruce W. Offord
  • Patent number: 6617188
    Abstract: The present invention provides a novel technique based on gray scale mask patterning (110), which requires only a single lithography and etching step (110, 120) to produce different thickness of SiO2 implantation mask (13) in selected regions followed by a one step IID (130) to achieve selective area intermixing. This novel, low cost, and simple technique can be applied for the fabrication of PICs in general, and WDM sources in particular. By applying a gray scale mask technique in IID in accordance with the present invention, the bandgap energy of a QW material can be tuned to different degrees across a wafer (14). This enables not only the integration of monolithic multiple-wavelength lasers but further extends to integrate with modulators and couplers on a single chip. This technique can also be applied to ease the fabrication and design process of superluminescent diodes (SLDs) by expanding the gain spectrum to a maximum after epitaxial growth.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: September 9, 2003
    Assignee: NTU Ventures PTE Ltd
    Inventors: Boon Siew Ooi, Yee Loy Lam, Yuen Chuen Chan, Yan Zhou, Siu Chung Tam
  • Patent number: 6617189
    Abstract: A method of fabricating an image sensor on a semiconductor substrate including a sensor array region is introduced. First, an R/G/B color filter array (CFA) is formed on portions of the semiconductor substrate corresponding to the sensor array region. Then, a spacer layer is formed on the R/G/B CFA, and a plurality of U-lens is formed on the spacer layer corresponding to the R/G/B CFA. Afterwards, a buffer layer is coated to fill a space between the U-lens, and a low-temperature passivation layer is deposited on the buffer layer and the U-lens at a temperature of about 300° C. or less to prevent the R/G/B CFA from damage.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: September 9, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Tze-Jing Chen, Ching-Chung Chen, Tung-Hu Lin, Chen-Bin Lin, Chi-Rong Lin
  • Patent number: 6617190
    Abstract: Disclosed is an ISFET comprising a H+-sensing membrane consisting of RF-sputtering a-WO3. The a-WO3/SiO2-gate ISFET of the present invention is very sensitive in aqueous solution, and particularly in acidic aqueous solution. The sensitivity of the present ISFET ranges from 50 to 58 mV/pH. In addition, the disclosed ISFET has high linearity. Accordingly, the disclosed ISFET can be used to detect effluent.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: September 9, 2003
    Assignee: National Yunlin University of Science and Technology
    Inventors: Jung Chuan Chou, Jung Lung Chiang
  • Patent number: 6617191
    Abstract: An epitaxial growth layer, an oxide film, and a passivation film are formed on a silicon substrate. Except for an opening formed on a part of the passivation film, the upper surface of the passivation film is covered with a metal protective film made of tungsten (W). With the silicon substrate immersed in a high-concentration hydrofluoric aqueous solution, anodization is performed with the silicon substrate as an anode and the metal protective film as a counter electrode.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: September 9, 2003
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Hitoshi Iwata, Makoto Murate
  • Patent number: 6617192
    Abstract: An electrically operated memory element having a contact in electrical communication with a memory material programmable to at least a first resistance state and a second resistance state. Preferably, the contact includes at least a first region having a first resistivity and a second region having a second resistivity greater than the first resistivity where the more resistive region is adjacent to the memory material.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: September 9, 2003
    Assignee: Ovonyx, Inc.
    Inventors: Tyler Lowrey, Stephen J. Hudgens, Patrick J. Klersy
  • Patent number: 6617193
    Abstract: A semiconductor device comprising a substrate with a cavity portion for mounting a semiconductor chip is provided to achieve a high reliability and to decrease a size and a fabricating cost. The cavity portion for mounting the semiconductor chip at the center portion of the substrate is formed by press forming with a projected portion of a die while adhering a press shapeable wiring body comprising a copper wiring which becomes wiring material, a barrier layer such as nickel alloy or the like, and a copper foil which is a carrier layer, to a resin substrate, so as to have wiring buried into a surface of the substrate and to form a ramp between an inner connection terminal portion connecting to the semiconductor chip and an external connection terminal portion connecting to an external connection terminals, the internal and external connection terminal portions being two end portions of the wiring.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: September 9, 2003
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Yamazaki Toshio, Fukutomi Naoki, Suzuki Kazuhisa, Morita Hiroshi, Wakashima Yoshiaki, Naoyuki Susumu, Kida Akinari
  • Patent number: 6617194
    Abstract: An electronic component includes an electronic component element and a package to house the electronic component element. The package includes a concave area in which the electronic component element is housed, an area for a sealing frame which is located along the periphery of the concave area, and a sealing cover which is mounted on the area for a sealing frame so as to cover the concave area. Connecting electrodes are electrically connected to the electronic component element and a conductive pattern to be used for image recognition is provided on the upper surface of the area for a sealing frame.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: September 9, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazunobu Shimoe, Ryoichi Kita
  • Patent number: 6617195
    Abstract: A method of manufacturing a semiconductor device by attaching a flip chip die to an organic substrate using solder comprises applying no-clean flux to the flip chip die or the organic substrate; heating the flip chip die and the organic substrate to bond the flip chip die to the organic substrate, and cooling the flip chip die and the organic substrate. The step of heating the flux includes controlling oxygen and moisture content of an atmosphere surrounding the flux, preheating to a temperature of about 145° C. to about 165° C., soaking at a temperature of about 145° C. to about 165° C. for about four to about six minutes, and reflowing above the solder's melting point.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: September 9, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Raj N. Master, Mohammad Z. Khan, Maria G. Guardado
  • Patent number: 6617196
    Abstract: A semiconductor device capable of improving the flexibility of designing electrical lead patterns for connection from chips via a substrate to external terminals by appropriately arranging the substrate structure and layout of more than one address signal as commonly shared by four separate chips is disclosed. In a surface mount type package of ball grid array (BGA), four chips 1 are mounted on a substrate 2 in such a manner such these are laid out in the form of an array of two rows and two columns. These four chips 1 are such that regarding the upper side and lower side, these are in linear symmetry with respect to a center line extending in a direction along long side edges of the substrate 2.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: September 9, 2003
    Assignees: Hitachi, Ltd., Akita Electronics Co., Ltd.
    Inventors: Akihiko Iwaya, Toshio Sugano, Susumu Hatano, Yutaka Kagaya, Masachika Masuda
  • Patent number: 6617197
    Abstract: A packaging arrangement is described that utilizes a conductive panel (such as a leadless leadframe) as its base. The conductive panel has a matrix of device areas that each include a plurality of rows of contacts that are located outside of a die area. Tie bars provide support for the various contacts. Some of the tie bars are arranged to extend between adjacent contacts in the same row and some of the tie bars are arranged to extend diagonally between associated contacts in adjacent rows that are not adjacent one another. During packaging, the tie bars can be severed by cutting along lines (e.g. saw streets) that run adjacent the rows after a molding operation. The described panels are particularly useful in packages having three or more rows of contacts.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: September 9, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Jaime Bayan, Peter Howard Spalding
  • Patent number: 6617198
    Abstract: Disclosed is a method for forming a semiconductor assembly and the resulting assembly in which a flowable adhesive material which secures a die to a support and does not form an adhesive fillet. A flowable adhesive is deposited between the die and support so that it covers about 50 to about 90 percent of the bottom surface area of the die after the die is mounted to the support. The reduced surface coverage area prevents formation of an adhesive fillet.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: September 9, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Jerry M. Brooks
  • Patent number: 6617199
    Abstract: Described is an electronic device having a compliant fibrous interface. The interface comprises a free fiber tip structure having flocked thermally conductive fibers embedded in an adhesive in substantially vertical orientation with portions of the fibers extending out of the adhesive and an encapsulant between the portions of the fibers that extend out of the adhesive and the fiber's free tips.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: September 9, 2003
    Assignee: Honeywell International Inc.
    Inventors: Charles Smith, Michael M. Chau, Roger A. Emigh, Nancy F. Dean
  • Patent number: 6617200
    Abstract: The present invention provides a semiconductor device that makes it possible to expose the back side of a die pad as well as a method for fabricating the same. The semiconductor device can include a lead frame that has portions to be sandwiched by first and second molds and a die pad that is down set at a distance greater than the depth of a recessed part of the first mold. The die pad is placed on the bottom of the recessed part of the first mold and the lead frame is disposed so that the portions to be sandwiched are suspended above the first mold. The molding process is carried out as the second mold presses the portions of the lead frame to be sandwiched in the direction of the first mold.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: September 9, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Masaaki Sone
  • Patent number: 6617201
    Abstract: An FBGA packaged device including a die adhered to a substrate with a small gap being formed between the die and substrate. An opening is formed through the substrate adjacent the center portion of the die. An encapsulating mold is formed around the die extending into the gap and also filling the channel. At least one barrier is disposed in the gap between the substrate and the die adjacent the channel to control the flow path of the encapsulating material as the mold is formed in the package.
    Type: Grant
    Filed: September 30, 2002
    Date of Patent: September 9, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Lim T. Chye, Lee C. Kuan, Jeffrey Toh, Tim Teoh, Patrick Guay, Choong L. Wah