Abstract: An input receiver controls an offset voltage by using an output feedback signal to improve a sense speed. The input receiver includes a pre-amplifier that controls an offset voltage in response to a feedback signal and amplifies an input signal with reference to a reference voltage. A sense amplifier amplifies an output signal and an inverted output signal of the pre-amplifier in response to a clock signal. A latch circuit latches an output signal and an inverted output signal of the sense amplifier. An inversion circuit uses the reference voltage as a power supply voltage and inverts an inverted output signal of the latch circuit. In addition, an output signal of the inversion circuit is supplied as the feedback signal. Alternatively, the output signal of the latch circuit may be directly supplied to the pre-amplifier as the feedback signal while not using the inversion circuit.

Abstract: Systems and methods are disclosed for a clamping circuit for protecting against voltage overstresses. One embodiment of the system comprises a first voltage comparator adapted to detect when a selected voltage exceeds a first predetermined voltage and a second voltage comparator adapted to detect when the selected voltage falls below a second predetermined voltage, thereby preventing voltage overstresses.

Abstract: A gradation selector circuit provided with a resistor string circuit in which resistive elements are connected in series between a high potential power source and a low potential power source and a selector circuit which is connected to the resistor string circuit, which selects one of plural analog voltages generated in the resistor string circuit according to a control signal and which outputs it to an output terminal is used. The selector circuit includes analog switching circuits that select analog voltage close to intermediate potential. The analog switching circuit includes a P-type MOS transistor to the source electrode and the back gate electrode of which the resistor string circuit is connected and a depletion type N-type MOS transistor to the source electrode of which the drain electrode of the P-type MOS transistor is connected and to the drain electrode of which an output terminal is connected.

Abstract: Data pad regions are arranged in four divided regions of a semiconductor memory chip of a rectangular shape, respectively, and data pads are selectively utilized in each of the four divided regions in accordance with a word structure. Thus, it is possible to implement a semiconductor memory chip capable of being assembled in both a single chip package and a multi chip package.

Abstract: A manner of generating internal voltages such as a high voltage, an intermediate voltage and an internal power supply voltage is switched in accordance with a power supply level setting signal. When the voltage level of an external power supply voltage is low, a current drive transistor receiving an output of a comparing circuit and an auxiliary drive transistor are forcedly set in a conductive state, and external power supply voltage is transmitted on an internal power supply line. At this time, the comparing operation of the comparing circuit is stopped. When the level of the external power supply voltage is high, the comparing circuit is activated down convert the external power supply voltage for generating a peripheral power supply voltage on the internal power supply line.

Abstract: A charge pump for negative voltages, having at least one stage including a high-voltage terminal and a low-voltage terminal; a first branch and a second branch, which are symmetrical and are connected between the high-voltage terminal and the low-voltage terminal and each of which comprises a respective first transistor and a respective second transistor. The first and the second transistors are all triple-well MOS transistors of one and the same polarity type.

Abstract: A basic stage for a charge pump circuit having at least an input terminal and an output terminal and comprising: at least a first inverter inserted between said input and output terminals and comprising a first complementary pair of transistors, defining a first internal node, at least a second inverter inserted between said input and output terminals and comprising a second complementary pair of transistors, defining a second internal node, respective first and second capacitors connected to said first and second internal nodes and receiving a first and second driving signals; the first and second pairs of transistors having the control terminals cross-connected to the second and first internal node. Advantageously, the basic stage comprises at least a first biasing structure connected to the first and second internal nodes and comprising a first and second biasing transistors, which are respectively coupled to said first and second inverters.

Abstract: A method and apparatus for identifying parasitic pnpn structures in an integrated circuit, and automatically inserting a noise latchup suppression circuit in such identified pnpn structure.

Abstract: The present invention relates to a boost circuit. A precharge voltage of a positive voltage applied to a capacitor is constantly applied regardless of the power supply voltage, so that the pumping voltage is constantly and stably generated. The operating characteristic and reliability of the circuit can be improved.

Abstract: A data-directed frequency-acquisition loop capable of generating a frequency error having a magnitude and direction from a double sideband suppressed signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is convolved by a second multiplier. The I output of the second multiplier passes through a first low-pass filter. The filtered I output and the Q output are then multiplied by a third multiplier. The output of the third multiplier is filtered through a second low-pass filter, amplified, and return to the VCO to complete the feedback loop.

Abstract: A method for reducing offset voltage in an operational amplifier without the need for switched-capacitors, includes introducing a tapped resistor chain between the common connected terminals of the transistors of the input differential pair of the operational amplifier and connecting the tail current source/sink of the differential amplifier to a selected tap of the resistor chain. The invention further provides an improved operational amplifier in accordance with the above method.

Abstract: The present invention includes a power amplifying stage having a power amplifying element having a main electrode and a control electrode, and a bias control circuit that is supplied with a bias switching voltage and an operating point adjusting voltage for adjusting the bias voltage value to the control electrode of the power amplifying element by the bias switching voltage and the operating point adjusting voltage and hence adjusting the operating point of the power amplifying element, wherein the bias control circuit adjusts the operating point of the power amplifying element by switching between supply and stop of the bias voltage to the control electrode of the power amplifying element by the bias switching voltage, and varying the bias voltage value to be supplied to the control electrode of the power amplifying element by the operating point adjusting voltage in phase.

Abstract: A transimpedance amplifier system includes a first gain stage to receive an input signal. A second gain stage is coupled to the first gain stage to provide a first output. A first passive feedback element is coupled in parallel with the second gain stage. A general feedback element is coupled in parallel with the first gain stage and the second gain stage. A replica biasing stage is included to provide a second output. A replica feedback element is coupled in parallel with the replica biasing stage.

Abstract: A balanced current converter with multiple PWM converter channels is described. A balanced current converter has an error amplifier, a main converter channel and at least one parallel converter channel. The converter provides a DC power output and feeds back an average output voltage signal. The error amplifier compares the reference voltage signal and the average output voltage signal to generate the error signal. The main converter channel outputs the main channel current signal and the main channel power output according to the error signal. The parallel converter channel compares the main channel current signal and the respective parallel channel current signal to generate the first deviation signal. The parallel converter channel continues comparing the first deviation signal and the error signal to generate a second deviation signal.

Abstract: A base station subsystem includes at least one transmit branch having a forward path that includes a signal processing unit coupled at an input to an input Fourier Transform Matrix (FTM) and at an output to an output FTM. The transmit branch further includes two error compensation loops, an inner feedback loop and an outer feedback loop. The inner feedback loop provides error compensation for error introduced by the signal processing section to a signal input to the transmit branch. The outer loop provides error compensation for all residual error introduced into the signal when routed through the transmit branch forward path after error compensation may be performed by the inner feedback loop.

Abstract: An amplifier, for example for use as an LNA of a radio frequency tuner, comprises a differential amplifying stage provided with an AGC core. The output signals are formed across load resistors at differential outputs. Compensating stages sum the signals at the differential outputs and subtract the resulting sum signal from the output signals so as to cancel the common mode signals including second order distortion products.

Abstract: A broadband variable gain amplifier with improved linearity and gain characteristic is provided. According to the present invention, the broadband variable gain amplifier comprises: an amplification unit for amplifying an input signal applied to an input terminal and outputting an amplified signal to an output terminal; and a gain control unit which is connected between the input and output terminals, and for controlling gain of said amplification unit, wherein said gain control unit comprises: a variable resistance unit whose resistance value is varied according to a control signal; and a broadband matching unit for proving an optimal impedance characteristic to the input terminal said amplification unit in a broad band, where in said variable gain resistance unit and said broadband matching unit is connected in parallel.

Abstract: A drain current flowing through a first transistor in a multistage amplifier circuit and a drain current flowing through a second transistor may have different current values from each other by a current regulator circuit. As a result, the amplifying operation of the second transistor may not be saturated even when the output power of the first transistor is increased. Accordingly, the circuit can operate with low current consumption and improve the output power.

Abstract: By extracting a portion of RF signals from an input side of a multistage RF amplifier with a detector, and converting extracted signals into envelope signals, low-frequency second-harmonic distortion components are efficiently extracted. Then, the extracted low-frequency second-harmonic distortion components are amplified with a low-frequency amplifier, and phase adjusted with a phase shifter, after which they are injected into a gate or base bias of the final stage of the multistage RF amplifier. As a result, the low-frequency second-harmonic distortion components are converted into third-harmonic distortion due to the non-linearity of transistors, and the third-harmonic distortion thus obtained cancels out the third-harmonic distortion originally present in the multistage RF amplifier.

Abstract: The frequency synthesizer circuit includes a phase-locked loop (PLL) circuit, a voltage controlled oscillator (VCO), a low pass filter (LPF), an input terminal for providing serial data provided from the exterior to the PLL circuit, an output terminal for providing an oscillation signal provided the VCO, and a testing unit providing a testing voltage with a binary value to the VCO, wherein, the PLL circuit, the VCO, the LPF, and the testing unit are mounted on a single chip, and usability of the frequency synthesizer circuit is determined based on the oscillation signal provided from the VCO via said output terminal according to the testing voltage with a binary value provided from said testing unit.

Abstract: A ring oscillator according to the present invention comprises:

Abstract: A calibration and adjustment system for post-fabrication control of a phase locked loop bias-generator is provided. The calibration and adjustment system includes an adjustment circuit operatively connected to the bias-generator, where the adjustment circuit is controllable to facilitate a modification of a voltage output by the bias-generator. Such control of the voltage output by the bias-generator allows a designer to achieve a desired phase locked loop performance characteristic after the phase locked loop has been fabricated. A representative value of the amount of adjustment desired in the bias-generator output may be stored and subsequently read to adjust the phase locked loop.

Abstract: A S/N enhancer using the magnetostatic wave signal is disclosed.

Abstract: A broadband interconnection device (10) used for interconnection between a first transmission line (100) and a second transmission line (200), has a substrate (300) with the first transmission line (100) defined at a first side (310) on a first surface (320), the first transmission line (100) including a signal conductor (120) and at least one ground conductor (121 or 122), a signal conductor (220) of the second transmission line (200) defined on an opposite side (340) of the first surface (310), and a ground plane (260) of the second transmission line (200) on an opposed surface (360), the signal conductor (120) of the first transmission line (100) being electrically connected to the signal conductor (220) of the second transmission line (200) on the first surface (320). On the opposed surface (360), the ground plane (260) of the second transmission line (200), has at least one protrusion (261) aligned with the signal conductor (120) of the first transmission line (100).

Abstract: The present invention discloses a miniature high directivity multi-band coupled-line coupler for RF power amplifier module application. The coupler utilizes a three-coupled-line structure, with a first RF line designated coupled line for the GSM 900 MHZ band, a second RF line designated coupled line for the DCS/PCS 1800/1900 MHZ band, and a common coupled line. A first capacitor is connected between the center of the first line and the center of the common line and a second capacitor is connected between the center of the second line and the center of the common line. The coupler has a length considerably less than the length of a quarter wave length coupler while achieving directivity requirements for both GSM band and DCS/PCS band.

Abstract: The present invention relates to a control system for selectively supplying electrical power in a remote environment. The system comprises a plurality of electrical circuits, each designed to operate over a unique frequency passband. Power transmitted within the frequency passband of a circuit is filtered through that circuit to power a corresponding remote device. One or more remote devices can be simultaneously powered by transmitting power within the frequency passbands of the corresponding circuits. It is advantageous to design relatively narrow passbands to accommodate a relatively large number of circuits and corresponding devices for remote operation and a triac, rectifier or other suitable turn-on gate can be incorporated into each circuit to effectively control the width of the frequency passband of each circuit. Alternatively, an operational amplifier could be used.

Abstract: A high-frequency switch has

Abstract: A surface acoustic wave duplexer includes a first filter including a ladder filter and a second filter including a ladder filter with a pass band that is different from that of the first filter. Inductors are connected in parallel with respective series resonators of both first and second filters.

Abstract: An antenna duplexer (14′) comprises a transmission (TX) filter (16) having an input and an output. The TX filter input is arranged to connect to a TX port of a mobile telecommunications handset and the TX filter output is arranged to connect to an antenna (12) for the mobile telecommunications handset. The duplexer further includes a Dual Mode Surface Acoustic Wave (SAW) type receiver (RX) filter (18′) having an input and a balanced output. The RX filter input is arranged to connect to the antenna (12) and the RX filter output is arranged to connect directly to a balanced input RX port of the mobile telecommunications handset.

Abstract: A filtered button DC interconnect employing a compressible conductor such as a finely wound wire mesh imbedded within a series of dielectric and ferrite cylinders. The compressible conductor is captivated within the series of dielectric and ferrite cylinders to ensure proper contact with mating surfaces of interconnected circuits. The interconnect serves as an RF filter by providing rejection of RF and microwave frequencies between the interconnected circuits.

Abstract: A cascaded SAW filter system includes first and second SAW filters (12a, 12b) each including an input transducer (36, 36′) and an output transducer (37, 37′) on a piezoelectric substrate (38, 38′). Group delay and pass band ripples associated with a time spur at TD′ away from the main signal of the second filter (12b) cancel the group delay and pass band ripples associated with a time spur at TD away from the main signal of the first filter (12a) because: 1) the input and output transducers (36′, 37′) of the second filter (12a) are offset from those of the first filter (12a); 2) the center frequency (f0′) of the second filter (12b) is offset from the center frequency (f0) of the first filter (12a); 3) the perturbation region (P1) of the first filter (12a) is different from the perturbation region (P2) of the second filter (12b) or 3) a combination of 1), 2) and/or 3. The associated time spur echo of the cascaded response will also be canceled.

Abstract: A surface acoustic wave device includes multiple SAW resonators formed on a piezoelectric substrate and connected in a ladder arrangement, the piezoelectric substrate having a polarization inverted region on which either a series-arm resonator or a parallel-arm resonator is formed.

Abstract: A microelectromechanical switch including: at least one pair of actuator electrodes; at least one input electrode and at least one output electrode for input and output, respectively, of a radio frequency signal; and a beam movable by an attraction between the at least one pair of actuator electrodes, the movable beam having at least a portion electrically connected to the at least one input electrode and to the at least one output electrode when moved by the attraction between the at least one pair of actuator electrodes to make an electrical connection between the at least one input and output electrodes; wherein the at least one pair of actuator electrodes are electrically isolated from each of the at least one input and output electrodes. The microelectromechanical switch can be configured in single or multiple-poles and/or single or multiple throws.

Abstract: A magnetically coupled switch that utilizes a flex armature has a user manipulated holder that carries at least one magnetic coupler made of magnetic material. The flex armature is a substantially flat piece of flexible magnetic material that is magnetically attracted to the at least one magnetic coupler. A carrier layer having electrical conductors formed thereon is intermediate the flex armature and magnetic coupler such that the electrical conductors are electrically connected by the flex armature where the flex armature is magnetically attracted to the magnetic coupler. In the absence of a magnetic coupler, the flex armature is normally spaced from the electrical conductors on the carrier layer. Preferably, there is a bottom cover that encloses a cavity that contains the flex armature, and the bottom cover includes at least one shock dimple that secures at least part of the flex armature to the carrier layer.

Abstract: A switch of the present invention is featured as one employing:

Abstract: A superconducting magnet, in which a static magnetic filed is generated in a region of interest, i.e. a predetermined volume in which the part under examination has to be placed for imaging characterised in that it is provided with means for generating a uniform annular distribution of electric currents enclosing the polyhedral cavity.

Abstract: A normally closed electromagnetic valve has a cylindrical valve housing; a valve seat member; a fixed core; a movable core; a valve body; a return spring; and, a coil, one side of the valve housing being housed in a mounting hole opened on one end of a substrate so as to be restricted in axial movement thereof toward the interior of the mounting hole, wherein a large diameter portion is provided in the axially middle portion of the valve housing, the cylindrical valve seat member forms an annular chamber with the inner surface of the large diameter portion, the annular chamber communicates to the valve chamber, and is fixed to and fitted in one end of the valve housing and communicating holes through which the annular chamber is communicated to the exterior of the valve housing are provided in the large diameter portion.

Abstract: A structure and method for implementing a precision inductive component within a high frequency integrated circuit is disclosed. The inductive component has a structure of multiple conductive layers dielectrically insulated from each other and located above an integrated circuit substrate. The inductive component comprises a spiral-like inductive layer made of a first conductive layer. Additionally, a number of additional ground planes, each patterned out of its own selected conductive layer to minimize an induced eddy current therein thus improving Q (quality factor) under high frequency operation, are employed with either a linear or a rotational offset amongst them to effect a corresponding amount of adjustment of an inductance value of the inductive component. A number of specific design cases are presented with their respective inductance and RF performance parameters.

Abstract: A method of real time ultrasound imaging of an object in at least three two-dimensional scan planes that are rotated around a common axis, is given, together with designs of ultrasound transducer arrays that allows for such imaging. The method is also introduced into a monitoring situation of cardiac function where, combined with other measurements as for example the LV pressure, physiological parameters like ejection fraction and muscular fiber stress is calculated.

Abstract: An inductive element (10) of an integrated circuit, comprising at least one turn (12), which is formed by an integrated elongated track (14) made of a conductive material, wherein the interior margin of the conductive track (14) comprises at least one recess (30). The invention makes it possible in particular to increase the inductivity of the element (10) in a given available space on the substrate of an integrated circuit.

Abstract: A knob having a button for a rheostat includes a base, at least one arcuate contacts, a hub, a pushbutton cap with a conductive arc corresponding to the arcuate contacts and a biasing member mounted in the pushbutton cap. The biasing member can be mounted between the pushbutton cap and the hub or the base to make the pushbutton cap return to its original position when pressure on the pushbutton cap is released. A rotating shaft of a rheostat extends out from the base and connects to the hub. The pushbutton cap is mounted on the hub to turn the hub and the rotating shaft to change resistance of the rheostat.

Abstract: A terminal plate is formed with a wide portion and a narrow portion. The wide portion, to be insert-molded by a housing of a synthetic resin, is opened by an elongate blank hole having an inner peripheral surface parallel with a side shape thereof, thereby forming two divisional parts on the both sides thereof. The divisional part is given by a width s1 narrower than a width s2 of the narrow portion, wherein the total width (s1×2) of the two divisional parts is made equal to the width s2 of the narrow portion. Grooves can be formed on the main and back surfaces of the divisional parts.

Abstract: A method and apparatus provides resistor network packages with some of the resistor sub-package positions remain open, which may accommodate different circuit configurations with a common circuit assembly. Also, the present invention provides a packaging method using resistor network packages as connecting and disconnecting mechanisms for the signal lines on the package.

Abstract: A door entry system includes control means for controlling operation of the door entry system and a deadbolt assembly that is operable to selectively lock a door. The deadbolt assembly includes: a first bolt member movable between an extended and a retracted position; switch means arranged on said first bolt member, the switch means conveying a signal to the control means to move said first bolt member between the extended and retracted positions when the switch means is activated; and, driving means for selectively moving the first bolt member between the extended and retracted positions.

Abstract: An operator (32) with transmitter overwrite protection is used with a plurality of different transmitters (40, 42, 44). Each type of transmitter has at least one command button that when actuated generates a signal which includes at least a transmitter identifying code. The operator includes a receiver (170) capable of receiving the signal from any of the plurality of transmitters and a memory device (62) that has a plurality of storage locations (63a-f). A controller (60) is connected to the receiver and the controller stores each transmitter identifying code in a corresponding storage location. The controller overwrites one of the transmitter identifying codes in a corresponding storage location when a new transmitting code is learned if the plurality of storage locations are full, except for the transmitter identifying codes for one specific type of the plurality of transmitters.

Abstract: In an information providing system which intermittently provides information which varies along with the passage of time, a plurality of comments which respectively correspond to a plurality of patterns of information change are prepared, and changes of the information which is provided are detected. A comment which corresponds to a change of information which has been detected is searched for among the plurality of comments which are prepared, and the comment which is found is added to the information which is being provided, and the edited information is provided.

Abstract: The present invention comprises methods and apparatus for locating items using passive transponders called radio frequency identification devices or “RFIDs.” In a first embodiment of the invention, a small business like a law firm or doctor's office can use self-adhesive RFID labels to keep track of files and important papers. In a second embodiment, items purchased from a retailer which are already attached to an RFID label are automatically detected and tracked by a wireless sniffer when the purchases are brought home. In a third embodiment, a retailer uses the RFID labels to conduct an automatic wireless inventory. In a fourth embodiment, the retailer uses the same system to reduce losses due to theft of merchandise. In a fifth embodiment, the retailer uses the RFID labels to provide automatic wireless check-out. In a sixth embodiment, the retailer analyzes the inventory of goods within a customer's home to enhance sales and marketing strategies.

Abstract: The present invention comprises methods and apparatus for applying radio frequency identification devices or other integrated circuits to substrates like sheets of paper, labels or other surfaces or materials.

Abstract: A method and system for optimizing an interrogation of a tag population that includes a plurality of tags, wherein each of the plurality of tags is assigned a tag address includes determining a tag population size; selecting one of a plurality of efficiency profiles that matches the determined tag population size; and defining a plurality of interrogation read cycles according to the selected efficiency profile.

Abstract: A signaling retention device that is configured to retain an element in a particular position and to emit an audible and/or visual signal. The signaling retention device may include a power source, memory, a central processing unit (CPU), sensor(s), audible indicator(s), light source(s), switch(es), camera(s), a transceiver, a microphone, impact tool(s), and aromatic element(s) and may be configured in the form of a character, such as a cartoon character or the like. The power source may be any suitable power source, such one or more batteries (rechargeable or non-rechargeable) or the like, and may be removable or non-removable. Similarly, the memory, CPU, audible indicator(s), light source(s), switch(es), camera(s), transceiver, microphone, impact tool(s), and aromatic element (s) may be any types well known in the art.