Abstract: Circuits and associated methods for operation thereof for gathering real-time statistical information regarding operation of the arbiter circuit in a particular system application. The real-time statistical information so gathered is useful for off-line analysis by a system designer for determining optimal configuration and parameter values associated with operation of a particular arbiter in a specific system application. In a first exemplary preferred embodiment, a timer circuit associated with the arbiter measures a predetermined period of time during which statistical data is to be gathered. Counter circuits associated with the arbiter count the number of occurrences of events of interest to the designer during the time period measured by the timer circuit. Each counter circuit preferably senses and counts a particular event of interest to the designer.

Abstract: A three-dimensional semiconductor device with two selectable manufacturing configurations includes a first module layer having a plurality of circuit blocks; and a second module layer formed substantially above the first module layer, wherein in a first selectable configuration a plurality of memory circuits are formed to store instructions to control a portion of the circuit blocks, and wherein in a second selectable configuration a predetermined conductive pattern is formed in lieu of the memory circuit to control substantially the same portion of the circuit blocks.

Abstract: A method of forming an output transistor (11) protects the output transistor (11) from overvoltage conditions on an output (13). The body of the output transistor (11) is coupled to the gate of the transistor (11) prior to the high voltage being applied to the output (13).

Abstract: A sending LSI of a signal transmission system is provided with a synthesizing section for producing a multivalued logic signal by synthesizing a clock signal with a data signal in sync with the clock signal. In the meantime, a receiving LSI of the signal transmission system is provided with a separation section for separating the multivalued logic signal, which has been transmitted from the sending LSI, into the original clock signal and data signal. With this arrangement, it is possible to eliminate the constraint of a setup/hold period in the receiving end, without providing complicated synchronizing circuits such as a PLL circuit in the logic circuit of the receiving end.

Abstract: A semiconductor integrated circuit includes a signal output circuit including a first switching device and a second switching device; and a third switching device. The first switching device is supplied with a first voltage via the third switching device. The second switching device is supplied with a second voltage. The signal output circuit receives a first binary signal, and outputs at least one of two values of a second binary signal based on the first binary signal, the first voltage and the second voltage. The third switching device receives a control signal for controlling the third switching device to be in an ON state or in an OFF state; and when the third switching device is in the OFF state, the third switching device turns OFF the supply of the first voltage to the first switching device.

Abstract: A technique is disclosed for providing a charge pump circuit for phase locked loop (PLL) to reduce mismatch of up/down currents and feed-through of up/down currents to voltage output. Elimination of feed-through of the input signal may be achieved by using differential switches (M1 and M2, and M3 and M4) based on DC reference voltage in the charge pump and also eliminate the mismatch of up/down currents in a wide voltage output range by applying a new replica biasing using feedback.

Abstract: The present invention is relative to a starter circuit for starting and re-starting a main circuit (20) in startup and during the unusual operation of the main circuit. The starter circuit includes a startup signal supplying unit (11) for supplying a stop signal for stopping the operation of the main circuit when the standby signal is at a standby level, supplying a startup signal to a circuit startup node (22) of the main circuit when the standby signal is changed from the standby level to the startup level and for halting the supply of the stop signal.

Abstract: It is an object of the present invention to provide a technique for causing an external system to recognize a power loss of a switching semiconductor device in a semiconductor module comprising the switching semiconductor device. A switching semiconductor device (11) provided in a semiconductor module (10) includes a plurality of switching semiconductor elements. A loss calculating section (12) calculates a power loss generated in the switching semiconductor device (11) based on a voltage of each of the switching semiconductor elements which is measured by a voltage measuring section (13) and a current of each of the switching semiconductor elements which is measured by a current measuring section (14). The loss calculating section (12) outputs loss data indicative of the power loss thus calculated as a data signal to a motor control section (82) provided on the outside of the semiconductor module (10).

Abstract: A storage circuit comprises a first clock receiver circuit for receiving an external clock signal so as to produce from said external clock signal a first internal clock signal and so as to output the first internal clock signal for use within the storage circuit, as well as a second clock receiver circuit for receiving said external clock signal and for producing from said external clock signal a second internal clock signal, said second clock receiver circuit consuming less current than said first clock receiver circuit. In addition, a circuit block is provided, which operates on the basis of said first or second internal clock signal and which is used for switching off said first clock receiver circuit when a power-down-precharge mode exists, said circuit block operating on the basis of said second internal clock signal, when the first clock receiver circuit has been switched off. A reduced current consumption can be achieved by the present invention in this way.

Abstract: A latch is provided which includes: a transparent catch latch having a data input, a data output and a control node arranged to receive a catch signal; a transparent pass latch having a data input connected to the data output of the transparent catch latch at an internal storage node, a data output, and a control node arranged to receive a pass signal; and logic circuitry having an enable input and a clock input connected to provide a gated clock signal to provide one of said catch signal and said pass signal.

Abstract: A data delay circuit effectively provides a delayed serial digital data signal, with the ability to change the delay amount continuously, by delaying a lower frequency parallel data clock rather than the serial digital data signal directly. A first delay circuit 102 receives a parallel data clock which is delayed according to a first control signal to provide a delayed parallel data clock. The frequency of the parallel data clock is lower than that of a serial data clock so the first delay circuit 102 may be a delay device that provides a larger delay. A phase-locked loop 114 receives the delayed parallel data clock to generate the serial data clock in phase with the delayed parallel data clock. A parallel-to-serial converter 112 reads an n-bit parallel digital data signal from a memory 100 according to the delayed parallel data clock, and converts the parallel digital data signal to the serial digital data signal according to the serial data clock S_CLK.

Abstract: A frequency generating circuit utilizes a quad modulus prescaler in which two control signals are used to select the prescaler modulus. The modulus control signals are generated by a multistage counter in which two independent counting stages are used to generate the first and second modulus control signals. The first modulus control signal is at a first logic level when the associated counter is at a non-zero value and is at a second logic level when the associated counter reaches zero. The second modulus control signal is generated by a second counter and has a first logic value when the second counter is in a non-zero state and a second logic value when the second counter reaches zero.

Abstract: In an offset control circuit, a voltage/current converting portion generates differential current (I+ and I−) that are proportional to a potential difference between differential input voltage signals (VIN+ and VIN−), and an offset adjusting current-generating portion generates offset adjusting currents (Iofs+ and Iofs−). In a current/voltage converting portion, a current (Ir) that is proportional to a potential difference between differential terminals flows through. Differential current output terminals, offset adjusting current-output terminals and the differential terminals are connected. The offset components contained in the differential input voltage signals (VIN+ and VIN−) are adjusted with the offset adjusting currents (Iofs+ and Iofs−), and differential output voltage signals (VO+ and VO−) in which the offset components are added to the differential input voltage signals (VIN+ and VIN−) are generated.

Abstract: The present invention relates to an apparatus for automatically selecting an internal or external resistor, characterized by that a built-in control unit is placed in the front of the oscillator of the integrated circuit, and such control unit comprises a detection circuit for coupling the external resistor and oscillator, and an internal resistor bridging the detection circuit in parallel with its output end such that the detection circuit can automatically detect whether or not there is any input of serial signal from the external resistor to switch into the external or internal resistor at appropriate time, and further select inputting the optimal operating frequency of the control IC.

Abstract: A voltage conversion circuit has a pulse generator that generates a pulse signal having a fixed pulse width and a variable pulse period. The output voltage of this voltage conversion circuit is determined according to the ratio of the pulse width to the pulse period of the pulse signal generated by the pulse generator. This circuit configuration makes it possible to produce as the output voltage lower voltages than ever.

Abstract: A sequential fuse latch device comprises a plurality of fuse latches, wherein each fuse latch is a data storage element, and a shift register comprising a plurality of pointer latches, wherein each pointer latch is connected to at least one fuse latch, wherein the shift register controls a sequential operation of the plurality of fuse latches.

Abstract: A digital-analog converter (DAC) cell circuit. The circuit includes a current source, a first resistor, a second resistor, a first MOSFET, a second MOSFET, a third MOSFET and a forth MOSFET. The first MOSFET has a source and a drain connected to the current source and the first resistor, respectively, and a gate receiving a first control signal. The second MOSFET has a source and a drain connected to the current source and the second resistor, respectively, and a gate receiving a second control signal. The third MOSFET has a source and a drain connected to the source and drain of the first MOSFET, respectively, and a gate receiving a third control signal. The fourth MOSFET has a source and a drain connected to the source and drain of the second MOSFET, respectively, and a gate receiving a fourth control signal. The third control signal is a signal delayed of the first signal and the forth control signal is a signal delayed of the second signal.

Abstract: A semiconductor integrated circuit device having an internal voltage generating circuit which generates a voltage two or more times higher than an operating voltage while at the same time reducing the voltage applied to a device, thereby ensuring the device reliability. In a charge pump circuit driven by supply voltage VDD, a maximum of 2 VDD or a similar level voltage is applied between the drain and source of a MOSFET, the MOSFET being connected in series with a conduction MOSFET of the same type, the gate of which is supplied with VD-VDD, or a potential which is VDD lower than VD, the drain potential before its connection. The gate potential is obtained directly from a node in said charge pump which generates a voltage pulse synchronized with the voltage between the drain and source of that MOSFET, or through another rectifier device branched via a capacitor from the node.

Abstract: In this circuit, an external voltage source is supplied or down converted in response to a normal operating mode to provide the internal voltage source of a first level to the internal circuit. The external voltage source is converted to a voltage of a second level, lower than the first level, in response to a low consumption power mode having a complementary relation with the normal mode.

Abstract: An active filter for reducing the common mode current in a pulse width modulated drive circuit driving a load, said drive circuit comprising an a-c source, a rectifier connected to said a-c source and producing a rectified output voltage connected to a positive d-c bus and a negative d-c bus, a PWM inverter having input terminals coupled to said positive d-c bus and negative d-c bus and having a controlled a-c output, a load driven by said a-c output of said PWM inverter, a ground wire extending from said load, and a current sensor for measuring the common mode current in said drive circuit in said ground wire, said current sensor producing an output current related to said common mode current, said active filter comprising a first and second MOSFET transistor, each having first and second main electrodes and a control electrode, and an amplifier driving a respective one of the transistors; said first electrode of said first and second transistor coupled to a common node, said second electrodes of said first

Abstract: A modulator for modulating carrier wave signals with an in-phase component signal and a quadrature component signal includes a fixed frequency signal generating means for generating two fixed-frequency signals differing 90 degrees in phase, a variable frequency signal generating means for generating a signal whose frequency can be varied according to a modulated signal to be produced, an in-phase component carrier wave signal generating means for mixing one fixed-frequency signal and the variable-frequency signal to generate a carrier wave signal for an in-phase component, a quadrature component carrier wave signal generating means for mixing the other fixed-frequency signal and the variable-frequency signal to generate a carrier wave signal for a quadrature component, an in-phase component modulating means for modulating the in-phase component carrier wave signal with the in-phase component signal, and a quadrature component modulating means for modulating the quadrature component carrier wave with the quadr

Abstract: A distortion compensation apparatus and method for a power amplifier enable accurate distortion compensation, even if frequency amplitude deviation and group delay error are present in the power amplifier. A reverse distortion coefficient is read from a reverse distortion coefficient table. A distortion compensation process is performed on an incoming signal using the read reverse distortion coefficient. The distortion compensated signal is amplified and transmitted by the power amplifier, and the reverse distortion coefficient table is updated based on the incoming signal before distortion compensation, and the output signal of the power amplifier. The relation between the phase of the time difference value and the reverse distortion coefficient is obtained from the reverse distortion coefficient corresponding to a linear operation domain of the power amplifier.

Abstract: An electronic circuit for a switching power amplifier is shown where in order to reduce problems during the transition stage when switching an output stage of the amplifier, the circuit comprises an output stage formed by at least two switching stages 54,55. Each of the switching stages 54,55 comprises at least two power switches and provides an output between the at least two power switches. Further, the switching stages 54,55 are connected in parallel to each other. The proposed circuit comprises in addition clocking means for switching the power switches, wherein the clocking means switch the power switches of at least one of the switching stages 55 in an overlapped mode and the power switches of at least one other of the switching stages 54 in a non-overlapped mode. The invention relates equally to a corresponding method.

Abstract: Base biases that are supplied to an RF transistor when the RF transistor is in high output power operation and in low output power operation, respectively, are supplied from different voltage sources. When an amplifier is in high output power operation, a base bias is output from a bias circuit unit. At this time, the RF transistor performs a constant voltage operation based on the bias that is output from the bias circuit unit. When the amplifier is in low output power operation, a base bias is supplied from a reference voltage terminal via a resistor. This makes it possible to decrease a variation in base bias voltage. When the amplifier is in low output power operation, operation of the bias circuit unit is prohibited and hence no current is consumed in the bias circuit unit, whereby an efficiency of the amplifier can be increased.

Abstract: A broadband amplification apparatus for extending a bandwidth includes a first and a second amplifying unit for amplifying an input signal, a buffering unit and a first inductive buffer. The buffering unit disposed between the first and the second amplifying unit buffers an output signal of the first amplifying unit to thereby maintain a bandwidth of the output signal, increases a gain and returns back a portion of the buffered signal to the first amplifying unit. The first inductive buffer, which is connected to the buffer unit, enhances input impedance as a frequency increases within a predetermined range, thereby introducing little gain changes while serving to extend a bandwidth.

Abstract: There is described a time base comprising a resonator (4) and an integrated electronic circuit (3) for driving the resonator into oscillation and for producing, in response to the oscillation, a signal having a determined frequency. The resonator is an integrated micromechanical ring resonator supported above a substrate (2) and adapted to oscillate around an axis of rotation (O) substantially perpendicular to the substrate, the ring resonator comprising a central post (5) extending from the substrate along the axis of rotation, a free-standing oscillating structure (6) connected to the central post and including an outer ring (60) coaxial with the axis of rotation and connected to the central post by means of a plurality of spring elements (62), and electrode structures (9; 9*) disposed around the outer ring and connected to the integrated electronic circuit.

Abstract: A two-port isolator capable of suppressing propagation of the second harmonic wave (2f) or the third harmonic wave (3f) of the used frequency f includes a parallel RC circuit, which includes a first matching capacitor and a resistor, and the parallel RC circuit is electrically connected between an input port P1 and an output port P2. A series resonant circuit including a second matching capacitor and an inductor is electrically connected between the output port P2 and ground. The resonant frequency of the series resonant circuit is set between the frequencies of the second and third harmonic waves.

Abstract: The disclosed example of an N-way RF divider has a first conductor that directs RF energy through a body to a common node of a planar conductive pattern of equiangularly spaced, radially extending arms of equal length. Secondary conductors extend orthogonally to the planar pattern through corresponding passages from the ends of the radial arms. The secondary conductors may extend parallel to and circumferentially spaced from the first conductor. Resistors may connect adjacent ends of the secondary conductors opposite from the planar conductive pattern.

Abstract: The present disclosure provides a high performance hybrid magnetic structure made from a combination of permanent magnets and ferromagnetic pole materials which are assembled in a predetermined array. The hybrid magnetic structure provides means for separation and other biotechnology applications involving holding, manipulation, or separation of magnetizable molecular structures and targets. Also disclosed are: a method of assembling the hybrid magnetic plates, a high throughput protocol featuring the hybrid magnetic structure, and other embodiments of the ferromagnetic pole shape, attachment and adapter interfaces for adapting the use of the hybrid magnetic structure for use with liquid handling and other robots for use in high throughput processes.

Abstract: A transformer (24) includes a first winding (28) and a second winding (30) coupled to the first winding (28) through a magnetic circuit so that current through the first winding (28) induces a voltage across the second winding (30). The first winding (28) includes n separate shield portions (32-1, 32-2, . . . 32-n), where n is an integer. Each of the n shield portions shields only a corresponding portion of the first winding (28). Each of the n shield portions is electrically coupled to the adjacent shield portion(s) (32-1, 32-2, . . . 32-n) substantially only through its coupling to the first winding (28), the first winding (28), and the other(s) of the adjacent shield portion's (s') coupling(s) to the first winding (28).

Abstract: A planar inductor having at least a helical coil and a coating of ferromagnetic material deposited on a flat carrier. The inductance and/or the magnetic coupling of a plurality of coils or windings of the inductor can be set precisely through the ferromagnetic material, which is inside an insulant window that is fixed to the carrier, being deposited on the carrier during the coating process.

Abstract: In an inductor comprising an open magnetic path formed by a soft magnetic material and a winding provided around the open magnetic path, the soft magnetic material has its relative complex dielectric constant varying according to a frequency. In the soft magnetic material, the imaginary part of the relative complex dielectric constant is greater than the real part thereof in a high-frequency band equal higher than the frequency of the electric signal flowing in the winding. Specifically, the soft magnetic material has a resistivity of 150 &OHgr;m, has a real part of the relative complex dielectric constant, ranging from 1,000 to 20,000 at 1 kHz and 50 or less at 1 MHz, and the imaginary part is greater than the real part at 1 MHz.

Abstract: An inductor coil is made with winding turns in a conical shape, tapered from a very small diameter and gradually increasing. The core of the coil is composed of a dielectric material with a colloidal suspension of magnetic particles, i.e. poly-iron. A heatsink, such as a wire or ceramic rod, is partially embedded in the core. The heatsink functions to remove heat from the core, thereby reducing the temperature rise during inductor operation. The reduction in temperature rise permits operation at currents above 1.0 amp while preserving high-frequency performance.

Abstract: A common mode and differential mode inductance assembly including first and second toroidal cores wherein first and second windings are wrapped about first and second segments of the first core and the first core forms a first surface and wherein the second core forms a second surface and is positioned adjacent the first core such that the first and second surfaces oppose each other and a gap is formed between the first and second surfaces.

Abstract: A coil has foil conductor windings which are formed into self leads and provide a stable mount to a printed circuit board or the like. End portions of the foil windings, having conductive opposite sides, are cut and formed into stacks. The stack configuration forms the self leads of the foil winding and facilitates the winding's exit from the coil. The self leads extend from the coil and are formed to reach to the printed circuit board (PCB). The self leads are strong enough to mount the coil to the PCB. The ends of the self leads are trimmed to fit through holes in the PCB. After insertion, the layers of the self leads are bent in opposing directions to substantially block the hole, prevent extraction, and prevent solder from flowing through the holes. The self leads are then soldered to the board. A bobbin having discontinuous flanges facilitates the exits of the self leads from the coil. The invention is useful in coils, inductors, transformers, and the like.

Abstract: A disconnect switch for the load circuit of a vehicle battery, includes a movable contact element (81) and a stationary contact element (64) that are linked with a locking mechanism. For releasing the locking mechanism a shape-memory alloy release element (4) is used that contracts when heated. For closing the locking mechanism a shape-memory alloy spring element (110) is provided that induces closure of the mechanism by expansion.

Abstract: A method for post-fabrication modification of the snap actuation properties of a thermally responsive bimetallic actuator by exposing a pre-formed bimetallic actuator to laser energy, thereby permanently altering the thermal response properties of the bimetallic actuator, and a thermally responsive bimetallic actuator having snap actuation properties developed according to the method.

Abstract: A method for post-fabrication modification of the snap actuation properties of a thermally responsive bimetallic actuator by exposing a pre-formed bimetallic actuator to laser energy, thereby permanently altering the thermal response properties of the bimetallic actuator, and a thermally responsive bimetallic actuator having snap actuation properties developed according to the method.

Abstract: A controllable electronic switch for, e.g., controlling power distribution comprises a deformable member such as a bimetal arm that can be deformed to break an electrical path. The deformable member may be anchored at one end and in controllable contact with an electrical conductor at the other end. A heating element, such as a coil, can be used to selectively heat the deformable member. The controllable electronic switch can alternatively comprise a deformable member that is terminated in a wedge-shaped member. When the deformable member bends in response to being heated, the wedge-shaped member forces apart a pair of contacts thus breaking an electrical path. The wedge-shaped member and/or associated structures may be configured as a cam mechanism with multiple latching positions.

Abstract: An innovative structure for the chip type thick film resistance is disclosed. It comprises a copper structure electroplated to the conductor portion on an insulation layer, or comprises a copper structure electroplated to the conductor portion beneath a soldering interphase layer, or comprises both. With this structure, the resistance and the thermal resistivity of the product is greatly reduced, and the laser resistance trimming can be easily and precisely executed, also production yield will be satisfactorily improved.

Abstract: A resistor having a desired temperature coefficient of resistance and a total electrical resistance. A first resistor segment has a first temperature coefficient of resistance and a first electrical resistance. A second resistor segment has a second temperature coefficient of resistance and a second electrical resistance. The first resistor segment is electrically connected in series with the second resistor segment, and the total electrical resistance equals a sum of the first electrical resistance and the second electrical resistance. The desired temperature coefficient of resistance is determined at least in part by the first temperature coefficient of resistance and the first electrical resistance of the first resistor and the second temperature coefficient of resistance and the second electrical resistance of the second resistor.

Abstract: The respective sections between a power source unit 4 and a room master station 1, between the room master station 1 and an entrance door station 2, and between the entrance door station 2 and an electric lock 3 are connected by transmission lines of two-wire system 6 for transmitting signals and electric power.

Abstract: A vehicle remote control system includes a multi-bank remote transmitter to be carried by a user and having selectable signal banks, such as for different vehicles. The vehicle remote control system also includes a controller at the vehicle that is switchable to a first mode for learning at least one signal bank from the remote transmitter based upon transmission therefrom to define a learned operable signal bank for thereafter controlling at least one corresponding vehicle function. The controller is also switchable to a second mode for deriving at least one other operable signal bank based upon the learned operable signal bank so that the controller is responsive to the remote transmitter without learning the other signal bank. Accordingly, in some embodiments the controller may be responsive to the multi-bank remote transmitter irrespective of the selected banks.

Abstract: System, apparatus and method for connecting a passive optical network (“PON”) to a power line communications (“PLC”) network using a PLC HeadEnd installed at the PON to provide for distribution of high speed, broadband data communications services available on the PON to the PLC network using high speed, broadband PLC data signals. Where the PLC HeadEnd is installed on a medium voltage power distribution network, a PLC bypass unit is installed at a medium voltage/low voltage power transformer in the PLC network to provide PLC signal connectivity between the MV and LV networks. A PLC residential gateway is installed at each end user facility, such as a home or business, desiring broadband service available on the PON.

Abstract: A vehicle legal compliance system for reporting a compliance status of a vehicle has a central computer with a vehicle database, and a legal compliance indicator for indicating the legal compliance status of the vehicle. The vehicle database is adapted for storing a unique vehicle identifier associated with the vehicle, and the compliance status of the vehicle. The vehicle legal compliance system also has a central processor for converting the unique vehicle identifier and the compliance status into a status indicator signal. The status indicator signal is received by the legal compliance indicator, and a microprocessor decodes the status indicator signal for operably controlling the status indicator. The legal compliance indicator is adapted to be operably attached to the vehicle for displaying the status indicator and the results of the status indicator signal.

Abstract: A security system of a construction machine of the present invention has a construction machine, a base station and a communication device. The construction machine comprises a data sending and receiving portion for sending first information, a storage portion for storing received information, and a control portion for controlling an operation of the construction machine. The base station receives the first information from the data sending and receiving portion of the construction machine and sends second information to the construction machine and manages the construction machine. It is configured so that the communication device is connected to the base station through a communication network and can send third information to the construction machine through the base station.

Abstract: Disclosed is a dead zone monitoring system for monitoring the dead zone of a vehicle. The dead zone monitoring system includes a photographing device disposed on the front pillar for photographing a dead zone of a driver caused by the front pillar of the vehicle; an image controller connected with the photographing device for analyzing, transforming and processing an information image that is photographed by the photographing device; and a display device connected with the image controller by using an imagery signal cable for displaying the information image provided from the image controller. The photographing device can be an optical lens, and the imagery signal cable can be also an optical cable. The display device can be an optical monitor.

Abstract: A security alarm system that provides secure, realtime video of a secured location to one or more emergency response agencies over a high-speed communications link, such as an Internet link. Realtime video information is therefore placed directly into the hands of those who are called upon and trained to respond to a potential emergency. As such, the emergency response agencies and their personnel are better informed. This, in turn, allows the personnel to be better prepared in their response to the potential emergency, saving manpower, money, lives and reducing the number of false alarms.

Abstract: A security alarm system that provides secure, realtime video and/or other realtime imagery of a secured location to one or more emergency response agencies over a high-speed communications link, such as an Internet link. Realtime video and/or realtime imagery, along with other useful information is therefore placed directly into the hands of those who are called upon and trained to respond to a potential emergency. As such, the emergency response agencies and their personnel are better informed. This, in turn, allows the personnel to be better prepared in their response to potential emergencies or acts of terrorism, saving manpower, money, lives and reducing the number of false alarms.

Abstract: A communication device is provided which is intended to aid farm workers in the coordination of harvesting and hauling vehicles in the field during crop harvesting operations. This communication device consists of a transmitter and receiver which are mounted at convenient points within the harvesting vehicle and produce hauling truck respectively. The receiver contains four lighted directional arrows representing directional changes of forwards, backwards, left, and right. The transmitter contains four buttons that correspond in location and function to the directional arrows on the receiver. Thus, when a button on the transmitter is depressed by the harvester operator, the corresponding directional arrow on the receiver will light up signaling the truck driver to make a change in the position of his truck relative to the harvester.