Abstract: The invention relates to a solid composition which can decompose with the generation of hydrogen according to a self-sustaining combustion reaction after initiation of this reaction by an appropriate heat source, this composition being characterized in that it comprises an alkali metal borohydride or alkaline earth metal borohydride and a perchlorate-based oxidizing salt corresponding to the general formula XClO4 in which X represents the NH4 group, an alkali metal or an alkaline earth metal.

Abstract: There are provided a liquid crystalline compound having a large negative &Dgr;&egr;, low viscosity, a large K33/K11 value, a small &Dgr;&egr;/&egr;L and mutually excellent solubility even at extremely low temperature; a liquid crystal composition prepared from a liquid crystalline compound; and a liquid crystal display device fabricated from such a liquid crystal composition.

Abstract: The invention relates to luminophores having semiconducting properties and to the production and use thereof in organic luminous diodes (OLEDS) and organic solar cells. The novel materials are easy to prepare and exhibit excellent current density and efficiency when used in organic luminous diodes.

Abstract: A composite body produced by a reactive infiltration process that possesses high mechanical strength, high hardness and high stiffness has applications in such diverse industries as precision equipment and ballistic armor. Specifically, the composite material features a boron carbide filler or reinforcement phase, and a silicon component with a porous mass having a carbonaceous component. Potential deleterious reaction of the boron carbide with silicon during infiltration is suppressed by alloying or dissolving boron into the silicon prior to contact of the silicon infiltrant with the boron carbide. In a preferred embodiment of the invention related specifically to armor, good ballistic performance can be advanced by loading the porous mass or preform to be infiltrated to a high degree with one or more hard fillers such as boron carbide, and by limiting the size of the largest particles making up the mass.

Abstract: Organic dye molecular materials prepared by coupling existing organic chromophore molecules to benzene or carbazole derivatives and nonlinear optical polymeric compounds having polyimide repeating units coupled with the organic dye molecular material are provided.

Abstract: Organic dye molecular materials prepared by coupling existing organic chromophore molecules to benzene or carbazole derivatives and nonlinear optical polymer compounds having polyimide repeating units coupled with the organic dye molecular material are provided.

Abstract: A hydraulic jack includes a first cylinder, a handle pivotally connected to the first cylinder to activate the first cylinder, a second cylinder in communication with the first cylinder and having a piston received in the second cylinder to connect to an arm so as to support a seat on top of the arm. A pivotal shaft is provided at a joint between the first cylinder and the second cylinder so that the first cylinder is pivotally connected to the second cylinder by means of the pivotal shaft.

Abstract: A system for pulling wire over or through structural members of a building, including an elongate shuttle, including a leading end and a trailing end. Connecting means are associated with the shuttle, and are configured for connecting to the shuttle a wire to be pulled by the shuttle. An interlock device, separate from the shuttle is selectively and releasably engagable with the shuttle. Engaging means, are associated with the shuttle and selectively and releasably engagable by the interlock device for transferring force from the interlock device to the shuttle to move the shuttle. A method for pulling wire through or over structural members of a building is also provided and includes the steps of connecting a portion of the wire to an elongate shuttle; physically engaging the shuttle with an interlock device at a first location; and feeding the shuttle, and thus the wire to be pulled, with the interlock device from the first location to a second location.

Abstract: A system and method of use for determining a desired physical parameter relating to a load deployed by a movable vessel, in a predetermined plane, using a sensor disposed proximate the load underwater where the sensor produces a transmittable signal indicative of the desired physical parameter and communicates the signal, via a communication link, to a receiver that receives and indicates the pressure signal. A deployment frame may be used to further support the load. Once deployed, the load encounters water having changes in the detected physical parameter and the sensor sends a signal indicative of the changes such as to a controller or computer located on a movable vessel. These signals can be used to determine movement and positioning of the load, e.g. when positioning the load proximate an underwater structure.

Abstract: A mobile service rig for wells includes a hoist powered by an internal combustion engine. In response to the hoist exerting a predetermined lifting force, the lifting force is limited by automatically limiting or reducing the speed of the engine.

Abstract: In a semiconductor device functioning as a SiGeC-HBT, an emitter/base stacked portion 20 is formed on a Si epitaxially grown layer 2. The emitter/base stacked portion 20 includes: a SiGeC spacer layer 21; a SiGeC core base layer 22 containing boron at a high concentration, a SiGe cap layer 23; a Si cap layer 24, and an emitter layer 25 formed by introducing phosphorus into the Si cap layer 24 and the SiGe cap layer 23.

Abstract: A photosensitive device with a photodiode and an amplifier is disclosed. The diode is in series with a feedback transistor which forces the voltage derived from the photocurrent to be a logarithmic function of the light intensity. A current mirror is provided which controls the bias current to the amplifier to be proportional to the photocurrent. This arrangement ensures that the amplifier, just as the voltage derived from the photocurrent, becomes faster with increasing light intensity and therefore prevents an unnecessarily high power consumption at low light intensities.

Abstract: An organic EL device having a light emitting element including a first electrode (2), a second electrode (4) of transparent conductive film, and a light emitting organic material layer (9) formed between said first electrode (2) and said second electrode (4), wherein said transparent conductive film is made of a metal oxide deficient in oxygen as compared with stoichiometric composition. Since the transparent conductive film (4) directly in contact with the light emitting organic material layer (9) over a wide area is made of the metal oxide deficient in oxygen as compared with stoichiometric composition, the transparent conductive film can absorb moisture and oxygen which may possibly absorbed by the light emitting organic material layer so that the light emitting organic material layer is prevented from deteriorating, and the long emission lifetime of the element can be ensured.

Abstract: In a semiconductor device acting as an HBT, an emitter/base laminate portion is provided on a Si epitaxially grown layer in the SiGeC-HBT. The emitter/base laminate portion includes a SiGeC spacer layer, a SiGeC core base layer containing the boron, a Si cap layer, and an emitter layer formed by introducing phosphorous into the Si cap layer. The C content of the SiGeC spacer layer is equal to or lower than that of the SiGeC core base layer.

Abstract: A process via mismatch detecting device is disclosed. Because the vias in the detecting circuit of process via mismatch detecting device are mismatched while the vias between the metal layers of the chips are mismatched, by appropriately placing vias in detecting circuit of process via mismatch detecting device properly, metal lines of different metal layers in the detecting circuit can become short-circuited by mismatched vias, so as to output a voltage signal that is higher after vias mismatch and is regarded as the result of detecting via mismatch. Therefore, the direction and quantity of via mismatch between the metal layers in the chip are detected and monitored effectively, so as to optimize the process. Thus, the yield of process is increased and the cost is decreased.

Abstract: Method and apparatus for optically testing (e.g., using a laser beam) an operating integrated circuit (device under test—DUT) that actively control the operating temperature of the DUT. This is chiefly useful with flip-chip packaged ICs. The temperature of the DUT varies with its operating power consumption, and this fluctuation in temperature adversely affects the results obtained during optical probing or other optical testing. Furthermore, the DUT may be damaged if its temperature exceeds design limits. The temperature of the DUT is controlled by thermally contacting the exposed backside surface of the DUT die to a diamond film heat conductor, an associated heat sink structure, and at least one thermoelectric device. The thermoelectric device is controlled by a temperature sensor proximal to the DUT. By controlling the amount and direction of the electrical current supplied to the thermoelectric device in response to the sensed temperature, the temperature of the DUT is maintained.

Abstract: An object of the present invention is to provide a ceramic substrate for a semiconductor producing/examining device, capable of controlling the temperature of a resistance heating element, thereby suitably controlling the temperature of a semiconductor wafer placed on a ceramic substrate or the like and evenly heating the semiconductor wafer. The ceramic substrate for a semiconductor producing/examining device according to the present invention comprises at least a resistance heating element formed on a surface thereof or inside thereof, wherein a region: where a semiconductor wafer is directly placed; or where a semiconductor wafer is placed apart from the surface thereof while keeping a given distance, exists inside a surface region corresponding to the region where said resistance heating element is formed.

Abstract: Disclosed herein is a semiconductor device with high reliability which has TFT of adequate structure arranged according to the circuit performance required. The semiconductor has the driving circuit and the pixel portion on the same substrate. It is characterized in that the storage capacitance is formed between the first electrode formed on the same layer as the light blocking film and the second electrode formed from a semiconductor film of the same composition as the drain region, and the first base insulating film is removed at the part of the storage capacitance so that the second base insulating film is used as the dielectric of the storage capacitance. This structure provides a large storage capacitance in a small area.

Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.

Abstract: The invention includes three-dimensional TFT based stacked CMOS inverters. Particular inverters can have a PFET device stacked over an NFET device. The PFET device can be a semiconductor-on-insulator thin film transistor construction, and can be formed over a conventional substrate (such as a monocrystalline silicon wafer) or a non-conventional substrate (such as one or more of glass, aluminum oxide, silicon dioxide, metal and plastic). The thin film of semiconductor material can comprise both silicon and germanium. Further, the thin film can contain two different layers. A first of the two layers can have silicon and germanium present in a relaxed crystalline lattice, and a second of the two layers can be a strained crystalline lattice of either silicon alone, or silicon in combination with germanium. The invention also includes computer systems utilizing such CMOS inverters.

Abstract: A semiconductor thin film is formed having a lateral growth region which is a collection of columnar or needle-like crystals extending generally parallel with a substrate. The semiconductor thin film is illuminated with laser light or strong light having equivalent energy. As a result, adjacent columnar or needle-like crystals are joined together to form a region having substantially no grain boundaries, i.e., a monodomain region which can substantially be regarded as a single crystal. A semiconductor device is formed by using the monodomain region as an active layer.

Abstract: A light-emitting package (510) includes a substantially transparent substrate (526) having a first surface (550) and a second surface (552), and a light-emitting diode (LED) (518) adapted to emit light having a predetermined wavelength, the LED (518) being secured over the first surface (550) of the substantially transparent substrate (526). The second surface (552) of the substrate defines a principal light emitting surface of the package, and includes a grating pattern (554) that matches the predetermined wavelength of the light emitted from the LED (518) for controlling the emission geometry of the light emitted by the package.

Abstract: A semiconductor light emitting device is disclosed, including a semiconductor substrate, an active region comprising a strained quantum well layer, and a cladding layer for confining carriers and light emissions, wherein the amount of lattice strains in the quantum well layer is in excess of 2% against either the semiconductor substrate or cladding layer and, alternately, the thickness of the quantum well layer is in excess of the critical thickness calculated after Matthews and Blakeslee.

Abstract: A vertical-cavity, surface-emission-type laser diode includes an optical cavity formed of an active region sandwiched by upper and lower reflectors, wherein the lower reflector is formed of a distributed Bragg reflector and a non-optical recombination elimination layer is provided between an active layer in the active region and the lower reflector.

Abstract: First, a semiconductor film made of gallium nitride with a thickness of about 5 &mgr;m is deposited on a substrate made of sapphire. Subsequently, a surface of the substrate opposite to the semiconductor film is irradiated with, e.g., a third harmonic of a YAG laser with a wavelength of 355 nm. As a result of the laser beam irradiation, the laser beam is absorbed in the region of the semiconductor film adjacent the interface with the substrate and the gallium nitride in contact with the substrate is thermally decomposed by heat resulting from the absorbed laser beam so that a precipitation layer containing metal gallium is formed at the interface between the semiconductor film and the substrate.

Abstract: A light emitting device outputs amplified spontaneous emissions confined to a single spatial mode, where the spectral emission is shaped. In one aspect, an absorption layer is provided having a cutoff wavelength shorter than the quantum wavelength of the light emitting device. In another aspect, an interference filter at the front facet provides spectral shaping.

Abstract: A semiconductor laminating portion including a light emitting layer forming portion having at least an n-type layer and a p-type layer is formed on a semiconductor substrate. A current blocking layer is partially formed on its surface while a current diffusing electrode is formed on the entire surface thereof. A bonding electrode is formed thereon. The semiconductor laminating portion and the current diffusing electrode are separated into a plurality of light emitting unit portions (A), electrode pad portion B, and connecting portions C for connecting between the electrode pad portion B and the light emitting unit portions A or between two of the light emitting unit portions (A), and the semiconductor laminating portion between the respective light emitting unit portions A is removed through etching to make clearances except for the connecting portions C. The bonding electrode is formed on the electrode pad portion (B) which is formed so as to make the light emitting layer forming portion nonluminous.

Abstract: An electrode pad for e Group III nitride compound semiconductor having p-type conduction includes a triple layer structure having first, second, and third metal layers, formed on an electrode layer. A protection film with a window exposing a central portion of the third metal layer is formed by etching on the third metal layer and covers the sides of the first, second, and third metal layers. The second metal layer is made of gold (Au). The first metal layer is made of an element which has ionization potential lower than gold (Au). The third metal is made of an element which has adhesiveness to the protection film stronger than that of gold (Au). Consequently, this structure of the electrode pad improves the adhesive strength between the protection layer and the third meal layer and prevents the etching of the sides of the protection film. Furthermore, the contact resistance between the semiconductor and the electrode pad is lowered and, thus, ohmic characteristic of the electrode pad is improved.

Abstract: The semiconductor light-emitting device of the present invention includes a first semiconductor layer of a first conductivity type formed substantially in a uniform thickness on a substrate and a second semiconductor layer of a second conductivity type formed substantially in a uniform thickness on the first semiconductor layer. The device further includes an active layer, formed substantially in a uniform thickness between the first semiconductor layer and the second semiconductor layer, for generating emission light. The device also comprises a first electrode for supplying a drive current to the first semiconductor layer and a second electrode for supplying a drive current to the second semiconductor layer. The device is adapted that the first or second electrode is a divided electrode comprising a plurality of conductive members spaced apart from each other.

Abstract: A light emitting device that can provide enhanced heat radiation as well as allowing light from a light emitting diode (LED) chip to be efficiently extracted out of the device. This light emitting device includes a metal plate (11) that is made of aluminum. The metal plate (11) has a projection (11a) projecting forward. The projection (11a) has a front side provided with a housing recess (11b). An LED chip (1) is mounted on the bottom of the housing recess (11b) so that it is thermally coupled to the metal plate (11), thus allowing heat to be radiated efficiently. A printed circuit board (12), having a grass epoxy substrate to be joined to the front surface of the metal plate (11), is provided with an insertion hole (13) into which the projection (11a) is inserted. The LED chip (1) and a bonding wire (W) are encapsulated in a transparent resin seal portion (50).

Abstract: The present invention provides a PMSCR (bridging modified lateral modified silicon controlled rectifier having first conductivity type) with a guard ring controlled circuit. The present invention utilizes controlled circuit such as switch to control functionally of guard ring of PMSCR. In normal operation, the switch is of low impedance such that the guard ring is short to anode and collects electrons to enhance the power-zapping immunity. Furthermore, during the ESD (electrostatic discharge) event, the switch is of high impedance such that the guard ring is non-functional. Thus, the PMSCR with guard ring control circuit can enhance both the ESD performance and the power-zapping immunity in the application of the HV (high voltage) pad.

Abstract: A junction field-effect transistor is formed by providing a p-type gate region in a surface of an n-type semiconductor layer and n-type drain and source regions sandwiching the gate region on the surface of the n-type semiconductor layer. A p-type diffusion region is formed at least in the region on the side of the drain close to the gate region on the surface of the n-type semiconductor layer. A drain electrode is formed so that it contacts with the p-type diffusion region. As a result, the junction FET can be reduced in drain-source leak current Idss to a small, stable value. Thus, a high-gain junction field-effect transistor is obtained which has small variation in performance among actual units manufactured.

Abstract: The safe-operating area (SOA) in a heterojunction bipolar transistor (HBT) is improved by providing a collector region in the transistor having a graded (uniformly or stepped) doping between the base region and the underlying subcollector region with the collector doping being lower near the base and higher near the subcollector and with the collector doping being less than the doping of the subcollector. The non-uniformly doped collector reduces Kirk effect induced breakdown when collector current increases.

Abstract: The safe operating area (SOA) in a heterojunction bipolar transistor is improved by inserting a material between the collector and subcollector of the transistor with the insertion layer being a material having a wider energy bandgap than the material of the collector. The insertion layer increases the breakdown field at the collector-subcollector junction and thereby increases the Kirk effect induced breakdown voltage.

Abstract: There is provided a semiconductor device provided with a regulator circuit capable of reducing a layout area thereof and improving a phase margin.

Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.

Abstract: The yield of a semiconductor device is improved which has a large-scale logic circuit or which has both a logic circuit and a memory. A basic circuit block (1) is provided with an input/output circuit (2). A transmission line (3) and a branch line (4) connect the input/output circuits (2) so that information can be exchanged through the input/output circuits (2) between one basic circuit block (1) and another basic circuit block (1). The memory in each basic circuit block (1) or in each input/output circuit (2) can be programmed from the outside to designate the destination of a signal. By thus changing the program in the memory, the transmission destination of a signal can be changed to give various functions efficiently with a limited circuit scale. Moreover, if a basic circuit block fails another basic circuit block substitutes for it to improve the yield drastically.

Abstract: An object of the present invention is to provide an EL display device having a high operation performance and reliability.

Abstract: A method of fabricating integrated circuits includes forming MOSFETs with gate electrodes of a first composition, and sidewall spacers along laterally opposed sides of those gate electrodes, removing the gate electrodes of the first composition, and replacing those gate electrodes with a gate electrode structure having at least two layers of metal. In a further aspect of the present invention, complementary metal oxide semiconductor integrated circuits are fabricated by replacing n-channel transistor gate electrodes with gate electrodes having at least a first metal and a second metal, and further replacing the p-channel transistor gate electrodes with gate electrodes having a third metal and a fourth metal. The first and second metal combination includes, but is not limited to, TiN and Al. The third and fourth metal combination includes, but is not limited to, TaN and Ni; TaN and Pd; and TaN and Pt.

Abstract: A parallel data outputting circuit equipped with a data inversion function, comprises P number of data comparator means, P number of majority decision circuits, P number of inversion flag generating means and P number of data inversion circuits, these being activated in parallel in one cycle. In generating an inversion flag indicating whether or not the parallel data are to be inverted and output in the inverted state, inversion flags are calculated from outputs of the inversion flag generating means and the inversion flag generating means of a cycle directly previous to a current cycle.

Abstract: A semiconductor package comprising a semiconductor die having opposed, generally planar first and second surfaces and a peripheral edge. Formed on the second surface of the semiconductor die in close proximity to the peripheral edge thereof are a plurality of bond pads. The semiconductor package further comprises a plurality of leads which are positioned about the peripheral edge of the semiconductor die in spaced relation to the second surface thereof. Each of the leads includes opposed, generally planar first and second surfaces, and a generally planar third surface which is oriented between the first and second surfaces in opposed relation to a portion of the second surface. In the semiconductor package, a plurality of conductive bumps are used to electrically and mechanically connect the bond pads of the semiconductor die to the third surfaces of respective ones of the leads. An encapsulating portion is applied to and partially encapsulates the leads, the semiconductor die, and the conductive bumps.

Abstract: A semiconductor integrated circuit device comprises a first column gate circuit that electrically connects a first bit line group to a data line group according to a first column selection signal, a second column gate circuit that electrically connects a second bit line group to the data line group according to a second column selection signal, word lines that intersect the bit lines and memory cells that are electrically connected to the bit lines are selected by the word lines and include magneto-resistive elements. The spinning directions of the magneto-resistive elements are perpendicular to the bit lines as seen in a plan view.

Abstract: A semiconductor device has a via-contact, a main wire having an end connected to the via-contact, and an extension extended in line with the main wire from the end of the main wire beyond the via-contact, the width of the extension being equal to or narrower than the width of the main wire. The extension prevents the end of the main wire from being rounded by an optical proximity effect, eliminates a contact defect or an open defect between the via-contact and the end of the main wire, and involves no widening of the main wire around the via-ntact, so that other via-contacts may be arranged in the vicinity of the via-contact in question without violating design rules.

Abstract: An image sensor with improved productivity and sensitivity is provided. The image sensor includes a plurality of unit pixels, and each unit pixel includes: an oxide film formed upon a semiconductor substrate; a gate electrode formed on the oxide film; a photodiode N-type region formed within the semiconductor substrate and having an interface with the oxide film, which is spaced apart from the gate electrode by a predetermined distance and disposed on one side of the gate electrode; and an N+-type region acting as a floating diffusion region, formed within the semiconductor substrate and having an interface with the oxide film, which is spaced apart from the gate electrode by a predetermined distance and is disposed on the other side of the gate electrode.

Abstract: In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer serves as a mask substrate for the subsequent doping of the channel zone. The expedient patterning of the polysilicon layer with holes in a gate region and pillars in a source region enables the channel zone to be doped more lightly. In another embodiment, the novel method is used for a channel width shading of a PMOS transistor cell.

Abstract: Disclosed is an image sensor having a pixel isolation region. The image sensor includes a semiconductor substrate, a plurality of unit pixel regions for light-conversing an incident light upon a surface of the semiconductor substrate, and a pixel isolation region positioned between the adjacent unit pixel regions. The pixel isolation region includes an impurity region formed by implanting an ion into the substrate for shielding a leakage current generated between the adjacent unit pixel regions and a light shielding film formed on a surface of the impurity region for preventing the incident light from diffusing into the adjacent unit pixel region.

Abstract: Pixel image sensors with lateral photodiode elements and vertical overflow drain systems. According to at least one embodiment of the present invention, an image sensor pixel includes a lateral photodiode element and a vertical overflow drain system for draining excessive charges accumulated in the charge collecting region of the lateral photodiode element and for resetting the charge collecting region of the lateral photodiode element.

Abstract: A basic form of a variable capacitive apparatus and its actuating method are disclosed. The apparatus is a simple two-terminal structure and may be set by short duration, low voltage electrical pulses. Materials with perovskite structure or perovskite-related structures, especially colossal magnetoresistive materials, are the active constituents of the apparatus. The apparatus overcomes the shortcomings of its predecessors and offers the advantages of non-volatility, two or multi-level storage, non-destructive reading, free-of-power maintenance and potential high radiation hardness.

Abstract: A memory device includes memory cells each having a capacitor including a lower electrode, a ferroelectric film and an upper electrode which are formed in this order over a substrate made of silicon. The ferroelectric film is selectively grown on the lower electrode. Such selective formation of the ferroelectric film on the lower electrode having a desired shape prevents a damaged portion from occurring in the ferroelectric film, thus making it possible to downsize the memory cells.

Abstract: Since at least a portion of a trench capacitor electrode is formed by a metal, the electrical sheet resistance of the electrode can be lowered, and the signal propagation time prolonged by CR delay can be shortened. This can reduce the read/write time. The formation of a buried gate electrode can realize a reduction of the cell area, which is required in a DRAM- and a DRAM/logic-embedded device. This can increase the gate length and reduce the short channel effect. Since an insulating protective film is deposited on the gate electrode, a bit line contact can be formed in self-alignment.