Patents Issued in August 31, 2004
  • Patent number: 6785106
    Abstract: An integrated circuit device includes an output terminal for connection with a terminal of an external load, and first and second power supply terminals for connection with a terminal of an external power supply. A switching element is connected between the output terminal and the first power supply terminal. The switching element, the external load, and the external power supply form a load current flow path. An impedance circuit is connected between the output terminal and the second power supply terminal. An abnormality detection circuit operates for monitoring a voltage at the output terminal, and detecting an abnormal condition on the basis of the monitored voltage. A drive control circuit operates for driving and controlling the switching element.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: August 31, 2004
    Assignee: Denso Corporation
    Inventor: Junichi Nagata
  • Patent number: 6785107
    Abstract: A method of power sequence protection for a level shifter is disclosed that includes the steps of placing the level shifter in a pre-selected state if an input voltage supply is not powered on when an output voltage supply is powered on and releasing the level shifter from the pre-selected state to follow transitions of an input signal when the input voltage supply is powered on.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: August 31, 2004
    Assignee: LSI Logic Corporation
    Inventor: Jonathan Schmitt
  • Patent number: 6785108
    Abstract: In semiconductor equipment, a switching timing adjuster is provided between insulated gate bipolar transistors and a control signal generator. The switching timing adjuster includes an input decision circuit that decides whether a signal output from the overvoltage protector is a signal that has been output due to a deviation in the switching timing at a turn-off or turn-on time, a signal holding circuit that holds a signal that is output from the input decision circuit, and a pulse formation circuit that forms a corrected switching control signal based on a signal held in the signal holding circuit and a switching control signal from the control signal generator.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: August 31, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroshi Nakatake, Akihiko Iwata, Toshiyuki Kikunaga
  • Patent number: 6785109
    Abstract: A technique for providing ESD protection for integrated circuit devices with multiple power and/or ground buses is provided. The technique involves using a clamping device that is capable of handling both positive and negative ESD pulses to clamp each power bus, ground bus, and I/O pad within a device to a respective one of the ground buses. Without resorting to exhaustive cross-clamping, this arrangement provides a discharge path for an ESD pulse applied across any combination of power buses, ground buses, and I/O pads during an ESD event.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: August 31, 2004
    Assignee: Altera Corporation
    Inventors: Cheng H. Huang, Chiakang Sung, John Costello
  • Patent number: 6785110
    Abstract: A surge protection device is disclosed that includes an input path for receiving an rf signal, dc power, and a surge, an output path for propagating the rf signal, and a dc blocking device coupled in series between the input path and the output path. The surge protection device also includes a first inductor coupled to the input path for isolating the rf signal and providing a path for the dc power, a gas tube coupled to the first inductor for routing a portion of the surge to a ground plane, a second inductor coupled to the first inductor for providing a path for the dc power, and a metal oxide varistor coupled to the second inductor for routing a portion of the surge to the ground plane.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: August 31, 2004
    Assignee: PolyPhaser Corporation
    Inventors: Karl C. Bartel, Arthur Peltier
  • Patent number: 6785111
    Abstract: Electrostatic discharge can damage electronic equipment. It has been known to start a fire when it occurs when a motor vehicle's gasoline tank is being filled. A device for detecting, alarming, and/or neutralizing an electrostatic charge can help avoid these problems. A variable capacitor, the capacitance of which is made to vary periodically, is used to detect electrostatic charge. A first electrode of the capacitor is the object for which electrostatic charge is important. The capacitor's electrode is one by which the capacitance is varied. An amplitude of a signal from the electrode can be shown to be proportional to the electrostatic charge on the object.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: August 31, 2004
    Inventor: Edward G. Osborne
  • Patent number: 6785112
    Abstract: A method and device for triggering a solenoid valve for injecting fuel into an internal combustion engine is described. The triggering phase of the solenoid valve is subdivided into a pull-up phase and a holding phase. During the pull-up phase, a valve needle of the solenoid valve is caused to open by a first current intensity flowing through a magnetic coil of the solenoid valve. During the holding phase, the valve needle is held in the open state by a second, lower current intensity flowing through the magnetic coil. At least once at the beginning of the pull-up phase, a booster phase is activated during which a pulse-shaped booster current from a booster capacitor charged to a high voltage flows through the magnetic coil. During the triggering phase of the solenoid valve, a plurality of booster pulses are activated in succession, whose time position within the triggering phase is freely selectable.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: August 31, 2004
    Assignee: Robert Bosch GmbH
    Inventors: Rolf Reischl, Andreas Eichendorf, Ulf Pischke, Juergen Eckhardt, Klaus Mueller
  • Patent number: 6785113
    Abstract: A manually switchable corona electrode array and method of operation for use in a corona treater station. The preferred embodiment of the present invention contemplates an electrode array which incorporates in its structure a low pressure conduit system for providing a low pressure field in the vicinity of the corona field, in order to remove ozone and other contaminants generated by the corona field. The electrode array further includes means to quickly and easily urge the array from a first position, wherein the array is situated adjacent to the treatment area, to a second position, removed from the treatment area, so as to facilitate maintenance and spooling of the material to the treated therethrough. The present invention provides a more compact footprint than traditional systems, as well as providing an ozone removal system requiring a cheaper, less powerful exhaust blower for providing the low pressure differential to remove the pollutants, including ozone, from the treatment area.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: August 31, 2004
    Inventor: Robert Truong Pham
  • Patent number: 6785114
    Abstract: An improved air ionizer apparatus includes an air inlet, a high voltage source, an electrode electrically connected to the high voltage source for generating ions and an air outlet. An air mover is provided for causing air to flow into the air ionizer through the air inlet and out of the air ionizer through the air outlet. A foraminous filter comprising an electrically conductive material is electrically coupled to at least one of a voltage source and ground. The filter is positioned over at least one of the air inlet, the air outlet and the electrode, such that air flowing into the air inlet, air flowing out of the air outlet or air flowing past the electrode flows through the filter. In a preferred embodiment, the filter comprises a metal grid or screen.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: August 31, 2004
    Assignee: Illinois Tool Works Inc.
    Inventors: John Gorczyca, Michael Jacobs, Nicholas Kowalski, Richard D. Rodrigo
  • Patent number: 6785115
    Abstract: An electrostatic chuck is provided, having an insulation layer including a mount plane on which a wafer is mounted, an inner electrode provided in the insulation layer, and projecting portions protruding from the mount plane which include contact planes that contact the wafer. A backside gas flows into a space defined by the mount plane, the projecting portions, and the wafer under such a condition that the wafer is attracted to the mount plane so as to maintain the temperature uniformity of the wafer. The total areas of the contact planes of the projecting portions is not less than 5% and not more than 10% with respect to the area of the inner electrode, and the heights of the projecting portions are not less than 5 &mgr;m and not more than 10 &mgr;m.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: August 31, 2004
    Assignees: NGK Insulators, Ltd., Anelva Corporation
    Inventors: Hideyoshi Tsuruta, Satoru Yamada, Kiyoshi Nashimoto, Naoki Miyazaki
  • Patent number: 6785116
    Abstract: A triggering unit for initiating pyrotechnical elements includes a control component, a rectifier (12), an energy store (15), a voltage regulator (13), a data coupling device (11), a current limiter and a suppressor circuit (10). To enable an up to now unknown variety of variants pertaining to characteristics and functionality without having to change the hard ware or the design of the chip, the control component is a programmable microprocessor (10) with an integrated program memory.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: August 31, 2004
    Assignee: Orica Explosives Technology PTY Limited
    Inventors: Dirk Hummel, Jan Petzold, Heinz Schäfer, Ulrich Steiner, Andreas Zemla
  • Patent number: 6785117
    Abstract: A capacitive device includes a substrate, a movable electrode, and a fixed electrode. The movable electrode is located above a surface of the substrate and is movable with respect to the substrate along directions that are substantially orthogonal to the surface. The fixed electrode is stationary with respect to the substrate. When the movable electrode is displaced in a first direction that is substantially orthogonal to the surface, the total sum of area-distance quotients in the overlap between the electrodes remains substantially unchanged or decreases to provide a first reduction rate that is substantially zero or more. On the other hand, when the movable electrode is displaced in a second direction that is substantially opposite to the first direction, the total sum of area-distance quotients remains substantially unchanged or decreases to provide a second reduction rate that is substantially zero or more. The reduction rates are different from each other.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: August 31, 2004
    Assignee: Denso Corporation
    Inventors: Minekazu Sakai, Toshiyuki Tsuchiya, Hirofumi Funabashi, Norio Fujitsuka, Yasuichi Mitsushima
  • Patent number: 6785118
    Abstract: A capacitor having a plurality of layers with at least one layer including a plurality of electrodes is described. In an embodiment, the electrodes are elongate. The plurality of electrodes includes a plurality of first polarity electrodes and a plurality of second polarity electrodes. In an embodiment, pairs of electrodes are formed by twisting one first polarity electrode and one second polarity electrode together. In an embodiment, first polarity electrodes and second polarity electrodes are woven together in each layer.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron J. Steyskal
  • Patent number: 6785119
    Abstract: Forming a capacitor, by (a) forming a matrix of ferroelectric capacitor elements on a substrate, (b) forming a CAP layer over the ferroelectric capacitor elements, and (c) etching the CAP layer to a more uniform thickness. A capacitor that has a substrate layer, a matrix of ferroelectric capacitor elements including a first electrode layer substantially fixed relative to the substrate, a second electrode layer, and a ferroelectric layer sandwiched between the first and second electrode layers is disclosed. The capacitor has a shoulder layer extending from the substrate to the matrix, and a CAP layer etched to have substantially constant thickness covering sides of the matrix extending beyond the substrate.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: August 31, 2004
    Assignee: Infineon Technologies AG
    Inventors: Ulrich Egger, Haoren Zhuang, Karl Hornik
  • Patent number: 6785120
    Abstract: The invention includes methods of forming hafnium-containing materials, such as, for example, hafnium oxide. In one aspect, a semiconductor substrate is provided, and first reaction conditions are utilized to form hafnium-containing seed material in a desired crystalline phase and orientation over the substrate. Subsequently, second reaction conditions are utilized to grow second hafnium-containing material over the seed material. The second hafnium-containing material is in a crystalline phase and/or orientation different from the crystalline phase and orientation of the hafnium-containing seed material. The second hafnium-containing material can be, for example, in an amorphous phase. The seed material is then utilized to induce a desired crystalline phase and orientation in the second hafnium-containing material. The invention also includes capacitor constructions utilizing hafnium-containing materials, and circuit assemblies comprising the capacitor constructions.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: August 31, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, F. Daniel Gealy, Gurtej S. Sandhu
  • Patent number: 6785121
    Abstract: A multilayer ceramic capacitor having internal electrode layers and dielectric layers with dielectric particles is disclosed. An average particle diameter of the dielectric particles, when measured parallel with the direction of the internal electrode layers, is larger than a thickness of the dielectric layer. A ratio (R/d) between the average particle diameter (R) and the thickness (d) of the dielectric layer is 1<R/d<3.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: August 31, 2004
    Assignee: TDK Corporation
    Inventors: Yukie Nakano, Shunichi Yuri, Mari Miyauchi, Daisuke Iwanaga
  • Patent number: 6785122
    Abstract: A method for preparing the electrolytic solution of an electric double-layer capacitor is provided, which undergoes cyclical charging and discharging within a predetermined operating range of voltage. The capacitor includes the electrolytic solution, electrodes and a casing for housing the electrolytic solution and electrodes. The method includes the step of preparing an ion concentration of the electrolytic solution so that the electrolytic solution turns to a nonconductor at a first predetermined voltage, which is so set as to be equal to or greater than the upper limit of the predetermined operating range of voltage and less than or equal to the maximum allowable voltage of the capacitor.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: August 31, 2004
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Minoru Noguchi, Shigeki Oyama, Takeshi Fujino
  • Patent number: 6785123
    Abstract: A porous aluminum anode is used in a capacitor. The porous anode is constructed by a solid freeform fabrication (SFF) process and has a plurality of pores. Each of the plurality of pores has a pore size. An electrolyte is infiltrated in the plurality of pores. An oxide layer is formed on the aluminum surface to provide a dielectric for the capacitor.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventor: Milan Keser
  • Patent number: 6785124
    Abstract: A capacitor element includes an anode chip body formed by sintering valve metal powder, an anode wire projecting from an end surface of the anode chip body, and a ring member made of a water-repellent thermoplastic synthetic resin and fitted around a root portion of the anode wire connected to the anode chip body. The ring member is fitted and attached to the anode wire. The ring member adheres closely to both of the anode chip body and the anode wire without a gap by thermally melting the ring member in its fitted state around the anode wire.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: August 31, 2004
    Assignee: Rohm Co., Ltd.
    Inventors: Shinji Nakamura, Takeshi Miura, Hideki Ando
  • Patent number: 6785125
    Abstract: An apparatus and method for a switch that is activated by a predetermined mechanical load includes a first layer of plastic material, a second layer of plastic material, a layer of elastomeric material having first and second surfaces, the first surface bonded to the first layer of plastic material by a layer of adhesive material and the second surface of the elastomeric material bonded to the second layer of plastic material by a layer of adhesive; and a conductor disposed in contact with one or more of the layers of material wherein a conductive path of the conductor is broken when at least one of the adhesive bonds is displaced by the predetermined mechanical load.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: August 31, 2004
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Gerald P. Young
  • Patent number: 6785126
    Abstract: A case for a PDA includes a keyboard, and a pass-through I/O port so that the PDA does not have to be removed from the case for docking. The case includes front and rear panels hinged in a clamshell configuration. The rear panel includes a docking port configured to mate with the PDA. The docking port includes an inner electrical connector configured to mate with an I/O connector on the PDA. The docking port further includes an outer electrical connector configured to mate with a docking connector on a docking cradle. The front panel includes a keyboard assembly and is movable between a closed position wherein the keyboard assembly overlies the PDA display screen and an open position wherein the keyboard is oriented for data entry and the rear panel is oriented at a viewing angle. The keyboard is segmented into a main section and first and second folding sections pivotally coupled to the main section.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: August 31, 2004
    Assignee: ttools, LLC
    Inventors: Thomas B. Hazzard, Tracy Leigh Hazzard, Joey Gyomay Nakayama
  • Patent number: 6785127
    Abstract: Embodiments of the present invention are directed to an attachment apparatus for conveniently, securely, and releasably attaching a handheld device such as a handheld computer to a keyboard or other accessories. In some embodiments, the attachment apparatus is configured to be flexible or adjustable to accommodate differently sized handheld devices. In addition, an automatic switch on feature is implemented in some embodiments which allows the handheld device to be automatically switched on or off by manipulating the position of the attachment apparatus. In accordance with an aspect of the present invention, an apparatus for attaching a handheld device to a second device comprises an attachment device having a connector configured to be electrically connected to the handheld device. An adjustable mechanism is configured to adjustably connect the handheld device to the second device to move the handheld device relative to the second device between a first position and a second position.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: August 31, 2004
    Assignee: Logitech Europe S.A.
    Inventors: Patrick Monney, Denis Pavillard, Jean-Marc Flueckiger, Samer Abdo, Andrew Switky, James Yurchenco, Kristine Rene Chan-Lizardo, Joe Watson, Chase Thompson, Anthony Peter Patron, Joseph W. Yang
  • Patent number: 6785128
    Abstract: A portable computer having cover support means is disclosed. The portable computer comprises a main body, a cover, a hinge mechanism, and cover support means. The cover has a display screen on its inside surface. The hinge mechanism connects the cover to the main body so as to allow the cover to be tilted relative to the main body around a horizontal tilting axis and to be swiveled around a vertical swiveling axis, the horizontal tilting axis being free from intersecting the horizontal swiveling axis. The cover support means supports the outside surface of the cover free from the display screen and prevents vibration of the cover, when the cover is swiveled at an angle of 180 degrees and tilted completely toward the main body so that the display screen faces upward.
    Type: Grant
    Filed: June 12, 2000
    Date of Patent: August 31, 2004
    Assignee: Samsung Electronics Co., LTD
    Inventor: Jae-Sam Yun
  • Patent number: 6785130
    Abstract: A computing device is described. The computing device can include a base portion and a lid portion connected to the base portion. The lid portion is configured to be deployed from a closed position to an open position. The computing device can also include a locking mechanism for locking the lid portion in the closed position. The computing device can further include multiple user-engagable input mechanisms, at least some of the multiple input mechanisms being accessible when the lid portion is in the closed position and which can be manipulated by a user to unlock the locking mechanism.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: August 31, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Hyrum M Anderson, Ken Takemoto
  • Patent number: 6785131
    Abstract: A computer system includes a plurality of installation code elements (40, 41, 42, 43, 44, 45, 46, 47). Each installation code element is associated with a particular system connector (11, 12, 13, 14, 19, 24, 25a, 25b) and the respective external connector (31, 32, 33, 34, 35, 36a, 36b, 37) which connects with the particular system connector. The installation code element marks both the respective system connector and associated external connector, and also marks the installation documentation (51) included with the system. This installation documentation contains a plurality of information sections (52, 53, 54, 55, 56, 57, 58, 59), with each information section providing information relating to making the connection between a particular system connector and its corresponding external connector. Each information section is marked with the same installation code element which also marks the system connector and external connector to which the information section pertains.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: August 31, 2004
    Assignee: Dell Products, L.P.
    Inventors: Michelle Ewell, Beryl Hamilton Horton
  • Patent number: 6785132
    Abstract: A system and method for providing non-volatile memory to a PC which includes a compact flash expansion slot coupled to a horizontal backplane in an industrial PC and in the alternative, having an externally accessible slot for receiving a compact flash expansion card therein.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: August 31, 2004
    Assignee: Crystal Group Inc.
    Inventors: David T. Medin, Todd A. Hermanson, Scott L. Kayser
  • Patent number: 6785133
    Abstract: An I/O subsystem for providing a high density modular input/output package in a data processing system. The I/O subsystem includes an enclosure having a midplane assembly in the center portion. The enclosure includes electrical components including redundant power supplies, air moving units and DASD carriers having DASD drives assemblies therein in the front portion of the enclosure, and planar boards having PCI card assemblies slidably mounted thereon in the rear portion of the enclosure. The mid plane includes multiconductor power buses for distribution of power from the power supplies to the electrical components of the I/O subsystem.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: August 31, 2004
    Assignee: International Business Machines Corporation
    Inventors: Dennis R. Barringer, Philip M. Corcoran, William P. Kostenko, Edward J. Seminaro
  • Patent number: 6785134
    Abstract: Apparatus and methods in accordance with the present invention provide self-contained, closed-loop microchannel/electrokinetic pump cooling systems that can be integrated into the microelectronic die and the integrated heat sink to provide microelectronic die cooling. Microchannel/electrokinetic pump cooling systems utilize active cooling technology to reduce thermal gradients and operating temperature of a microelectronic die. This system disclosed here will enhance heat dissipation and provide immediate cooling of localized hot spots within the microelectronic die. This will have the effect of reducing the microelectronic die temperature or spreading the heat internally within the microelectronic die depending on the layout of the microchannels.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: James G. Maveety, Gregory M. Chrysler, Michael C. Garner
  • Patent number: 6785135
    Abstract: A cooling device includes a flow-path substrate, an intermediate substrate, and a lid-substrate each made of a polyimide resin, and a condenser substrate incorporated into holes of the intermediate substrate and an evaporator substrate which are made of a metal having a high thermal conductivity, whereby heat from a heat source can be enclosed into the evaporator substrate and the condenser substrate, so that the quantity of the latent heat can be substantially increased.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: August 31, 2004
    Assignee: Sony Corporation
    Inventors: Motosuke Ohmi, Eisaku Kato, Minehiro Tonosaki
  • Patent number: 6785136
    Abstract: A coupling mechanism for radiator aims to fasten a radiator to a heat generating element of a socket on a main board for absorbing the thermal energy generated by the heat generating element. The coupling mechanism includes a first anchor dock, a second anchor dock and a latch element. The first anchor dock and the second anchor dock are located on two opposite ends of the socket. The latch element passes through the gap of the radiation fins of the radiator and straddles the radiator. It has one end pivotally engaging with the first anchor dock and another end selectively engaging with the second anchor dock. The latch element further has an elastic section formed in the middle portion to put the radiator in close contact with the heat generating element. The coupling mechanism thus constructed can increase the surface area of the radiation fins of the radiator to achieve the maximum radiation effect.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: August 31, 2004
    Assignee: Inventec Corporation
    Inventors: Lin Wei Chang, Yi Ju Su
  • Patent number: 6785137
    Abstract: A method for removing heat from an active area of an integrated circuit device is provided. The method includes applying a separator to the active area of the integrated circuit device. A thermally conductive element is coupled to the active area of the integrated circuit device outwardly of the separator.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: August 31, 2004
    Assignee: STMicroelectronics, Inc.
    Inventor: Harry Michael Siegel
  • Patent number: 6785138
    Abstract: A repeater case for high density subscriber lines includes a repeater base and a repeater housing forming a sealed enclosure and having interior walls. A plurality of module slots receive HDSL-4 circuit board modules. A heat conductive material in the housing contacts HDSL-4 modules in the slots and the housing to form a heat escape path to ambient. The HDSL-4 modules are cooled through thermal conductivity with thermally conductive contact with the interior wall of the repeater housing. The heat conductive material is not required for structural support of the modules or their electrical functioning.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: August 31, 2004
    Assignee: Added Communications of Georgia, Inc.
    Inventor: Kenneth T. Rapey
  • Patent number: 6785139
    Abstract: In an electric connection box containing a bus bar board in a case, heat radiation member-side bus bars are connected to a heat radiation member, and switching devices, such as FETs, are mounted on the bus bars. The heat radiation member-side bus bars may project beyond an end surface of the heat radiation member, and form heat radiation member-side electrical component connection terminals. Electrical component connection bus bars project from a bus bar board to form bus bar board-side electrical component connection terminals. Electrical components are bridged between the heat radiation member-side electrical component connection terminals and the bus bar board-side electrical component connector terminals.
    Type: Grant
    Filed: January 23, 2003
    Date of Patent: August 31, 2004
    Assignees: Sumitomo Wiring Systems, Ltd., Autonetworks Technologies, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Takahiro Onizuka, Yukinori Kita
  • Patent number: 6785140
    Abstract: A chassis includes a heat generating component. A base is mounted on the heat generating component. A plurality of heat pipes each have a first portion mounted in the base and a second portion extending from the base. A plurality of fins are mounted on the second portion of the heat pipes. The heat pipes are L-shaped and the first portion of each heat pipe is seated in a respective groove provided in the base.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: August 31, 2004
    Assignee: Dell Products L.P.
    Inventors: Paul T. Artman, Eric Tunks
  • Patent number: 6785141
    Abstract: A locking and ejecting device for removable module in a portable computer, wherein the removable module is insertable into and removable from an internal bay of the portable computer. The locking and ejecting device includes a latch mechanism, a hot-plug controller, and a remove mechanism. The latch mechanism coupled to the internal bay is for locking the removable module in an assembled position. The hot-plug controller formed on the latch mechanism is for switching off a power unit before removing the removable module. The remove mechanism coupled to the internal bay is for removing the removable module from the assembled position to a disassembled position after the latch mechanism unlocks the removable module.
    Type: Grant
    Filed: October 3, 2002
    Date of Patent: August 31, 2004
    Assignee: Quanta Computer, Inc.
    Inventor: Ming-Hsiung Fang
  • Patent number: 6785142
    Abstract: A system and method for detecting blank modules includes an information handling system including at least one computing component, a modular chassis, a management module, and one or more sensors. The modular chassis includes one or more slots where each slot is operable to receive either the computing module or a blank module. The computing module interfaces with the management module whereby the management module is operable to detect the presence of one or more of the computing modules in one or more of the slots. The sensors are associated with each of the slots and detect if one or more of the blank modules are installed in one or more of the slots. In addition, the sensors provide an indication to a user when one or more of the slots are empty and do contain neither a computing module or a blank module.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: August 31, 2004
    Assignee: Dell Products L.P.
    Inventors: Laurent A. Regimbal, Jinsaku Masuyama
  • Patent number: 6785143
    Abstract: A bare chip includes a first semiconductor storage part and a second semiconductor storage part, formed in the stage of a wafer serving as a semiconductor material, capable of storing data independently of each other, and an electric wire serving as a semiconductor storage part employment/nonemployment selection circuit setting each of the first semiconductor storage part and the second semiconductor storage part in either a mode capable of inputting/outputting data or a mode incapable of inputting/outputting the data. Thus obtained is a semiconductor memory module formed by a plurality of bare chips integrally coated with molding resin, having a function of replacing a bare chip detected as defective with a spare chip.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: August 31, 2004
    Assignee: Renesas Technology Corp.
    Inventor: Yoshito Nakaoka
  • Patent number: 6785144
    Abstract: A flexible carrier substrate assembly or module that facilitates stacking of multiple carrier substrates bearing semiconductor dice for high density electronic systems. After the dice are placed on the flexible substrate, a flexible support frame may be applied to the flexible substrate. The support frame includes conductive paths therethrough to connect to circuit traces running from the dice on the substrate to the substrate perimeter to interconnect superimposed carrier substrates. The flexible carrier substrates may be bent to a radius of any given curvature to conform to various non-planar regular and irregular surfaces. Furthermore, since the frame as well as the substrate may be flexible, multiple, flexible substrate assemblies may be stacked one on top of another wherein an upper assembly has a different radius than a lower module and any intermediate assemblies have progressively differing radii from bottom to top position.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: August 31, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Salman Akram
  • Patent number: 6785145
    Abstract: A duct, for channeling air from outside of a personal computer (PC) to cool a processor (CPU) of the PC, has a hollow body. This body comprises spaced apart sidewalls connected by an inner wall and an outer wall. In a lower section of the outer wall is an intake opening prepared to align with vent openings in an enclosure of the PC. As the walls of the body lower section extend upward, the side walls pinch inward to form a narrow top end. This narrow top end then connects with a narrow bottom end of an upper section of the body. The inner wall of the upper section arches inward while the outer wall flares upward. Inner end edges of the upper section walls define an outlet opening prepared to fit next to the processor. During operation, an intake fan of the CPU draws air through the duct that then discharges directly on the processor. This air flow may be enchanced by another fan unit carried in the duct upper section.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: August 31, 2004
    Inventor: Sidney S. Wong
  • Patent number: 6785146
    Abstract: A fastening member for an electronic circuit board having an elastically deformable leg formed in a case for housing the electronic circuit board and a projection formed continuous with the leg to be engaged with the electronic circuit board so as to fasten the electronic circuit board on a prescribed mounting surface in the case. In the member, the projection is engaged with the electronic circuit board such that a prescribed angle is formed between a surface of the projection contacting the electronic circuit board, when the electronic circuit board is fastened on the mounting surface in the case. With this, since the tangent between the board contact surface and the electronic circuit board is variable within the range of the board contact surface, molding error can be tolerated (absorbed) and volumetric variation produced by temperature change can be readily coped with.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: August 31, 2004
    Assignee: Keihin Corporation
    Inventors: Tatsuo Koike, Mitsuhiro Ito
  • Patent number: 6785147
    Abstract: The present invention aims to provide a circuit module that includes a sheet-like solid electrolytic capacitor and reduces an area and volume required for mounting electronic components. In the sheet-like solid electrolytic capacitor, valve metal sheet 11 has dielectric layer 13 and current collector layer 12 formed on the surface thereof, and is packaged by insulators 14 and 15. The circuit module is structured to embed the sheet-like solid electrolytic capacitor in a circuit board.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: August 31, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Katsumasa Miki, Yuji Mido, Tetsuhiro Korechika, Suzushi Kimura
  • Patent number: 6785148
    Abstract: A socket for mounting a processor and/or a board has a substrate with a built in socket. The socket has conductive, elastically deformable terminals. The socket may be mounted to a processor and a board without using conventional surface mount technology, instead providing a mechanical contact mechanism between the socket and the board or processor. An adhesive layer may also be used to connect the socket to a processor and/or a board.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Kenzo Ishida, Shuji Inoue, Kinya Ichikawa, Kenji Takahashi
  • Patent number: 6785149
    Abstract: An electronic module having a chassis and a single backplane disposed within the chassis. A plurality of bridge circuit cards is disposed within the chassis and is electrically connected to the single backplane. Each of the plurality of bridge circuit cards is for converting between a local area network protocol and a wide area network protocol. A hub circuit card is disposed within the chassis and is electrically connected to the single backplane so that the hub circuit card is electrically connected to each of the plurality of bridge circuit cards. The single backplane is connectable to each of a plurality of remote units for respectively electrically connecting each of the plurality of remote units to each of the plurality of bridge circuit cards. The single backplane is connectable to a data network for electrically connecting the data network to the hub circuit card.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: August 31, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventors: Douglas G. Gilliland, Donald J. Glaser, Dennis Patrick Miller
  • Patent number: 6785150
    Abstract: A method and apparatus are provided for preventing warpage of printed circuit boards (PCBs) for the purpose of maintaining proper shape and alignment. A PCB is placed on a base of matching shape and slightly larger size. The PCB is secured to the base by a single fastener, preferably through approximately its center. Inwardly curving brackets are mounted along the outer edges of the base in such a way that their central portions rest on top of the PCB. The brackets are constructed of a solid yet flexible non-conducive material and are fastened to the base and, optionally, to each other. The PCB placed in between the base and the brackets is able to expand without warping significantly. This method is especially effective when used to maintain the shape and alignment of the PCB for an antenna.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: August 31, 2004
    Assignee: Arcwave, Inc.
    Inventors: Tomany Szilagi, Douglas P. Gibbs
  • Patent number: 6785151
    Abstract: A circuit and method provides a regulated dc—dc power conversion. Active switches, saturable core inductors, and a diode are used in a quasi-synchronous circuit. During a part of the cycle (the “blocking interval”) free-wheeling current is routed through free-wheeling diode while a saturable core inductor is in a high-impedance, blocking state. During other parts of the cycle an ac inverter voltage is rectified by active switching devices, preferably field effect transistors (FETs). The circuit provides regulated, low voltage outputs with low conversion losses.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: August 31, 2004
    Assignee: Condor D.C. Power Supplies, Inc.
    Inventors: Thomas M. Ingman, Charles E. Mullett
  • Patent number: 6785152
    Abstract: A CAM may include a plurality of CAM cells. Each CAM cell is configured to generate an output indicating if a corresponding input bit and the bit stored in that CAM cell match. A circuit is configured to logically AND the outputs to generate a hit output. A first compare line generator circuit is configured to generate a first pulse responsive to a clock signal and a data signal and a second compare line generator circuit is configured to generate a second pulse responsive to the clock signal and the complement of the data signal. A CAM may include a circuit configured to generate a pulse indicating a hit in an entry of the CAM and a latch circuit configured to capture the pulse responsive to the first clock signal and configured to clear responsive to the second clock signal. A first CAM may store a value in each entry and may further store a compare result.
    Type: Grant
    Filed: August 14, 2003
    Date of Patent: August 31, 2004
    Assignee: Broadcom Corporation
    Inventors: George Kong Yiu, Mark H. Pearce
  • Patent number: 6785153
    Abstract: A tertiary CAM cell with three bits of storage, the three bits of storage are arranged to support three stable states which can be read from the CAM cell without requiring a charge restoration operation. The three stables states are those states where one of the three bits is at a first logical state while the remaining two bits are at a second logical state. The three stables states may be used to encode the three logical states used in a ternary CAM.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: August 31, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Zvi Regev, Alon Regev
  • Patent number: 6785154
    Abstract: A magnetic random access memory (MRAM) circuit block and access method thereof are disclosed herein which includes a circuit for sensing a data write current passing through a bitline 32 and, for generating a stop signal for stopping a data write current supply to the bitline 32 and a write wordline 30 after data is written in an magnetic tunnel junction (MTJ) element 44. Further, when data to be written to the storage element is the same as the data already stored therein, no write current is supplied to the write wordline 30, thereby saving power.
    Type: Grant
    Filed: April 26, 2002
    Date of Patent: August 31, 2004
    Assignee: International Business Machines Corporation
    Inventors: Toshio Sunaga, Hisatada Miyatake, Koji Kitamura, Hideo Asano, Kohki Noda, Hiroshi Umezaki
  • Patent number: 6785155
    Abstract: A ferroelectric memory capable of avoiding disturbance in non-selected cells is obtained. This ferroelectric memory comprises pulse application means for applying pulses having a prescribed pulse width causing sufficient polarization inversion when applying a high voltage to the ferroelectric capacitors while hardly causing polarization inversion when applying a low voltage to the ferroelectric capacitors to the memory cells. The ferroelectric memory applies a pulse of a high voltage having the aforementioned prescribed pulse width to a selected memory cell while applying a pulse of a low voltage having the aforementioned prescribed pulse width to non-selected memory cells in at least either data writing or data reading. Thus, writing or reading is performed on the selected memory cell, while polarization inversion is hardly caused in the non-selected memory cells. Consequently, disturbance can be avoided in the non-selected memory cells.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: August 31, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shigeharu Matsushita
  • Patent number: 6785156
    Abstract: A method for sensing the resistance value of a resistor-based memory cell. A current is driven through all unused row lines of a memory array while grounding the row line associated with the selected cell, thereby forcing the current through a comparatively low equivalent resistance formed by the parallel coupling of all unselected memory cells and also through a comparatively high resistance of the selected memory cell. The voltage on a column line corresponding to the selected memory cell is then measured to ground. The voltage level corresponds to either one of two resistance values (i.e., signifying either a logic “HIGH” or a logic “LOW”).
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: August 31, 2004
    Assignee: Micron Technology, Inc.
    Inventor: R. Jacob Baker