Patents Issued in September 14, 2004
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Patent number: 6792580Abstract: The first model described in a software description language is converted into the second model described in a hardware description language without considering whether a plurality of parallel procedures for writing with respect to the same shared variable are contained in the first model. It is detected whether a plurality of parallel processes corresponding to the plurality of parallel procedures for writing with respect to the same shared variable exist in the second model obtained in this manner. A value solving process is generated, in which a pair of a data signal and an assignment timing signal are input from each process of all or some of the detected parallel processes, and a signal of the data signals which corresponds to a process in which the assignment timing signal has changed is output to a signal holding the value of the shared variable.Type: GrantFiled: January 31, 2002Date of Patent: September 14, 2004Assignee: Kabushiki Kaisha ToshibaInventor: Noritaka Kawakatsu
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Patent number: 6792581Abstract: An approach for cut-point frontier selection and/or counter-example generation. Both a lazy and an eager cut-point frontier are identified. A reconvergence (or non-reconvergence) ratio is then computed for each of the frontiers and the one with the smaller (larger) reconvergence (non-reconvergence) ratio is selected as the next cut-point frontier. For another aspect, to generate a counter-example, in response to identifying a difference in output signals for a given cut-point frontier, values of eigenvariables and reconverging primary inputs are used to compute the corresponding values of the non-reconverging primary inputs. These corresponding values are then computed to be compatible with the internal signal values implied by the cut-point frontier selections that were made to expose the difference in the outputs.Type: GrantFiled: November 7, 2002Date of Patent: September 14, 2004Assignee: Intel CorporationInventors: John Moondanos, Zurab Khasidashvili, Ziyad E. Hanna
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Patent number: 6792582Abstract: Both logical and physical construction of voltage islands is disclosed. A semiconductor chip design is partitioned into “bins”, which are areas of the design. In this way, a semiconductor chip design may be “sliced” into various areas and the areas may then be assigned to various voltage levels. Each bin may be thought of as a voltage island. Circuits in the design can be added to or removed from the various bins, thereby increasing or decreasing the speed and power of the circuits: the speed and power increase if a circuit is placed into a bin assigned a higher voltage, and the speed and power decrease if a circuit is placed into a bin having a lower voltage. The size and location of the bins may also be changed. By iterating these steps, the optimum power consumption may be met while still meeting speed constraints and other criteria.Type: GrantFiled: November 15, 2000Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: John M Cohn, Alvar A. Dean, David J. Hathaway, David E. Lackey, Thomas M. Lepsic, Susan K. Lichtensteiger, Scott A. Tetreault, Sebastian T. Ventrone
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Patent number: 6792583Abstract: In an information processing apparatus, a user having no knowledge of a designer of an LSI modifies a floorplan of the LSI without deteriorating the performance of the LSI. The designer who designs the LSI uses a circuit designing apparatus to store circuit information including a functions of each of blocks constituting the LSI, a floorplan regarding allocation of the blocks, and evaluation indices which are the know-how of the designer, with being associated with each other. The user uses a floorplan modifying apparatus to modify the floorplan and to evaluate the modified floorplan according to the evaluation indices.Type: GrantFiled: February 11, 2000Date of Patent: September 14, 2004Assignee: Renesas Technology CorpInventors: Yoshitaka Takahashi, Kotaro Shimamura, Takashi Hotta, Teppei Hirotsu, Katsuichi Tomobe
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Patent number: 6792584Abstract: The present invention provides a comprehensive design environment defining a system architecture and methodology that may integrate interconnects, cores, ePLC, re-configurable processors and software into a manageable and predictable system designs that achieve on-time system IC design results meeting desired specifications and budgets. For example, an interscalable interconnect maybe provided that is scalable and isochronous capable. Additionally, an abstract language may be provided to be able to describe interconnecting core functions. Further, a self-programmable chip may be provided that, upon receiving a construct, it could program itself to achieve the desired functionality, such as through the use of on-chip knowledge and the like.Type: GrantFiled: October 30, 2001Date of Patent: September 14, 2004Assignee: LSI Logic CorporationInventors: Michael Eneboe, Christopher L. Hamlin
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Patent number: 6792585Abstract: The invention discloses a relative structure placement of datapath of cell instances in a column structure, a row structure, or an array structure. To encourage placement of a desirable structure, pseudo cells, pseudo pins, and pseudo nets are selected to be placed at certain locations with respect to real cell instances. The end result produces a cluster of real cell instances that form a desirable structure while minimizing the length of nets. The invention further discloses a non-uniform partitioning of a density map for calculating a force update vector. The partitioning is taken over a region A to compute Riemann sum approximations of a function F over the region A. A force update vector is calculated for a given cell instance within the region A where neighboring cell instances have an exponentially larger grid size as cell instances extend further away from the given cell instance.Type: GrantFiled: January 26, 2000Date of Patent: September 14, 2004Assignee: Arcadia Design Systems, Inc.Inventors: Tsu-Wei Ku, Scot A. Woodward, Yung-Hung Wang, Duan-Ping Chen, Wei-Kong Chia
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Patent number: 6792586Abstract: Automated techniques to correct certain rule violations with respect to non-design geometries are used, simplifying and automating the design layout of an electronic circuit, whether embodied as a design encoding or as a fabricated electronic circuit. Correcting minimum spacing rule violations between wide class objects of non-design geometries is accomplished by deducting an enlarged wide class object of a first non-design geometry from a second non-design geometry; wherein the enlarged wide class object of the first non-design geometry is formed by enlarging a wide class object of the first non-design geometry at one or more non-virtual edges of the wide class object of the first non-design geometry but not at one or more virtual edges of the wide class object of the first non-design geometry wherein the wide class object of the first non-design geometry has at least one virtual edge.Type: GrantFiled: July 23, 2002Date of Patent: September 14, 2004Assignee: Sun Microsystems, Inc.Inventor: Mu-Jing Li
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Patent number: 6792587Abstract: A routing graph (e.g., a 2.5-D graph) and a method for generating same is provided for more efficient multiple-layer path searching and routing. Subgraphs are generated for each layer, and then are combined (e.g., through via connections) into a single, multi-layer graph. The resulting 2.5-dimensional graph may be used in VLSI routing, for example, which commonly includes multiple routing layers in a given design space. Each subgraph corresponds to a layer of circuitry and includes segments based on segments from other layers and intersection points of all such segments. Methods of generating subgraph layers are disclosed.Type: GrantFiled: January 28, 2002Date of Patent: September 14, 2004Assignee: Sun Microsystems, Inc.Inventors: Zhaoyun Xing, Russell Kao
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Patent number: 6792588Abstract: A floorplan for a reconfigurable chip uses slices adjacent to each of four corners of a region, each of the slices including tiles that contain multiple reconfigurable functional units including ALUs. The placement of the slices in the corners of their region allows for better and quicker interconnection between elements on the slices.Type: GrantFiled: April 2, 2001Date of Patent: September 14, 2004Assignee: Intel CorporationInventor: Shaila Hanrahan
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Patent number: 6792589Abstract: A digital integrated circuit chip is designed by identifying a logical structure to be implemented. This logical structure is represented in terms of a logical operations, at least 5% of which include selection operations. A determination is made of logic cells that correspond to an implementation of these logical operations.Type: GrantFiled: June 14, 2002Date of Patent: September 14, 2004Assignee: Science & Technology Corporation @ UNMInventors: Sterling R. Whitaker, Lowell H. Miles, Eric G. Cameron
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Patent number: 6792590Abstract: Techniques for fabricating a device include forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, and identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects. Techniques include selecting from among all edges of all polygons in a proposed layout a subset of edges for which proximity corrections are desirable. The subset of edges includes less than all the edges. Evaluation points are established only for the subset of edges. Corrections are determined for at least portions of the subset of edges based on an analysis performed at the evaluation points. Other techniques include establishing a projection point on a first edge corresponding to the design layout based on whether a vertex of a second edge is within a halo distance. An evaluation point is determined for the first edge based on the projection point and characteristics of the first edge.Type: GrantFiled: September 29, 2000Date of Patent: September 14, 2004Assignee: Numerical Technologies, Inc.Inventors: Christophe Pierrat, Youping Zhang
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Patent number: 6792591Abstract: Optical proximity effects (OPEs) are a well-known phenomenon in photolithography. OPEs result from the structural interaction between the main feature and neighboring features. It has been determined by the present inventors that such structural interactions not only affect the critical dimension of the main feature at the image plane, but also the process latitude of the main feature. Moreover, it has been determined that the variation of the critical dimension as well as the process latitude of the main feature is a direct consequence of light field interference between the main feature and the neighboring features. Depending on the phase of the field produced by the neighboring features, the main feature critical dimension and process latitude can be improved by constructive light field interference, or degraded by destructive light field interference. The phase of the field produced by the neighboring features is dependent on the pitch as well as the illumination angle.Type: GrantFiled: February 27, 2002Date of Patent: September 14, 2004Assignee: ASML Masktools B.V.Inventors: Xuelong Shi, Jang Fung Chen, Duan-Fu Stephen Hsu
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Patent number: 6792592Abstract: One embodiment of the invention provides a system that performs optical proximity correction in a manner that accounts for properties of a mask writer that generates a mask used in printing an integrated circuit. During operation, the system receives an input layout for the integrated circuit. The system also receives a set of mask writer properties that specify how the mask writer prints features. Next, the system performs an optical proximity correction process on the input layout to produce an output layout that includes a set of optical proximity corrections. This optical proximity correction process accounts for the set of mask writer properties in generating the set of optical proximity corrections, so that the mask writer can accurately produce the set of optical proximity corrections.Type: GrantFiled: August 30, 2002Date of Patent: September 14, 2004Assignee: Numerical Technologies, Inc.Inventors: Danny Keogan, Christophe Pierrat
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Patent number: 6792593Abstract: In a pattern correction method, design layout data of a pattern designed by an automated layout unit is entered. An environmental profile is determined based on whether or not another graphics pattern exists at the surroundings of each correction target cell included in the entered design layout data. A target cell name is replaced with a prescribed cell name of correction pattern corresponding to the determined environmental profile by referencing a cell replacement table. An OPC correction pattern corresponding to the replaced cell name is imported from a cell library.Type: GrantFiled: April 25, 2002Date of Patent: September 14, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Makoto Takashima, Atsuhiko Ikeuchi, Koji Hashimoto, Mutsunori Igarashi, Masaaki Yamada
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Patent number: 6792594Abstract: With software for any fields, to the effect that software is created automatically only by means of mechanical algorithm, but not depending upon personal abilities such as SE's experience, knowledge, application ability, etc., that is, based on the LYEE theory, definitive identifier, word identifier, W04 Autopoiesis vector which is undefined with the inducing data to introduce the process route and the setting value, W04 Duplication element, W04 Autopoiesis vector, W02 Autopoiesis vector, W03 Duplication element and W03 Autopoiesis vector, and Palette Function are memorized in advance, and, per every word, definitive identifiers, word identifiers, process routes and inducing data into are entered and definitive identifiers entered per every word, word identifiers, process routes and inducing data are allocated into the prescribed locations of the undefined W04 Duplication element, W04 Autopoiesis vector, W03 Duplication element, W03 Autopoiesis vector and the Palette Function.Type: GrantFiled: September 20, 2000Date of Patent: September 14, 2004Assignees: Information System Development Institute, The Institue of Computer Based Software Methodology and TechnologyInventors: Fumio Negoro, Shigeaki Tomura
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Patent number: 6792595Abstract: This invention relates to a method for viewing, writing, and modifying source code in an integrated development environment (IDE). When source code is being edited in a graphical environment, windows in the development environment display the code structure of a project allowing for the visualization of the relationships between components of the project. This invention discloses a system and method that permits editing to be performed directly in the graphical environment where the code structure is being displayed. In the preferred embodiment, editing of the source is performed directly within the graphical environment where a hierarchical model of the code structure of a project at various levels (module, class, function, etc.) is displayed.Type: GrantFiled: September 16, 1999Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Adrian Storistenau, Robert Weisz
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Patent number: 6792596Abstract: It is one object of the present invention to edit a Java program by effectively utilizing the access control using a name scope, so that a program that controls a resource and is to be protected can be prevented from being called by a malevolent program. According to the present invention, a Java program development method comprises: a package name replacement step (101) of replacing, with a single package name, package names of packages to which classes that constitute a program belong; a name scope changing step (102) of changing, to package scopes, name scopes of internal fields in the classes that are not to be referred to by sources outside the application program; and a digital signing step (105) of digitally signing the program obtained through the package name replacement and the name scope changing.Type: GrantFiled: March 23, 2001Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Hiroshi Maruyama, Hisashi Kojima
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Patent number: 6792597Abstract: A method and apparatus for structuring a program segment are disclosed. The method for structuring a program segment on a computer begins with the step of identifying a series of program blocks in the segment. Each block is a functional piece of code in the segment and has at least one point corresponding to at least one of entry and exit, in such a manner that the entire segment is divided into blocks with each block being situated in an execution path along which the segment executes in a downstream direction. With respect to each block, a block representative is associated for allocating computer memory for data elements that are needed for the associated block to execute. The block representative assigns a value to any data element required by the associated block to have a value. The block representative also calls the associated block for execution, receives return of control after execution of the block, and passes control based on available data.Type: GrantFiled: March 6, 2000Date of Patent: September 14, 2004Assignee: Wysdom Wireless, Inc.Inventor: Mordechai Halpern
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Patent number: 6792598Abstract: An integrated source code file and a method and apparatus for creating a computer program from the integrated source code file. The integrated source code file is stored on a computer readable medium and the computer program created therefrom is executable by a computer system having a front-end for interfacing with a user, and a back-end for performing batch functions. The computer program comprises instructions for performing a function, which requires at least one parameter for its operation. The computer program further comprises instructions for validating the parameter, the instructions adapted to run on both the front-end and the back-end. The computer program also comprises graphical user interface information for creating a graphical user interface, which can be used to receive the parameter. The computer program still further comprises a documentation section for providing information related to the function, which is adapted for display via the graphical user interface.Type: GrantFiled: September 13, 2001Date of Patent: September 14, 2004Assignee: ConocoPhillips CompanyInventors: Charles Carroll Burch, Jr., William Meredith Menger, Charles Ivan Burch, Karen Pauline Goodger, Maximillian McCalla Burton, Thomas R. Stoeckley, Donna Kay Vunderink, Richard Salisbury Day, Douglas Wade Hanson, Michael L. Sherrill
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Patent number: 6792599Abstract: A method and apparatus for a atomic operation is described. A method comprises receiving a first program unit in a parallel computing environment, the first program unit including a memory update operation to be performed atomically, the memory update operation having an operand, the operand being of a data-type and of a data size, and translating the first program unit into a second program unit, the second program unit to associate the memory update operation with a set of one or more low-level instructions upon determining that the data size of the operand is supported by the set of low-level instructions, the set of low-level instructions to ensure atomicity of the memory update operation.Type: GrantFiled: October 15, 2001Date of Patent: September 14, 2004Assignee: Intel CorporationInventors: David K. Poulsen, Sanjiv M. Shah, Paul M. Petersen, Grant E. Haab
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Patent number: 6792600Abstract: A method and apparatus provides a process in a data processing system for executing a method having a plurality of paths. The data processing system executes native machine code. A path is identified within the method that is being executed, wherein a plurality of bytecodes are associated with the path. Bytecodes are compiled for the path being executed, wherein the bytecodes are compiled into native machine code, wherein bytecodes for unexecuted paths remain uncompiled.Type: GrantFiled: May 14, 1998Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventor: Geoffrey Owen Blandy
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Patent number: 6792601Abstract: An object-based multi-threaded computing system has a cyclic garbage collection strategy and includes an object locking system having (i) a first mode in which access by a single thread without contention to an object is controlled by a monitor internal to said object, and (ii) a second mode in which access by multiple threads with contention to said object is controlled by a monitor external to said object. For any given object a transition from the first mode to the second mode is termed inflation, and a transition from the second mode to the first mode is termed deflation. Responsive to the start of a period of contention for an object in said first mode, the object is inflated to the second mode, and an inflation rate counter is incremented. After the period of contention has concluded the value of the inflation rate counter is compared against a predetermined value in order to determine whether or not to deflate the object. The inflation rate counter is reset at every garbage collection cycle.Type: GrantFiled: May 18, 2000Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Robert Tod Dimpsey, Benjamin Joseph Hoflich, Brian David Peacock
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Patent number: 6792602Abstract: The invention provides a solution/device for controlling external parameters by use of the same data cable and specific software to transfer/receive messages and monitor/control external parameters in a system. Additionally, the invention is compatible with ATA/ATAPI by using the ATA protocol or side-band protocol to make a main system communicate with other device(s) through an ATA/ATAPI device's data cable. Also, the invention uses the system's data cables and a non-standard controlling sequence to transfer and receive messages by the same cable to connect with the external devices for monitoring/controlling external parameters. Hence, the number of data wires needed is reduced. Also, the invention can decrease the manufacture costs and get a better heating dissipation.Type: GrantFiled: December 20, 2000Date of Patent: September 14, 2004Assignee: Promise Technology, Inc.Inventors: Cheun-Song Lin, Cheng-Yu Chen, Ching-Lung Tsai, Cheu-Wei Hsu
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Execution management method of program on reception side of message in distributed processing system
Patent number: 6792603Abstract: In a distributed processing system including a plurality of programs distributed in a plurality of processing units and in which a program on reception side performs processing using a message transmitted from a program on transmission side, a management table for managing start of programs on reception side is provided in a processing unit in which the program on reception side is provided. A program utilizing the message transmitted from the transmission side is recognized and the recognized program is started at the start timing indicated in the management table. The start timing of the program set in the management table may be registered previously or the message may include information indicating the start timing.Type: GrantFiled: June 26, 2001Date of Patent: September 14, 2004Assignee: Hitachi, Ltd.Inventors: Takeiki Aizono, Katsumi Kawano, Kinji Mori, Nobuyoshi Andou, Masayuki Orimo, Shigeki Hirasawa, Koki Nakashiro, Hisashi Hashimoto, Atsushi Kobayashi -
Patent number: 6792604Abstract: Provided are a method, computer program product and data processing apparatus for recovery from interprocess communication failures, the method comprising: in response to an initiator process requesting interprocess communication (IPC) with a responder process via an IPC link, recognizing if the initiator process does not have the expected write control of the IPC link and setting an indicator. A process other than the initiator process checks the indicator (such as after a timeout, or periodically) and, if the indicator has been set, notifies the initiator process to take control. This method avoids potential stalemate situations in which neither the initiator nor the responder process can take control, without reliance on mutex locks for every exchange of data and control.Type: GrantFiled: September 29, 2000Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Andrew Ian Hickson, Richard Scott Maxwell, Timothy Steven Raff, David Ware
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Patent number: 6792605Abstract: The present invention provides a method and apparatus for accessing and using services and applications from a number of sources into a customized application. The present invention accomplishes this through an entity referred to as a web service. The web services architecture maintains a directory of services available to provide processing or services, along with the location of the services and the input/output schemas required by the services. When a request for data or services is received, appropriate services are invoked by a web services engine using service drivers associated with each service. A web services application is then generated from a runtime model and is invoked to satisfy the request, by communicating as necessary with services in proper I/O formats. In one embodiment, the web services application provides responses in the form of HTML that can be used to generate pages to a browser.Type: GrantFiled: June 10, 1999Date of Patent: September 14, 2004Assignee: Bow Street Software, Inc.Inventors: Andrew F. Roberts, Jonathan W. Booth, Michael R. Burati, Thomas E. Beauvais, John T. Serfass, Jr., Joseph Sommers, III
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Patent number: 6792606Abstract: A preferred embodiment of the present invention provides an improved system and method for object persistence. The preferred embodiment facilitates the creation of persistent objects in a way that is orthogonal to class and does not require the use of persistent mixin classes. The preferred embodiment uses reference objects, which to the view of the system act as the object itself, and storage objects which persistently store the data for the persistent objets. The reference objects include pointers to the storage object, and provide address translation and indirection when accesses are to be made to the persistent object data stored in the storage object.Type: GrantFiled: July 17, 1998Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Steven L. Halter, Paul B. Monday
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Patent number: 6792607Abstract: Server-side control objects corresponding to client-side user interface elements are created in a control object hierarchy. Properties of the control objects may be data bound to properties of a server-side data source (e.g., a server-side database). Hierarchical data binding relationships are established between properties of control objects and properties of a data source. Template declarations are used to define the configuration of binding container objects that correspond to data objects in the data source. An iterating control object determines the number of data objects in the data source increase according number of binding container objects. A simple data binding types include without limitation: (1) unidirectional data binding from the data source to a control object; (2) unidirectional data binding from a control object to the data source; and (3) bidirectional data binding between a control object and the data source.Type: GrantFiled: May 18, 2000Date of Patent: September 14, 2004Assignee: Microsoft CorporationInventors: Gary S. Burd, Kenneth B. Cooper, Scott D. Guthrie, David S. Ebbo, Mark T. Anders, Ted A. Peters, Stephen J. Millet
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Patent number: 6792608Abstract: A network navigator interface system and method incorporating a client/server architecture in which a network coarse-grained model (or single object) (NameSpaceObject) is used to create a fine-grained object model is disclosed. The disclosed invention permits a client application to discover the detailed interface provided by each object instance in the fine-grained model. A client application wishing to invoke an operation on a server-side object first obtains an object reference (IOR) to a NameSpaceObject instance. Each NameSpaceObject instance stores a pointer to an object in the fine-grained model. The NameSpaceObject interface provides operations to move this pointer around in a hierarchical model. Once the pointer is set to reference a certain object in the fine-grained model, this object becomes the target for all further operations. The available operations include object contents discovery/manipulation, object interface discovery and operation invocation.Type: GrantFiled: March 1, 2001Date of Patent: September 14, 2004Assignee: AlcatelInventor: Bart A. Theeten
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Patent number: 6792609Abstract: A system and method to create child objects from parent objects in an action diary. Child objects are created with increasing specificity regarding a system situation. A method is provided for associating an action diary based on the parent class of an object, even if there are no instances of objects of the parent class. A knowledge expert creates an action diary and associate that diary with a parent class object. The children of that class have the class generic action diary available to assist the operator in handling new situations. As the operators improve the handling of a specific situation, a new action diary is created by including information and actions in from the original action diary and can be associated with the specific child object. Thus the evolution of knowledge can orderly proceed from a general type to a specific.Type: GrantFiled: November 16, 2000Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Margaret Gardner MacPhail, Richard Stephen Szulewski
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Patent number: 6792610Abstract: A system and method for facilitating attachment of a communication interface device driver to multiple logical devices defined on a single physical communication interface device. For each attachment procedure, an identifier of the affected physical device is read and a corresponding device soft state structure is located (or created, if one does not exist). For each attached logical device, a counter of the number of attachments for the physical device is incremented, and the device information pointer and instance identifier assigned to the logical device are noted. When the final logical device is attached, the physical device can be initialized. The device information pointer for a selected logical device (e.g., one having a particular binding name) is used as a parameter in one or more DDI functions.Type: GrantFiled: May 30, 2002Date of Patent: September 14, 2004Assignee: Sun Microsystems, Inc.Inventor: David Cheon
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Patent number: 6792611Abstract: In a server system: an information holding unit holds information on one of a plurality of processing units which should execute processing in response to each of a plurality of types of processing requests; a processing-request receiving unit receives a processing request; a determining unit determines one of the plurality of processing units as a processing unit which should execute the received processing request, based on the information held by the information holding unit; and a calling unit calls the determined one of the plurality of processing units so that the one of the plurality of processing units executes the received processing request.Type: GrantFiled: August 31, 2001Date of Patent: September 14, 2004Assignee: Fujitsu LimitedInventors: Yoshitaka Honishi, Kazuo Imada, Kouichi Miura, Takashige Furukawa
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Patent number: 6792612Abstract: A Java runtime system is proposed which comprises a stack-based interpreter executing a program that comprises bytecodes and class structures. The system further comprises a modified constant pool with internal information of use only during linking and with external information to be preserved for late code binding. The internal information is removed from the modified constant pool after linking.Type: GrantFiled: September 21, 2000Date of Patent: September 14, 2004Assignee: International Business Machines CorporationInventors: Michael Baentsch, Peter Buhler, Marcus Oestreicher
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Patent number: 6792613Abstract: An optical information recording medium recordable at a high density two times or more higher than that of currently-used CD-Rs by devising the shape of a pregroove is provided. It is provided with a recording layer formed on a transparent substrate having a spiral pregroove formed thereon, wherein a track pitch Tp of the pregroove is 1.0 &mgr;m≦Tp≦1.2 &mgr;m and an inclination angle Ga of sidewalls of the pregroove is 30°≦Ga≦70°.Type: GrantFiled: April 17, 2002Date of Patent: September 14, 2004Assignee: Taiyo Yuden Co., Ltd.Inventors: Yoshikazu Takagishi, Atsuo Shimizu, Ryuichi Sunagawa, Keiichi Ida, Mitsuo Sekiguchi, Isao Matsuda
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Patent number: 6792614Abstract: In an optical disk apparatus and a method of installing its spindle motor in accordance with the present invention, calculation is carried out to obtain a height wherein the spindle motor is supported by spindle motor support portions on the basis of the tilt and height data of the disk mounting face of a turntable with respect to a reference plane and on the basis of the tilt and height data of a plane formed by the plural spindle motor support portions on a chassis with respect to the reference plane. The heights of the spindle motor support portions are corrected on the basis of the result of the calculation.Type: GrantFiled: September 19, 2000Date of Patent: September 14, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Asayuki Matsumura, Yoshihiko Yamada, Yasuhide Saito
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Patent number: 6792615Abstract: Disclosed are systems and methods for creating and distributing programming content carried by a digital streaming media to be a plurality of remote nodes located over a large geographic area to create customized broadcast quality programming at the remote nodes. At the remote nodes, a multi-window screen display simultaneously shows different programming including national programming and local programming content. The remote nodes utilize a remote channel origination device to assemble the customized programming at the remote location that can be controlled from a central location. An encapsulated IP and IP encryption system is used to transport the digital streaming media to the appropriate remote nodes. Also disclosed is a graphical user interface (“GUI”) providing a software control interface for creating and editing shows or programs that can be aired or played on a remote display device having a multi-window display.Type: GrantFiled: May 19, 1999Date of Patent: September 14, 2004Assignee: New Horizons Telecasting, Inc.Inventors: Lynn T. Rowe, John A. Heinen, Peter A. Ernst, Gary H. Olson
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Patent number: 6792616Abstract: A system and method of providing for displaying a full service cable television system. The cable television system is adapted to provide a plurality of different user services. Accordingly, the system and method are designed to allow a user to access services in an efficient memory conserving fashion. Using a plurality of data tables, a cable television system is able to access a plurality of different services including cable channels, interactive program guides, pay per view activation, video on demand and interactive online services such as world wide web browsing and E-mail via their home television set.Type: GrantFiled: May 1, 1998Date of Patent: September 14, 2004Assignee: Scientific-Atlanta, Inc.Inventors: Dean F. Jerding, John M. Schlarb, Arturo A. Rodriguez
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Patent number: 6792617Abstract: Improved enhanced TV programming provides the capability for event driven recording of TV programs and program segments. Recording a selected program segment of a digital TV program includes receiving a digital TV stream including the digital TV program, automatically starting recording of the selected program segment of the digital TV program when a first event notification is received, and automatically stopping recording of the selected program segment when a second event notification is received.Type: GrantFiled: July 20, 2001Date of Patent: September 14, 2004Assignee: Intel CorporationInventors: Eugene Gorbatov, Juan Rivero
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Patent number: 6792618Abstract: Uniform Resource Locators (URLs) or other network information identifiers embedded in television signals are processed in order to permit viewers to customize the display of a corresponding program. In an illustrative embodiment, at a time prior to the scheduled display of a program or portion thereof, a given viewer makes a selection of one of a number of available alternate characteristics for the program, such as one of a number of available alternate endings. At a later time, a base URL embedded in the television signal is extracted and processed using the viewer selection in order to generate a combined URL. The combined URL is then used to establish a connection over a network with a corresponding web site or other information source, and information is retrieved from the web site and stored in a memory. The retrieved information is subsequently taken from the memory and used to modify the manner in which the program is displayed to the viewer.Type: GrantFiled: March 2, 1998Date of Patent: September 14, 2004Assignee: Lucent Technologies Inc.Inventors: Samuel J. Bendinelli, Eugene J. Rosenthal