Abstract: In one illustrative example of the invention, a spin valve sensor includes a free layer structure; an antiparallel (AP) pinned layer structure; and a non-magnetic electrically conductive spacer layer in between the free layer structure and the AP pinned layer structure. The AP pinned layer structure includes a first AP pinned layer; a second AP pinned layer; and an antiparallel coupling (APC) layer formed between the first and the second AP pinned layer. One of the first and the second AP pinned layers consists of cobalt and the other one includes cobalt-iron. The pure cobalt may be provided in the first AP pinned layer or the second AP pinned layer. Advantageously, the use of cobalt in one of the AP pinned layers increases the ?r/R of the spin valve sensor.

Abstract: Provided are a magnetic transducer capable of increasing a resistance change and obtaining an appropriate coercive force, a thin film magnetic head, a method of manufacturing a magnetic transducer and a method of manufacturing a thin film magnetic head. A stack, a spin valve film has a stacked structure comprising a first soft magnetic layer, a second soft magnetic layer, a nonmagnetic metal layer, a ferromagnetic layer, an antiferromagnetic layer and a protective layer which are stacked in sequence on an underlying layer. Electrical resistance is changed in accordance with a relative angle between the orientation of magnetization of the ferromagnetic layer and the orientation of magnetization of the first and second soft magnetic layers. A soft magnetic interlayer having magnetism and the electrical resistance higher than the electrical resistance of the first soft magnetic layer is formed in the first soft magnetic layer.

Abstract: A shorting system, which eliminates persistent arcing faults in power distribution equipment, includes a first shorting switch having separable contacts, an actuation input and a fuse electrically connected in series with those contacts. A second shorting switch includes an actuation input and separable contacts, which are electrically connected in parallel with the series combination of the fuse and the first shorting switch contacts. A detection circuit includes one or more arcing light sensors and an actuation circuit. The light sensors detect arcing fault light and the actuation circuit responsively outputs a first trigger signal to the first shorting switch actuation input to close its contacts. For a persistent arcing fault, which is not eliminated by the first shorting switch, a predetermined time after the first trigger signal, the actuation circuit responsively outputs a second trigger signal to the second shorting switch actuation input to close its contacts.

Abstract: A circuit to suppress arc across contacts of a relay is provided, in which the relay is electrically coupled to a power supply and a load. The circuit includes an arc suppression circuit electrically coupled between the first and second contacts of the relay, and the arc suppression circuit includes a capacitor and a switch, both of which are electrically coupled to the first and second contacts of the relay, in which the switch is configured to turn on when the first and second contacts of the relay change state, thereby providing an alternate path for a current flow through the load.

Abstract: An overcurrent protection circuit for low-voltage, high-current electrical systems comprises a Positive Temperature Coefficient (PTC) resistor in series with an auto-reset thermal breaker. The breaker allows for intermittent current within an assumed product usage duty cycle, and repeatedly trips and resets on sustained high current usage or during a short-circuit fault. The PTC resistor limits current in the system to a low value when the temperature rises to the PTC resistor's trip point. The PTC resistor protects the system from thermal damage during the non-breaker-tripped portions of sustained high current use, or during continuous low-current use. The use of both the PTC resistor and auto-reset breaker provides thermal overcurrent protection while allowing for performance claims based on an assumed duty cycle of product use.

Abstract: A method and means for diagnosing transformer tap changers is provided. Pressure is monitored in an insulating liquid of a tap changer for a period of time in which switching of the tap changer is carried through. Switching-related information is extracted from the pressure diagram. Quantities from pressure peaks are related to specific arcings of the switching sequence. Early error detection is achieved, whereby transformed failures may be avoided. Repeated measurements may be followed by trend evaluation. If a trend indicating tap changer problems is detected, an alarm signal is triggered. The transformer may be switched off if the pressure exceeds a predetermined emergency value. Information of the base pressure in the tap changer may be extracted and converting it to level of insulating liquid.

Abstract: To provide a degaussing coil holder for fastening a degaussing coil around a cathode ray tube which is easy in use and capable of stretching and fastening the degaussing coil in position, the degaussing coil holder is made of a resin mold having a hook to hang the degaussing coil, a catch to fixedly fit in a small hole made in a selected CRT fastening metal and an expandable strip integrally connected at both ends to the hook and catch.

Abstract: An electronic disabling device includes first and second electrodes positionable to establish first and second spaced apart contact points on a target having a high impedance air gap existing between at least one of the electrodes and the target. The power supply generates a first high voltage, short duration output across the first and second electrodes during a first time interval to ionize air within the air gap to thereby reduce the high impedance across the air gap to a lower impedance to enable current flow across the air gap at a lower voltage level. The power supply next generates a second lower voltage, longer duration output across the first and second electrodes during a second time interval to maintain the current flow across the first and second electrodes and between the first and second contact points on the target to enable the current flow through the target to cause involuntary muscle contractions to thereby immobilize the target.

Abstract: The present invention relates to a high-voltage electric double layer capacitor (EDLC), and more particularly, to an EDLC in which a surge voltage and an operating voltage are enhanced by improving the structure of a unit cell. The EDLC according to the present invention includes a unit cell having at least three electrodes. According to a preferred embodiment of the present invention, the unit cell has a structure constructed by sequentially laminating a first insulating paper layer with a sheet of insulating paper, a first electrode layer with at least two electrodes, a second insulating paper layer with a sheet of insulating paper, and a second electrode layer with at least one electrode. In accordance with the present invention, the number of electrode-facing surfaces increases, and a surge voltage and an operating voltage increase in proportion to the increased number of the electrode-facing surfaces, resulting in a high energy storage density.

Abstract: A console unit includes a substrate extending along a virtual plane. A support extends rearward from the front end. The substrate is received on the support. A console is connected to the front end of the support for relative rotation around a rotation axis intersecting the virtual plane. The console is allowed to occupy a larger space even if the substrate is reduced in size. The visibility of the console cannot be degraded irrespective of a reduced size of the substrate. Other components may be positioned adjacent the console unit. Replacement of the component is often required without detaching the console. The console is allowed to retreat from the path of movement of the component based on the rotational movement. Interference can reliably be prevented between the console unit and the other component during replacement of the other component.

Abstract: Methods and apparatuses for mounting an interposer in a chassis. An apparatus can include a spreader frame attached to an interposer, and supporting means attached to the spreader frame for supporting the spreader frame within a chassis. The supporting means can include a first extendable arm and a second extendable arm supported by the spreader frame and biased in opposing directions such that opposing ends engage surfaces of opposing sidewalls of the chassis when the adjustable support structure is installed in the chassis. A method for mounting an interposer within the chassis can include adjusting a distance between opposing ends of the first extendable arm and the second extendable arm to engage inner surfaces of the chassis and hold the interposer and support structure in a static position within the chassis.

Abstract: An electronic device is formed with a housing having a perimeter edge. A controller is located within the housing. Additionally, a display surface extends in a smooth manner outwardly to the perimeter edge.

Abstract: A display for a computer system comprising a display screen and a support for supporting the display screen, the support comprising a base and a column attached to the base, the column being provided with a screen support part and with at least one connector to which a module of the computer system may be connected.

Abstract: The present invention is a computer controlled display device. In one embodiment, the display device includes a flat panel display having an input for receiving display data. Additionally, a moveable assembly may be coupled to the display. The moveable assembly may provide at least three degrees of freedom of movement for the flat panel display device. Additionally, the moveable assembly may have a cross-sectional area, which is substantially less than a cross-sectional area of a display structure of the flat panel display.

Abstract: A portable liquid crystal display and a Tablet PC are disclosed. The portable liquid crystal display comprises a liquid crystal display panel and a case. The liquid crystal display panel comprises a display area. The case encases the liquid crystal display panel, and exposes the display area outside the case. Wherein, the case comprises an opening. The Tablet PC comprises a liquid crystal panel, a computer-hardware, and a case. The liquid crystal panel comprises a display area. The computer-hardware is electrically connected with the liquid crystal display panel. The case encases the liquid crystal display panel and the computer-hardware, and exposes the display area outside the case. Wherein, the case comprises an opening or gap.

Abstract: A high density storage device packaging apparatus in which storage devices are oriented to have lateral faces parallel to each other and to edges of a module in which the storage devices are mounted. The storage devices are connected to a board contained in the module by a plug-in action. The board contains a controller to control the operation of the storage devices including the READ and WRITE operations. The RSM is capable of holding a large number of storage devices and capable of being inserted into a cabinet by a plug-in connection. The RSM includes a housing that covers and protects the storage devices and includes air channels to allow the storage devices to cool. The invention provides a solution for high density packaging of the storage devices and allows for easy access to the storage devices and allows for replacement of failed storage devices without disruption of the remainder of storage devices in the RSM or in the cabinet.

Abstract: A system structure with a fan module. The system structure has a housing and a fan module. The housing has a substrate with the fan module detachably installed thereon. The substrate has a plurality of guide ports, several first positioning portions and a second positioning portion. The fan module has a body, two plates and a fan unit. Each plate is detachably disposed on the body and provided with several positioning portions. When the fan module is attached to the substrate of the housing, the third positioning portions of the fan module are fixed by the first positioning portions of the substrate, and the fourth positioning portion of the fan module fits into the second positioning portion of the substrate.

Abstract: A modular data center includes a plurality of racks, each of the racks having a front face and a back face, wherein the plurality of racks is arranged in a first row and a second row, such that the back faces of racks of the first row are facing the second row, and the back faces of the racks of the second row are facing the first row, a first end panel coupled between a first rack of the first row and a first rack of the second row, the first end panel having a bottom edge and a tope edge, a second end panel coupled between a second rack of the first row and a second rack of the second row, the second end panel having a top edge and a bottom edge, and a roof panel coupled between the top edge of the first panel and the top edge of the second panel.

Abstract: A pluggable electronic module is provided that has an electronic component and a module body enclosing the electronic component. The module body has a first surface and a second surface. The first surface has a first area substantially parallel to the second surface and a second area that defines a non-zero angle with respect to the first area. The second area contacts a thermal sink to dissipate heat generated by the electronic component. The pluggable electronic module has a reduced insertion force in comparison with conventional pluggable electronic modules.

Abstract: A thermal management apparatus is provided, wherein heat generated by an electronic component coupled to a backside of a carrier substrate may be transferred to an opposite front side of the carrier substrate through a thermal conductor sized to pass through an opening in the carrier substrate.

Abstract: A thermal dissipation apparatus for implementing chassis conducted cooling for a server. The apparatus includes a heat sink having a first surface and a second surface. The first surface is adapted to accept a chip thermal interface for a chip. The second surface is adapted to accept a chassis thermal interface for a chassis surface, wherein the second surface implements a thermal conductive path from the chip to the chassis surface.

Abstract: Described is a midplane-less data storage enclosure having a control board module with an electrical connector and a bulkhead assembly with a plurality of spaced-apart disk-drive guides coupled to a bulkhead. The disk-drive guides and bulkhead together define a plurality of disk-drive slots. The bulkhead has connected thereto a plurality of first electrical connectors and a second electrical connector in electrical communication with each of the first electrical connectors. Each slot slidably receives a storage disk drive such that the storage disk drive electrically connects to one of the first electrical connectors. The second electrical connector is electrically connected to the connector of the control board module so that each storage disk drive connected to one of the first electrical connectors is in electrical communication with the control board module.

Abstract: One embodiment is a system for mounting a component in a computer system comprising a bracket having a plurality of access ports that permit the component to be secured to the bracket, and having a plurality of mounting points that permit the bracket to be secured to the computer system; a cavity in the computer system formed to receive the bracket with the component and having a plurality of mounting posts, each of which corresponds with a respective mounting point of the plurality of the mounting points; and a cover that is formed to fit over the cavity and having a plurality of access points, each of which corresponds with a respective mounting point and a respective mounting post, wherein the plurality of access points permits each respective mounting point to be secured to the respective mounting post through the associated access point.

Abstract: A memory module includes a plurality of memory units and an assembling holder. Each of the memory units includes a memory substrate, at least a memory chipset having a predetermined memory capacity mounted on the memory substrate, and an electric terminal provided at a lower edge portion of the memory substrate. The assembling holder includes an elongated unit housing having an elongated receiving slot extended therealong and a signal terminal provided along the unit housing, wherein the electric terminals of the memory substrates are detachably inserted into the receiving slot of the unit housing to electrically connect the electric terminals with the signal terminal, such that the memory units are alignedly and detachably mounted along the receiving slot in an edge to edge manner.

Abstract: A printed circuit board connector engagement apparatus includes a four-bar linkage capable of coupling to an electronics system housing and is configured to accept and enable a printed circuit board to travel in a first direction until a connector on the printed circuit board and a corresponding connector coupled to the housing are aligned. The four-bar linkage further enables the printed circuit board to travel essentially orthogonal to the first direction to engage the printed circuit board and housing connectors.

Abstract: An electronic device having a replaceable casing panel comprises a first portion and a second portion. The first portion includes a gliding member having a plurality of second positioning elements corresponding to a plurality of first positioning elements, and each second positioning element includes a fixing element for fixing the gliding member in the first portion and restricting the moving direction of the gliding member, and the gliding member includes a first panel that slides with the gliding member. The second portion includes a second panel having a plurality of third embedding elements and a plurality of fourth embedding elements embedded with each other, and the second portion includes a plurality of first embedding elements and a plurality of second embedding elements, such that the first panel can be pushed to form a gap for replacing the second panel.

Abstract: In one embodiment, the present invention includes a method of mounting a semiconductor device to a first side of a circuit board; and mounting at least one voltage regulator device to a second side of the circuit board, the second side opposite to the first side. The voltage regulator devices may be output filters, inductors, capacitors, and the like. In certain embodiments, the devices may be located directly underneath the semiconductor device.

Abstract: The present invention provides an electronic module assembly with reduced EMI noise emission. The electronic module assembly of the invention includes an electronic module component that emits EMI noise. The electronic module assembly has a first electric reference region and a second electric reference region that is in communication with electronic module component. An impedance component is positioned in series with the first reference region and the second reference region such that impedance component attenuates the first electromagnetic noise signal. The electronic module assembly further includes low pass filter component that is in electrical communication with electronic module component. The present invention also provides a method of reducing EMI noise emission.

Abstract: A DC power source apparatus has a DC power source for supplying a DC voltage, a transformer, and a switching element connected to a primary winding of the transformer. The switching element carries out ON/OFF operations to convert the DC voltage from the DC power source into high-frequency power, which is transferred to a secondary winding of the transformer and is converted into a DC output voltage. The primary winding of the transformer consists of a first primary winding made of a plurality of winding layers and a second primary winding made of a plurality of winding layers. The first and second primary windings are connected in parallel. The first primary winding is arranged on an inner side of the secondary winding, and the second primary winding is arranged on an outer side of the secondary winding. A terminal of a winding layer farthest from the secondary winding among the winding layers of each of the first and second primary windings is connected to the switching element.

Abstract: A power supply circuit is disclosed which performs constant voltage control by switching frequency control and is ready for a wide range while the necessary control range of the switching frequency control is reduced. The circuit includes a primary side series resonance circuit forming a current resonance type converter, and a secondary side series resonance circuit formed from secondary windings and secondary side series resonance capacitors while a coupling type resonance circuit by electromagnetic coupling of an insulating converter transformer is formed. To obtain a single-humped characteristic from the coupling type resonance circuit, a gap of approximately 1.6 mm is formed in the core of the insulating converter transformer so as to achieve a coupling coefficient of 0.65 or less. A secondary side DC output voltage is produced from outputs of the secondary windings so as to cope with a heavy load condition.

Abstract: In a preferred embodiment, a Sine Amplitude Converter (“SAC”) method and apparatus for VTMs converts a DC input voltage to a DC output voltage using a fixed transformation ratio at a frequency locked to a resonance. The SAC uses a resonant circuit including a transformer and complementary primary switches operating with balanced switching and a high power conversion duty cycle (e.g., above 94%) to perform high frequency, low noise, single stage power processing. The resonant circuit may have a low Q while enhancing conversion efficiency. Common-mode noise may be effectively reduced using symmetrical resonant power trains. In a preferred embodiment, a low profile (<0.16 inch high), low permeability “dog's bones” core structure, integrated with multi-layer PCB windings to complete SAC transformers, gives rise to a VTM manufacturing platform with greater than 400 Watts/cubic-inch power density and 95% efficiency, converting 100–150 Watts at the point of load.

Abstract: A power supply system includes a power source and a control circuit. The power source provides DC power. A control circuit, which is remote to the power source, receives the DC power and provides a first DC power signal to an electronic device. The control circuit includes an active component to provide at least one of a voltage control output or a current control output to the power source to regulate the DC power. A power supply system includes a power source and a control circuit. The control circuit is remote to the power source, receives the DC power, and provides the DC power to an electronic device. The control circuit includes a microprocessor to provide at least one of a voltage control output and a current control output to the power source to regulate the DC power.

Abstract: A system for supplying electrical power for use when the vehicle engine is shut down and configurations of long-haul trucks employing the system are disclosed. The power system is a battery bank contained within an insulated enclosure. The batteries are heated when the truck is in operation with the insulated enclosure maintaining battery temperature sufficient to provide high battery power capacity for an extended period after the vehicle is shut down. A large capacitor, rather than the batteries, provides current for starting the vehicle engine. A dc-to-dc converter controls the fully charged capacitor voltage and provides capacitor charging current even when the batteries have been discharged to a low-voltage condition. The disclosed long-haul truck configurations include a storage cooler that employs a phase-change medium that is thermally charged to a low temperature while the truck is in operation and is used to provide sleeper unit cooling air.

Abstract: A technique to pre-charge a CAM block array including a plurality of CAM blocks that is organized into at least one rectangular array having rows each having a plurality of CAM blocks, an associated GMAT line, an associated LMAT line, and a group of CAM cells. The pre-charge technique of the present invention accommodates for all CAM block configurations without compromising performance at the cost of silicon area. In one example embodiment, this is accomplished by precharging each LMAT line in the CAM block array. A predetermined amount of delay is then applied substantially after precharging each LMAT line. Each GMAT line in the CAM block array is then precharged.

Abstract: A nonvolatile memory device features a phase change resistor cell. The nonvolatile memory device using a phase change resistor cell comprises a plurality of phase change resistor cell arrays, a plurality of word line driving units and a plurality of sense amplifiers. Each of the plurality of phase change resistor cell arrays includes unit phase change resistor cells, and each unit phase change resistor cell is located where a word line and a bit line are crossed in row and column directions. The plurality of word line driving units selectively drive the word lines. The plurality of sense amplifiers sense and amplify data transmitted through the bit lines. Here, the unit phase change resistor cell comprises a phase change resistor and a hybrid switch. The phase change resistor stores a logic data value corresponding to a resistance sate changed by a crystallization state of a phase change material depending on the amount of current supplied from a word line.

Abstract: A memory device is obtained in which stable recording of information can be performed and a period of time required for the recording of information can be shortened.

Abstract: The present invention provides a dynamic RAM which can be operated at a low voltage and realizes the enhancement of a read margin and an area-saving layout.

Abstract: A novel switching device is provided with an active region arranged between first and second electrodes and including a molecular system and ionic complexes distributed in the system. A control electrode is provided for controlling an electric field applied to the active region, which switches between a high-impedance state and a low-impedance state when the electrical field having a predetermined polarity and intensity is applied for a predetermined time.

Abstract: A microelectronic programmable structure and methods of forming and programming the structure. The programmable structure generally include an ion conductor and a plurality of electrodes. Electrical properties of the structure may be altered by applying a bias across the electrodes, and thus information may be stored using the structure.

Abstract: A memory device having memory cells in which a single access transistor controls the grounding of at least two storage elements, such as resistive storage elements, for purposes of reading the respective logical states of the storage elements. The logical states of the storage elements are decoupled from one another and are read independently. The storage elements are disposed in respective layers. Each storage element is coupled to first and second conductors having respective longitudinal axes. The longitudinal axes are oriented substantially parallel to one another, at least in proximity to a particular storage element.

Abstract: A semiconductor integrated circuit device includes a magneto-resistive effect element and a plug. The magneto-resistive effect element includes a first magnetic layer whose magnetization direction is fixed and a second magnetic layer whose magnetization direction can be changed. The plug is formed to penetrate through the second magnetic layer in the film thickness direction of the second magnetic layer and used to apply a write magnetic field to the second magnetic layer.

Abstract: The invention includes an apparatus and method for selecting a desirable magnitude of a magnetic memory cell write current. The method includes determining a minimal magnitude of write current for writing to the magnetic memory cell, determining a maximal magnitude of write current for writing to the magnetic memory cell, and calculating the selected magnitude of magnetic memory cell write current based on the minimal magnitude of write current and the maximal magnitude of write current.

Abstract: An MRAM device comprising an array of MRAM elements, with each element having an MRAM bit influenced by a magnetic field from a current flowing through a conductor, also includes a magnetic keeper formed adjacent the conductor to advantageously alter the magnetic field. The magnetic keeper alters the magnetic field by concentrating the field within the keeper thereby reducing the extent in which fringe field exists, thus allowing the MRAM elements to be formed closer to increase the areal density of the MRAM device. Increase in magnetic field flux due to the magnetic keeper allows operation of the MRAM device with lowered power. Soft magnetic materials such as nickel iron, nickel iron cobalt, or cobalt iron may be used to form the magnetic keeper.

Abstract: An improved Flash memory device is described with a protection register lock bit erase enable circuit. A bond pad coupled to the lock bit erase enable circuit of the improved Flash memory is not bonded when the individual Flash memory chip wafer is packaged. This allows the memory manufacturer to access the bond pad and erase the lock bits while the chip is still in wafer form via a test card probe, but makes the lock bits effectively uneraseable when the chip wafer is packaged. This enables the memory chip manufacturer to enhance reliability and fault tolerance of the Flash memory device by thoroughly testing the lock bits and protection register functionality. Additionally, the lock bit erase enable circuit increases manufacturing flexibility by allowing the memory chip manufacturer to reprogram the protection register and lock bits in case of organizational changes or inadvertent or erroneous programming of the protection register.

Abstract: A redundant column is mapped to a defective or over-erased column in the memory array. When an erase command occurs, both the redundant column and the defective or over-erased column are preconditioned by preprogramming them. The defective or over-erased column is preprogrammed and verified a predetermined number of times or until the verification passes. The redundant and defective or over-erased columns are then erased with the rest of the memory block.

Abstract: By providing registers for each block constituting the flash memory, based on the use state and the erase count information stored in the registers, the plurality of blocks are classified into n groups according to the erase count by the control circuit, and of the blocks that can be used for writing of one classified group, writing of data is performed in the block constitution sequence. When all the blocks of one group are used, data is written to blocks that can be used for writing of another group selected in a specified sequence. Sequentially between n groups, the item in charge for selecting the blocks used for data writing are alternated, and data is written to the selected block. As a result, considering leveling of the flash memory block erase count, it is possible to perform the write capability block selection process using hardware.

Abstract: A method for programming a split gate memory cell comprises the following steps. First, a split gate memory cell formed on a semiconductor substrate of a first conductive type, e.g., p-type, is provided. The split gate memory cell has two bitlines of a second conductive type, e.g., n-type, a select gate, a floating gate, a wordline and a dielectric layer deposited between the floating gate and the semiconductor substrate, wherein the select gate and floating gate are transversely disposed between the two bitlines, the wordline is above the select gate and floating gate. Second, a positive voltage is applied to the wordline so as to turn on the floating gate, and a negative voltage is applied to the bitline next to the floating gate, whereby a bias voltage across the tunnel dielectric layer is generated for programming, that is, the so called F-N programming.

Abstract: A semiconductor memory device includes word lines, drain lines, source lines, a memory array including plural memory cells formed from a field effect transistor, a data write circuit, a write control circuit, and a word line drive circuit, wherein the write control circuit outputs the drain drive voltage of H-level to the selected memory cell when a data write operation is commanded, and outputs the drain drive voltage of L-level when a data write operation is not commanded, and the data write circuit generates a write voltage corresponding to a logical value of data to be written into the selected memory cell based on the drain drive voltage outputted from the write control circuit, and supplies the write voltage as the source drive voltage via the source line to the selected memory cell when a data write operation is commanded by the first control signal.

Abstract: In a non-volatile memory, the displacement current generated in non-selected word lines that results when the voltage levels on an array's bit lines are changed can result in disturbs. Techniques for reducing these currents are presented. In a first aspect, the number of cells being simultaneously programmed on a word line is reduced. In a non-volatile memory where an array of memory cells is composed of a number of units, and the units are combined into planes that share common word lines, the simultaneous programming of units within the same plane is avoided. Multiple units may be programmed in parallel, but these are arranged to be in separate planes. This is done by selecting the number of units to be programmed in parallel and their order such that all the units programmed together are from distinct planes, by comparing the units to be programmed to see if any are from the same plane, or a combination of these.

Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.