Abstract: A method and apparatus are provided for reducing leakage current in a read only memory device. Leakage current is reduced by reducing the duration of the precharge cycle during each read cycle so that the associated leakage current will flow for a shorter time period during each cycle. The precharge phase is positioned at the beginning of each read cycle, prior to the evaluation phase. The precharge phase is terminated by a subsequent clock edge or by an internal time out prior to a subsequent clock edge. The time interval between when the columns reach their precharge voltage and the evaluation phase begins is reduced.

Abstract: Circuits and methods are provided for precharging pairs of memory digit lines. The final precharge voltage of the digit lines is different from the average of the digit line voltages prior to precharging. The final precharge voltage can be set by appropriately selecting the size of a capacitor in the precharge circuit.

Abstract: Methods for controlling the timing of a pre-charge operation in a memory device are provided. In embodiments of the present invention, the timing may be controlled by dynamically selecting a word line off time based on information about a number of column cycles. This may be accomplished, for example, by routing a word line disable signal via one of a first plurality of delay paths. The methods may further include dynamically selecting a bit line equalization start time based on the information about the number of column cycles. This may be accomplished, for example, by routing a bit line equalization start signal via one of a second plurality of delay paths. Pursuant to still further embodiments of the present invention, systems for controlling timing in a memory device are provided which include a control circuit that is configured to select a word line off time from a plurality of word line off times in response to a word line signal and information about a number of column cycles.

Abstract: A semiconductor integrated circuit device equipped with a memory circuit, which realizes the speeding up of its operation and low power consumption in a simple configuration is provided. At input/output nodes of a sense amplifier including a CMOS latch circuit for performing an amplifying operation in response to an operation timing signal, a pair of first precharge MOSFETs brought to an on state during a precharge period to supply a precharge voltage, and select switch MOSFETs for connecting the input/output nodes and each complementary bit line pair in response to a select signal are provided. A second precharge MOSFET for short-circuiting the complementary bit line pair is provided between the complementary bit line pair. A memory array is provided which includes dynamic memory cells each comprising an address selecting MOSFET and a storage capacitor, each of which is provided between one of the complementary bit line pair and a word line intersecting it.

Abstract: Twin-cell bit line sensing structures and techniques are provided. Utilizing a folded bit line like structure, with bit line and complementary bit lines located together, sense amplifiers can be between cell arrays. Bit line switches, responsive to activated word lines in an array, may be used to selectively couple bit line pairs of the shared arrays with the sense amplifiers with a single word line activation.

Abstract: A circuit verifies and substitutes a defective reference cell of a memory device that includes at least one reference current path including the reference cell and a decoding transistor connected in series. The circuit includes at least one redundant reference current path identical to the at least one reference current path and in parallel therewith. A connection circuit connects in a mutually exclusive way control terminals of the decoding transistor and reference cell of the at least one reference current path to a node or control terminals of the decoding transistor and reference cell of the at least one redundant reference current path to the node. The connecting is based upon a logic signal. A window comparator is coupled to the reference current path for comparing a current therein with a pair of upper and lower thresholds, and outputs the logic signal for the connection circuit based upon the comparison.

Abstract: A semiconductor device includes a DRAM and a temperature sense circuit. The DRAM has a refresh period that varies responsive to a temperature signal. The temperature sense circuit is configured to generate the temperature signal having a first binary value in response to sensing a temperature of the DRAM of at least a first temperature level, and to generate the temperature signal having a second binary value in response to sensing a temperature of the DRAM of less than a second temperature level, wherein the second temperature value is less than the first temperature value.

Abstract: A method and apparatus for controlling a voltage generator of a memory device are provided. A temperature of the memory device is measured. If the measured temperature is outside a threshold temperature range, the memory device is allowed to be placed in a clocked standby mode (CSM), whereby the voltage generator is selectively enabled with a clock signal. If the measured temperature is within a threshold temperature range, the memory device is prevented from being placed in the clocked standby mode (CSM).

Abstract: A method and system for DRAM refresh wherein the refresh rate is proportional to the current leakage of one or more sampling cells. The sampling cells selected are representative of the nominal leakage condition of the DRAM array and track the DRAM cell leakage rates, which are dependent upon manufacturing process variations, application influences, voltage variations and the temperature of the system, both locally and globally. As the current leakage through the DRAM increases, the refresh cycle repetition frequency increases and accordingly decreases for low leakage conditions. By adjusting the refresh rate in the manner described by the invention disclosed herein, the semiconductor conserves power by reducing unnecessary refresh cycles, generates the required delay between cycles without undue power consumption and provides a cost effective means that does not require external settings and calibration to optimize the refresh rate for the variations heretofore mentioned.

Abstract: In accordance with one embodiment of the present invention, a programmable logic device includes at least one block of memory having a plurality of memory cells and a plurality of fuses adapted to provide a first set of signals that determines a first configuration for the at least one block of memory. A plurality of multiplexers are adapted to select the first set of signals from the plurality of fuses to configure the at least one block of memory in the first configuration or a second set of signals to configure the at least one block of memory in a second configuration.

Abstract: An apparatus and associated method for reducing power consumption in an electronic circuit comprising a refresh load device being employed alternatively between an operational mode and a state refresh mode. A supply voltage level to the refresh load device is adjusted in relation to which of the operational and state refresh modes is employed and in relation to which of a primary alternating current derived power source or a backup battery power source is employed.

Abstract: A memory device, such as a synchronous random access memory device, includes four banks of memory cells arranged in rows and columns. Different numbers of columns of memory cells are contained in each of the four banks. The bank in which an item of data are stored is determined by either the memory device, a memory controller or a processor based on one or more of several factors. For example, the bank in which the data are stored may be determined by the nature of the data or the length of data bursts written to or read from the memory device. Alternatively, the bank in which the data are stored may be determined based on the source of data written to the memory device or destination for data read from the memory device.

Abstract: A method and apparatus for controlling multiple signal polarity in a memory device. A desired active state signal polarity of at least one signal pad of a device is compared to a default active state signal polarity allocated to the at least one signal pad. The desired and default active state signal polarities have either a high active state or a low active state. The active state signal polarity of the at least one signal pad is reversed in response to the desired active state signal polarity differing from the default active signal polarity.

Abstract: The present invention relates to a system and method for providing redundancy in a hierarchically memory, by replacing small blocks in such memory. The present invention provides such redundancy (i.e., replaces such small blocks) by either shifting predecoded lines or using a modified shifting predecoder circuit in the local predecoder block. In one embodiment, the hierarchal memory structure includes at least one redundant predecoder adapted to be shifted in for at least one active predecoder of a plurality of predecoders adapted to be shifted out.

Abstract: Disclosed herein is a word line driving circuit in which sub-word lines are prevented from floating by using a sub-word line driver having two transistors. A plurality of sub-word line drivers is connected to one main word line. Each of the plurality of the sub-word lines includes a PMOS transistor and a NMOS transistor serially connected between a sub-word line driving voltage FX and a ground voltage. A floating prevention unit selects the main word line to a level of a threshold voltage using a driving signal having the level of the threshold voltage, thus preventing sub-word lines of a sub-word line driver, where the sub-word line driving voltage FX is off, from floating.

Abstract: A multi-headed word line driver circuit incorporates bent-gate transistors to reduce the pitch otherwise achievable for interfacing to tightly-pitched array lines. In certain exemplary embodiments, a three-dimensional memory array includes multiple memory blocks and array lines traversing horizontally across at least one memory block. Vertical active area stripes are disposed beneath a first memory block, and a respective plurality of bent-gate electrodes intersects each respective active area stripe to define individual source/drain regions. Every other source/drain region is coupled to a bias node for the active area stripe, and remaining source/drain regions are respectively coupled to a respective array line associated with the first memory block, thereby forming a respective first driver transistor for the respective array line.

Abstract: Disclosed is an apparatus for controlling an enable interval of a signal controlling an operation of data buses which connect a bit line sense amplifier with a data sense amplifier according to a variation of an operational frequency of a memory device. The apparatus comprises a pulse width control section for changing the pulse width of an input signal depending on the operational frequency of the memory device after receiving the input signal, a signal transmission section for buffering a signal outputted from the pulse width control section, and an output section for receiving a signal outputted from the signal transmission section so as to output a first signal for controlling the signal to control the operation of the data buses.

Abstract: An apparatus can constantly tune the RAS active time by comparing the RAS active time generated in synchronization with a clock signal with the RAS active signal generated through an inverter delay circuit and adjusting a delay time by feeding back the result of comparison. The apparatus includes a clock sync time, an inverter delay time generating unit, a delay correcting unit, a comparing unit, and a delay control unit. The comparing unit compares signals outputted from the clock sync time generating unit and the delay correcting unit and outputs a signal corresponding to a result of comparison, and the delay control unit generates and provides a control signal corresponding to the output signal of the comparing unit to the delay correcting unit.

Abstract: A memory controller. A first counter is triggered by rising edges of a data strobe signal and generates a first count value. A second counter is triggered by falling edges of the data strobe signal and generates a second count value. A third counter is triggered by rising edges of an internal clock and generates a third count value. A first buffer uses the first count value as a write address for sequential storage of the data corresponding to the rising edges of the data strobe signal, and sequential outputs the data corresponding to the third count value after a first predetermined period. A second buffer uses the second count value as the write address for sequential storage of the data corresponding to the falling edges of the data strobe signal, and sequential outputs the data corresponding to the third count value after the first predetermined period.

Abstract: The present invention provides a memory device having a mode register with a selectable bit which sets the memory device to operate with a selected one of a plurality of possible clock input signals, for example, a single clock input or differential clock input.

Abstract: A wireless hydrophone system includes a hydrophone joined to a preamplifier. A serial A/D converter receives the amplified hydrophone signal and provides a serial digital output representative of the signal. The A/D converter is joined to a processor which provides a start signal and a clock signal to the A/D converter. A digital transmitter is also controlled by the processor. The transmitter receives the serial digital output from the A/D converter for wireless transmission over an antenna. The system can also include logic for allowing the processor to provide an extended sync signal for transmission. The extended sync signal can alert a receiver to an initial transmission. The system can be incorporated in a hull treatment for positioning on a vessel's hull.

Abstract: The invention relates to a synthetic sonar antenna and more particularly to the self-calibration of such an antenna. It consists in minimizing the number of sensors of the reception antenna by fixing the reduced pitch between the sensors, imposed by the precision of the self-calibration, solely at the two ends of the antenna. According to a variant, the reduced pitch is fixed at just one end of the antenna. It makes it possible to increase the precision of the self-calibration with a smaller number of sensors than in the prior art.

Abstract: A wristwatch including a casing having top and bottom parts and a movement therein, an upper housing, a replaceable watch face and a means for releasably securing the upper housing to the top part of the casing. The upper housing is formed as an integral unit, and includes top and bottom transparent panels, a drive shaft means extending through the bottom transparent panel, the drive shaft means having top and bottom ends, time indicating hands fixed to the top ends of the drive shaft means, and side walls fixed to and maintaining the top and bottom transparent panels spaced apart to define a chamber therein for enclosing the time indicating hands. The replaceable watch face includes a memory element, and a flat panel display disposed over the memory element. The replaceable watch face is situated below the bottom transparent panel and above the casing top part, and the bottom end of the drive shaft means is releasably coupled to the movement.

Abstract: A multi mode alert timer having a timer display, switches for start stop and reset functions and audible, visible, and tactile alert signal selection and a housing where a user may select a timer alert signal including the individual alert signals or any combination thereof.

Abstract: A slider system have been developed to aid in the spacing between read/write heads and the storage medium, and a grating antenna amplifier has been developed to improve illumination spot size and polarization characteristics. The grating antenna can be attached to a grayscale slider to obtain a distance between the illumination spot and antenna that lies in the near field region.

Abstract: The present invention discloses a method of detecting orientation of an optical disk drive. Firstly, a first moving distance is measured by using a first force driven on a movable optical pick up head of the optical disk drive for a preset period. Next, a second moving distance is measured by using a second force driven on the movable optical pick up head for the preset period, wherein the second force and the first force have opposite direction but the same amplitude. Next, it is determined that the optical disk drive is horizontal orientation when the difference between the first and second moving distances falls within a pre-determined value. Additionally, a first moving time is measured by using a first force driven on a movable optical pick up head for a pre-determined distance.

Abstract: A method and related apparatus for data accessing of an optical disk drive. The optical disk drive has a motor for rotating an optical disk and a pickup head. The pickup head is capable of writing data onto the optical disk according to a write-in clock. The method includes: when the pick-up head is seeking to a target position and a rotation speed of the motor is still being adjusted and unstable, making the pickup head slide back and forth within a predefined range, and making the pickup head slide toward the target position when the rotation speed of the motor becomes stable.

Abstract: A recording medium has first and second areas on which first and second information signals are recorded respectively. The first information signal has a size Ya. The second information signal has a size Yb. A head operates for reproducing the first and second information signals from the first and second areas of the recording medium and transmitting the reproduced first and second information signals on a time sharing basis and at a predetermined constant transfer rate Rp while moving between the first and second areas of the recording medium. A buffer memory operates for receiving the first and second information signals from the head at the predetermined constant transfer rate Rp, for temporarily storing the first and second information signals, and for outputting the first and second information signals at first and second transfer rates Ra and Rb respectively. The first and second transfer rates Ra and Rb are lower than the predetermined constant transfer rate Rp.

Abstract: Optical disc systems and methods for controlling movement of an optical pickup to an innermost perimeter of an optical disc using track information are provided. For example, an optical disc system includes an optical pickup that includes a tracking actuator, a focus actuator, and an objective lens and radiates a laser beam onto the optical disc to detect light reflected from the optical disc. The optical disc system also includes a radio frequency amplifier, a sled motor, a servo driver, and a servo signal processor that includes an optical pickup movement determiner and outputs a servo control signal, the optical pickup movement determiner determining from a track-related signal whether tracks are detected on the optical disc at a current position of the optical pickup and outputting a track determination signal indicating whether the optical pickup has moved to the innermost perimeter of the optical disc, based on the determination result.

Abstract: A recording and reproduction apparatus for a recording medium including a plurality of information layers includes a focusing signal generation section for generating focusing signals F+ and F? in accordance with a light beam reflected by the recording medium; a focusing control section for generating a focusing error signal in accordance with a difference between the focusing signals F+ and F?, and performing focusing control for maintaining a distance between a focal point of the light beam and a target information layer within a prescribed tolerable range; and a gain setting section for setting a focusing servo gain in accordance with the focusing error signal. The focusing signal generation section generates the focusing signals F+ F? so that values of components thereof based on the light beam reflected by an information layer other than the target information layer are substantially equal while focusing control is being performed.

Abstract: To provide a light receiving device, a light detecting device, and an optical signal reproducing device each of which allows one to perform many different computations in detecting aberration amounts and focus error quantities without requiring exact position relations between laser light to be received and light receiving elements, and between the light receiving elements. First and second light receiving elements 43+ and 43? are used which receive condensed light at positions equidistantly spaced from an focal point X before and after the light images, respectively.

Abstract: The present invention relates to a track access apparatus and a method by which an optical pick-up unit quickly accesses a destination track of an optical disc by controlling a tracking actuator using a back electromotive force by detecting the vibration of an objective lens, the position variation, and the distortion of an actuator which occur when the optical pick-up unit is moved across the tracks of the optical disc at a high speed.

Abstract: There are provided a balance adjustment circuit (6) for adjusting levels of first and second detection signals from a tracking detector, a differential circuit (8) for generating a difference signal between the adjusted first and second detection signals, an AD conversion circuit (10) for digitizing the difference signal, a wobble signal detection circuit (14) for detecting a wobble signal from the digitized difference signal, an adder circuit (30) for generating a sum signal of the adjusted first and second detection signals, a binarization circuit (32) for converting the sum signal into a binarized signal, a latch circuit (33) for latching the binarized signal and converting the same into a timing signal, a control signal generation circuit (34) for generating a control signal based on the timing signal and the digitized difference signal, a residual component removal circuit (18) for removing a residual signal component included in the digitized difference signal based on the control signal and outputting

Abstract: An apparatus for generating tracking error signals including: an optical detection unit having a plurality of divided light receiving elements to allow beams reflected from a recording surface of the optical disks to be incident; a comparator for outputting after comparing the signals from light receiving elements, which correspond to the set group of the optical detection unit, with the reference signals set for the each group; an error correction unit for correcting and outputting errors if there are any errors after mutual comparison with signals of the groups output from the comparator; a phase-difference detection unit for outputting the signals for each group that correspond to a phase-difference after mutual comparison of the signals of the groups output from the error correction unit; a subtractor for mutually subtracting the signals for each group from the phase-difference detection unit and outputting the tracking error signals.

Abstract: A system provides a signal to an actuator within an optical pickup unit of an optical disk drive. In one implementation, SUM signal data (an output from the quad sensors typically present in the optical pickup unit) is recorded within a SUM table. An error term generator processes the SUM signal data from the SUM table to produce an error term. An actuator control signal generator generates a signal to control movement of the actuator, wherein the signal is a function of a prior actuator position, the error term and an adaptation coefficient, wherein the adaptation coefficient impacts a rate at which the error term is allowed to modify the prior actuator position.

Abstract: According to an optical disc recording control method, a drive, and a recording system of the present invention, in a drive of an optical disc, when data transfer from a host computer is interrupted while data transmitted from the host computer is being recorded in a track of the disk, the recording in the track is stopped and the recording process is switched to record data in a lead-out area, and when the recording process for the lead-out area is ended, track information (TOC data and PMA data) from the first track up to the last track is modified in accordance with the track data which has been actually recorded on the disk, and the modified track information is recorded in a lead-in area and a PMA.

Abstract: An optical disc system and a method of managing shock while recording or playing data in the optical disc system are provided. The optical disc system includes an optical pick-up unit for applying a laser beam to a track of an optical disc and detecting reflected light, a servo unit for controlling tracking and focus of the optical pick-up unit and a monitoring unit for comparing a monitoring signal, which is output from the optical pick-up unit and the servo unit, with a reference signal and generating a blocking signal and a blocking release signal. Recording or playing of data on the optical disc is stopped in response to the blocking signal, and recording or playing of the data on the optical disc is resumed in response to the blocking release signal based on a state of the optical disc system when recording or playing was stopped.

Abstract: A method for real time recording and playback of data to and from an optical recording medium, and a method for managing a file thereof is disclosed. In the present invention, the host controls real time data writing by providing a signal requesting for information on a defective area to the device for recording/playback of data to/from an optical disk before providing a write command. Accordingly, the write command is generated such that data is not written on the defective areas, based upon the returned information on the defective area. Alternatively, the host may first provide a write command to the device for recording/playback of data to/from an optical disk, upon which information on defective areas is returned. Thus, the host generates and provides a new write command such that data is not written on a defective area based upon the returned information on the defective area.

Abstract: A recording medium having a spare area for defect management, and a method and apparatus for allocating and assigning the spare area. A plurality of zones are formed as one group without prescribing the relationship between a zone and a group. Spare areas include a spare area for slipping replacement and a spare area for linear replacement. The spare are for slipping replacement is first allocated, and the spare area for linear replacement is allocated according to the size of an area remaining after the spare area for slipping replacement is used and the purpose for which a disc is used. When the spare area for linear replacement becomes deficient during use of the disc, a supplementary spare area for linear replacement is allocated in sequence from the rearmost of a logical file area, such that the spare area can be more flexibly and effectively allocated.

Abstract: The present invention aims to enable revision of additional information buried in contents data with less burden on hardware. For this purpose, a predetermined amount of inputted contents data is temporarily stored in buffer means, the additional information buried in the contents data being detected from the contents data temporarily stored in the buffer means, the contents of the detected additional information being estimated, the contents data being made to be recorded in a predetermined medium when estimated that the contents data can be recorded, and the contents data being made not to be recorded in the medium when estimated that the contents data must not be recorded. In addition, when estimated that revision of the additional information is necessary, the relevant part of data stored in the buffer means is revised while it is being stored in the buffer means.

Abstract: A data recording device for recording data on an optical disc by irradiating a laser pulse on the optical disc while controlling rotation of the optical disc at a constant angular velocity. The device includes a laser condition varying unit that changes a peak value of the laser pulse in accordance with a value relating to a linear velocity of the optical disc at a position at which the laser pulse is irradiated.

Abstract: In an optical disc drive, a laser light source emits a laser beam having an intensity changeable with the amount of drive current supplied. A first photodetector receives the laser beam reflected from an optical disc, thereby generating a readout signal. A second photodetector receives the laser beam, generates an electric signal representing the power of the laser beam received, and outputs the electric signal as a light quantity detection signal. A feedback control loop compares the level of the light quantity detection signal with a predetermined target value and regulates the drive current such that the level of the light quantity detection signal approaches the target value. In reading data from the optical disc, the target value is changed so as to compensate for a variation of the sensitivity of the second photodetector, thereby controlling the power of the laser beam emitted from the laser light source.

Abstract: An optical recording method that performs recording by irradiating optical recording media with laser beam modulated in intensity based on a write waveform is provided. The write waveform has a plurality of write pulse blocks for forming write marks, and each write pulse block has at least one type of upward pulse. In the event that the width of said upward pulse is so narrow that the laser beam intensity corresponding to the peak intensity of that upward pulse cannot be obtained, the peak intensity of that upward pulse is increased so that, in said laser beam, the beam intensity it should have or a value close thereto is obtained. Thereby, good recording and playback characteristics can be obtained even when recording at a high transfer rate.

Abstract: An information recording apparatus, an information recording method, an information recording medium, an information reproducing apparatus and an information reproducing method by which in the case in which the present invention is applied to an optical disk system by, for example, a compact disk or the like and data or the like related to copyright is recorded by partial change of a pit shape or the like, the data can be reproduced with certainty without repeatedly recording the data. With regard to a defect having a size by which at least main data can be reproduced correctly, 1 bit of sub-data SB is allocated to a pit row or the like having a predetermined length or more such that the sub-data SB can be reproduced correctly.

Abstract: In a method for writing data to an information recording medium having a plurality of recording layers, user data is written across between a plurality of the recording layers, and data other than the user data is written in a predetermined zone of the recording layer. Thereby, since the user data is written continuously upon switching of a recording layer without data other than the user data being written, it is possible to avoid interruption of writing of the user data to the recording layers.

Abstract: A predetermined synchronization pattern (40), a so-called VFO field, in, for example, the headers 3 of an information carrier, consists of sequences of 3T marks and spaces (41), of 8T marks and spaces (42) and of 5T marks and spaces (43). This sequence of patterns is advantageous for setting the dynamic range of an Automatic Gain Controlled (AGC) amplifier located within a device reading the information carrier.

Abstract: An optical pickup apparatus used in an optical data recording/reproducing apparatus for reading/reproducing data on an optical recording medium, including a light source, a diffracting device configured to transmit a light beam and to diffract a light beam reflected from the optical recording medium, an optical device having a reflecting portion and a transmitting portion configured to reflect one part of the light beam emitted from the light source and to transmit another part of the light beam to the optical recording medium and from the optical recording medium, and a photodetecting device to detect the light beam from the optical recording medium for signal light detection, and the light beam reflected by the reflecting portion of the optical device for monitor light detection of the light source.

Abstract: The present invention is directed to an optical head adapted for performing recording or reproduction of information signals with respect to an optical disc (102), which controls light coupling efficiency with respect to light beams irradiated onto the optical disc (102) by light coupling efficiency adjustable element such as a liquid crystal element (214), etc. in accordance with type of the optical disc (102), recording surface of multi-layer optical disc and/or operation mode to change power of light beams irradiated onto the optical disc (102) to a large extent without excessively increasing change quantity of output power of a semiconductor laser element (212). A beam splitter (218) divides incident light beams of P-polarized light at a predetermined ratio to allow the light beams thus obtained to be incident on a light detector (219) for disc surface power monitor.

Abstract: An optical pickup including a many-sided reflection prism formed as a single body with a plurality of reflection faces to guide a light beam incident through a transmission face in a horizontal direction perpendicular to a height direction by reducing a size of the light beam in the height direction, by using a difference in angles between the reflection faces, and to reflect the guided light beam in the height direction by one reflection face of an angle less than 45° with respect to the horizontal direction. By using the many-sided reflection prism, the height of an optical system can be reduced regardless of the wavelength used without reducing light beam size. Thereby, slim-sized optical pickups can be implemented.

Abstract: Methods and apparatus are provided for making an optically readable storage media in which the reading beam passes through a bonding layer configured with a reactive material that transforms from an optically transparent state to an optically opaque state after exposure to a predefined stimulus, thereby inhibiting access to the data encoded on the optically readable storage media. The method includes steps of synthesizing a blocked dye combining the blocked dye with a carrier material curing the resultant combination deblocking the dye to produce a reduced dye in the resultant bonding layer exposing the optically readable storage media with the reactive material in its bonding layer to a predetermined stimulus. In a further aspect of the present invention methods and apparatus are provided for making an optically readable storage media wherein the reading light passes through the bonding layer and the data encoded information is encoded on the L1 substrate.