Patents Issued in December 18, 2007
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Patent number: 7310701Abstract: A performance information display method using a computer, includes the steps, in the computer, of reading out information data of a storage device previously stored in a storage device and information data of a plurality of devices utilizing the storage device, displaying an identifier of the storage device and identifiers of a plurality of devices utilizing the storage device on a screen on the basis of the information data read out, accepting a command to select the displayed identifier of the storage device, and displaying performance information data of the devices utilizing the selected storage device in association on the basis of the accepted command and the information data read out.Type: GrantFiled: September 22, 2006Date of Patent: December 18, 2007Assignee: Hitachi, Ltd.Inventors: Kei Takeda, Takato Kusama
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Patent number: 7310702Abstract: A storage control system judges whether the data pattern of data exchanged with a higher-level device (hereafter “data”) conforms to one or a plurality of write-excluded data patterns comprised in write-excluded data pattern information prepared in advance. If a negative judgment result is obtained, the storage control subsystem stores the data in a logical device formed on a disk storage device. If, on the other hand, a positive judgment result is obtained, the storage control subsystem erases the data without storing in a logical device.Type: GrantFiled: June 8, 2006Date of Patent: December 18, 2007Assignee: Hitachi, Ltd.Inventor: Kenji Yamagami
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Patent number: 7310703Abstract: A method of reading data comprises receiving a request for a stripe of erasure coded data, sending read messages to at least a quorum of storage devices, and receiving at least the quorum of reply messages from the devices. The quorum of the reply messages includes at least a minimum number of stripe blocks needed to decode the data. The quorum meets a quorum condition of a number such that any two selections of the number of the stripe blocks intersect in the minimum number of the stripe blocks. A method of writing data comprises generating a timestamp, encoding the data, sending query messages including the timestamp to the storage devices, receiving query reply messages from each of at least the quorum of the devices, sending write messages to the devices, and receiving a write reply message from each of at least the quorum of the devices.Type: GrantFiled: October 23, 2003Date of Patent: December 18, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Svend Frolund, Arif Merchant, Yasusuhi Saito, Susan Spence, Alistar Veitch
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Patent number: 7310704Abstract: Various embodiments of systems and methods are disclosed for performing online backup and restore of volume configuration information. In some embodiments, a method involves receiving a request to restore a volume configuration and, in response to the request, writing volume configuration information to a storage device. The volume configuration information includes a first disk signature, which identifies the storage device.Type: GrantFiled: November 2, 2004Date of Patent: December 18, 2007Assignee: Symantec Operating CorporationInventors: Tianyu Wen, Chris C. Lin, Ronald S. Karr
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Patent number: 7310705Abstract: The present invention relates to a multithread processor. In the multithread processor, when a cache miss occurs on a request related to an instruction in, of a plurality of caches arranged hierarchically, a cache at the lowest place in the hierarchy, with respect to the request suffering the cache miss, a cache control unit notifies an instruction identifier and a thread identifier, which are related to the instruction, to a multithread control unit. When a cache miss occurs on an instruction to be next completed, the multithread control unit makes the switching between threads on the basis of the instruction identifier and thread identifier notified from the cache control unit. This enables effective thread switching, thus enhancing the processing speed.Type: GrantFiled: November 5, 2004Date of Patent: December 18, 2007Assignee: FUJITSU LimitedInventors: Toshio Yoshida, Masaki Ukai, Naohiro Kiyota
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Patent number: 7310706Abstract: A microprocessor includes random cache line refill ordering to lessen side channel leakage in a cache line and thus thwart cryptanalysis attacks such as timing attacks, power analysis attacks, and probe attacks. A random sequence generator is used to randomize the order in which memory locations are read when filling a cache line.Type: GrantFiled: May 10, 2002Date of Patent: December 18, 2007Assignee: MIPS Technologies, Inc.Inventors: Morten Stribaek, Jakob Schou Jensen, Jean-Francois Dhem
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Patent number: 7310707Abstract: A method for determining an aging period for retaining a write-back data in a cache memory prior to writing the write-back data to a storage media is determined through use of a write-back aging routine. The aging period is based on a proportional utilization level of the cache memory by the write-back data, the higher the memory utilization level, the shorter the period for aging the write-back data. The aging period takes a form of an aging threshold, which differs depending on the memory utilization level, i.e., the amount of cache memory utilized by the write-back data. The method includes, identifying the memory utilization level, selecting the data aging threshold based on the memory utilization level; and writing the data from the cache memory to the storage media when an age of the data in the memory exceeds the selected data aging threshold.Type: GrantFiled: May 15, 2003Date of Patent: December 18, 2007Assignee: Seagate Technology LLCInventors: Edwin S. Olds, Travis D. Fox, Mark A Thiessen
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Patent number: 7310708Abstract: In a computer system with caching, memory transactions can retrieve and store groups of lines. Coherency states are maintained for groups of lines, and for individual lines. A single coherency transaction, and a single address transaction, can then result in the transfer of multiple lines of data, reducing overall latency. Even though lines may be transferred as a group, the lines can subsequently be treated separately. This avoids many of the problems caused by long lines, such as increased cache-to-cache copy activity.Type: GrantFiled: August 26, 2003Date of Patent: December 18, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventor: Blaine D. Gaither
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Patent number: 7310709Abstract: A method and apparatus is disclosed for maintaining coherency between a primary cache and a secondary cache in a directory-based cache system. Upon identifying a parity error in the primary cache, a tag parity packet and a load instruction are sent from the primary cache to the secondary cache. In response to the tag parity packet, each tag entry in the secondary cache that is associated with the parity error is invalidated. Upon receiving an acknowledgment of receipt of the tag parity packet, the primary cache functions to invalidate each tag entry in the primary cache that is associated with the parity error. Then, the secondary cache communicates data requested in the load instruction to the primary cache.Type: GrantFiled: April 6, 2005Date of Patent: December 18, 2007Assignee: Sun Microsystems, Inc.Inventors: Kathirgamar Aingaran, Ramaswamy Sivaramakrishnan, Sanjay Patel
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Patent number: 7310710Abstract: A multi-context register file for use in a multi-threaded processor includes at least one multi-context register file cell having internal routing functionality.Type: GrantFiled: March 11, 2003Date of Patent: December 18, 2007Assignee: Marvell International Ltd.Inventors: Dennis M. O'Connor, Lawrence T. Clark
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Patent number: 7310711Abstract: Embodiments of the present invention provide a data storage apparatus with new features to more easily enable atomic transactions. Rather than having the host system issue the multiple logging commands to the data storage apparatus, the data storage apparatus can be modified so that it can perform the logging function itself. In one embodiment, a data storage controller of a data storage apparatus for implementing an atomic transaction comprises a receiving module configured to receive from a host one or more commands to be executed as an atomic transaction; a log recording module, configured to record in a nonvolatile storage a log containing the one or more commands of the atomic transaction, the log to be administered by the data storage controller and not by the host; and an execution module configured to perform the one or more commands of the atomic transaction.Type: GrantFiled: October 29, 2004Date of Patent: December 18, 2007Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Richard New, James Shipman
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Patent number: 7310712Abstract: A method of a copying data includes a cache subsystem loading data to be copied from a first address, and placing the data in a cache as if the data had been loaded from a second address. The data can then subsequently be written to the second address to effect the copy.Type: GrantFiled: June 10, 2004Date of Patent: December 18, 2007Assignee: Sun Microsystems, Inc.Inventor: David Stuart Gordon
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Patent number: 7310713Abstract: An object of the present invention is to allow access to a plurality of logical devices regardless of the number of ports provided in a storage system and the number of logical devices that can be allocated to a single port, and thereby to improve the usability of the logical devices. A storage system comprises a plurality of logical devices, a target device which is the object of access from a computer, and a juke box system for allocating one of the plurality of logical devices to the target device. The juke box system changes the logical device that is allocated to the target device in accordance with a request from the computer.Type: GrantFiled: December 19, 2005Date of Patent: December 18, 2007Assignee: Hitachi, Ltd.Inventors: Yoshiaki Eguchi, Yasutomo Yamamoto, Yasuyuki Nagasoe
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Patent number: 7310714Abstract: A virtual copy of data stored in a first memory is created in a second memory. Creating the virtual copy includes, in one embodiment, creating first and second tables in memory each one of which comprises a plurality of multibit entries. Each entry of the first table corresponds to a respective memory region of the first memory. Each entry of the second table corresponds to a respective memory region of the second memory. The first bit of the first and second tables indicates whether the corresponding memory region of the first and second memories, respectively, contains valid data. The second bit of the first and second tables indicates whether data in the corresponding memory region of the first and second memories, respectively, has been modified since the creation of the first and second tables, respectively.Type: GrantFiled: January 30, 2004Date of Patent: December 18, 2007Assignee: VERITAS Operating CorporationInventors: Anand A. Kekre, John A. Colgrove, Oleg Kiselev, Ronald S. Karr, Niranjan S. Pendharkar
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Patent number: 7310715Abstract: A method, apparatus, and computer program product are disclosed for controlling accesses of drives in a storage subsystem. A first array of a first type of drive is provided. The first type of drive is a server class of drive. A second array of a second type of drive is provided. The second type of drive is a PC class drive. The first and second arrays are bound together to form a single array of drives. The single array of drives is presented to a host that is coupled to the storage subsystem as a single array. The host is unaware that the single array includes two different types of drives. Data is stored in the second array of drives. Data is migrated from the second array of drives to the first array of drives when an access rate of the second array of drives exceeds a threshold access rate for the second type of drive.Type: GrantFiled: January 12, 2005Date of Patent: December 18, 2007Assignee: International Business Machines CorporationInventors: Thomas R. Forrer, Jr., Jason Eric Moore, Asghar Tavasoli, Abel Enrique Zuzuarregui
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Patent number: 7310716Abstract: Described area system and computer program product for producing a point in time copy of source data. A set of records corresponding to a time ordered series of recorded file operations as applied to said source data is received. The set of records includes one or more consistency point markers, each consistency point marker indicating a point in time at which said source data is in a consistent state when a portion of said recorded file operations occurring up to said point in time is applied to said source data. The recorded file operations corresponding to said set of records are applied to said copy of the source data until a marker record corresponding to a consistency point marker is determined. Also described is a target system for producing a point in time copy of source data including a data storage device including said copy of source data and a replication service.Type: GrantFiled: March 4, 2005Date of Patent: December 18, 2007Assignee: EMC CorporationInventors: Kenneth J. Galipeau, Robert K. Kast, Eran Orgad
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Patent number: 7310717Abstract: A data processor including a central processing unit and a data transfer control unit is disclosed. The data transfer control unit has an address register for storing a transfer address. The data transfer control unit transfers data according to a transfer unit size selected from a plurality of transfer unit sizes. If the address register contains an odd address as an initial value, the data transfer control unit transfers data according to a different transfer unit size that is smaller than the selected transfer unit size. If the data transfer control unit determines that a remaining quantity of data to be transferred is smaller than the selected transfer unit size, the selected transfer unit size is switched to a smaller transfer unit size selected from the plurality of transfer unit sizes.Type: GrantFiled: June 4, 2003Date of Patent: December 18, 2007Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc., Hitachi Engineering Co., Ltd.Inventors: Tatsuo Nishino, Toru Ichien, Gou Teshima, Hiromichi Ishikura, Jyunji Ishikawa
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Patent number: 7310718Abstract: A method and apparatus for profiling a heap. According to the method, a flexible and comprehensive general-purpose profiling interface that uniformly accommodates a wide variety of memory allocation and garbage collection methods is used. The profiling interface, among other things, employs a set of virtual machine profiling interface events that support all known types of garbage collection methods.Type: GrantFiled: November 24, 1999Date of Patent: December 18, 2007Assignee: Sun Microsystems, Inc.Inventors: Sheng Liang, Steffen Grarup
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Patent number: 7310719Abstract: A method for allocating memory in a computer system includes allocating a block of memory from an operating system, dividing the block of memory into frames, and dividing each of the frames into instances such that each of the instances is operable to store data. In addition, a software application using application-level memory management includes an application-level memory manager operable to allocate a block of memory to store data elements with the block of memory divided into frames and each frame divided into instances, and application code operable to store data elements in instances of a block of memory allocated by the application-level memory manager.Type: GrantFiled: July 24, 2003Date of Patent: December 18, 2007Assignee: Sap AktiengesellschaftInventors: Axel Von Bergen, Volker Sauermann, Arne Schwarz
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Patent number: 7310720Abstract: Certain exemplary embodiments can comprise a method, comprising: recognizing, by a PLC, that a memory device has been connected to the PLC; and configuring the PLC via a PLC executable software program resident on the memory device. Certain exemplary embodiments can comprise a method, comprising: via a PLC network interface: presenting a PLC network as a namespace shell extension of an operating system of a non-PLC information device; and rendering, to a user of the non-PLC information device, the PLC network as a node of a network. Certain exemplary embodiments can comprise a method, comprising: via a PLC network interface: presenting a PLC network as a namespace shell extension of an operating system of a non-PLC information device; and searching the PLC network for at least one item corresponding to one or more search parameters.Type: GrantFiled: June 2, 2005Date of Patent: December 18, 2007Assignee: Siemens Energy & Automation, Inc.Inventor: James W. Cornett
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Patent number: 7310721Abstract: In a computer system that employs virtual memory, multiple versions of a given page are stored: a directory version, a table version, and a data version. The data version contains the data that a software object believes to be stored in the page. The directory and table versions of the page contains versions of the page's contents that have been modified in some manner to comply with a restriction on the address translation map employed by the virtual address system. When a page is being used by the virtual address system as a directory or table, then the directory or table versions, respectively, of that page are used. When a page is the target of a read request, the data version of the page is used.Type: GrantFiled: October 30, 2003Date of Patent: December 18, 2007Assignee: Microsoft CorporationInventor: Ernest S Cohen
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Patent number: 7310722Abstract: Instruction dispatch in a multithreaded microprocessor such as a graphics processor is not constrained by an order among the threads. Instructions are fetched into an instruction buffer that is configured to store an instruction from each of the threads. A dispatch circuit determines which instructions in the buffer are ready to execute and may issue any ready instruction for execution. An instruction from one thread may be issued prior to an instruction from another thread regardless of which instruction was fetched into the buffer first. Once an instruction from a particular thread has issued, the fetch circuit fills the available buffer location with the following instruction from that thread.Type: GrantFiled: December 18, 2003Date of Patent: December 18, 2007Assignee: NVIDIA CorporationInventors: Simon S. Moy, John Erik Lindholm
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Patent number: 7310723Abstract: Methods and systems thereof for exception handling are described. An event to be handled is identified during execution of a code sequence. A bit is set to indicate that handling of the event is to be deferred. An exception corresponding to the event is generated if the bit is set.Type: GrantFiled: April 2, 2003Date of Patent: December 18, 2007Assignee: Transmeta CorporationInventors: Guillermo J. Rozas, Alexander Klaiber
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Patent number: 7310724Abstract: Parallel execution of peripheral drivers on a multi-processor and/or hyper-threading enabled processor is described. According to one embodiment of the invention, two peripheral drivers are executed concurrently during a boot sequence. These peripheral drivers are executed on a first and a second processor. The processors may be logical or physical processors.Type: GrantFiled: June 30, 2003Date of Patent: December 18, 2007Assignee: Intel CorporationInventors: Lechong Chen, Shaofan Li, Xiang Ma
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Patent number: 7310725Abstract: Common operations that are to be performed by various environment-specific entities are identified. The environments may include pre-boot environment and run-time environment. A common entity is established to include the common operations. The common entity may be stored in memory associated with system management mode (SMM). A system management interrupt (SMI) may be used by the various environment-specific entities to invoke the common entity.Type: GrantFiled: June 30, 2004Date of Patent: December 18, 2007Assignee: Intel CorporationInventors: Vincent J. Zimmer, Michael A Rothman
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Patent number: 7310726Abstract: A method and system for booting a microprocessor controlled device. A microprocessor that is designed to read from a linear storage device executes code from a non linear storage device through an interface or emulator that writes and retrieves specially formatted boot instructions to/from the non linear storage device.Type: GrantFiled: May 24, 2006Date of Patent: December 18, 2007Assignee: SanDisk CorporationInventors: Henry Ricardo Hutton, Farshid Sabet-Sharghi, Robert C. Chang, Jong Guo
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Patent number: 7310728Abstract: A method of bypassing a programmable processing element can include examining data where the data has at least a header, removing the header from the data, encrypting the data through a cryptographic component, rejoining the removed header and the encrypted data, and outputting the rejoined header and encrypted data.Type: GrantFiled: November 24, 2003Date of Patent: December 18, 2007Assignee: ITT Manufacturing Enterprises, Inc.Inventor: Charles Francis Haight
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Patent number: 7310729Abstract: A system for Digital Rights Management (DRM) license delivery is presented in which the license and encrypted content is accessed from a unique download URL address for each unit of encrypted content for each subscriber. The license is delivered only a limited number of times from each URL (typically once, but optionally more than once) and is delivered to the client system that first accesses the URL (or if more than one license delivery is authorized by the content owner or distributor) to the same or different client system that accesses the URL up to the maximum number of license delivery events authorized.. When the subscriber is ready to view the content, the subscriber clicks on the download URL to cause the browser for the subscriber client system to request the web page located at the unique URL location. In response to the request, the host system delivers a license and the encrypted content to the subscriber client system that accessed the URL.Type: GrantFiled: March 12, 2003Date of Patent: December 18, 2007Assignee: Limelight Networks, Inc.Inventors: Michael Gordon, Nathan Raciborski
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Patent number: 7310730Abstract: A method of communicating an encrypted data broadcast to a plurality of virtual private network receivers is disclosed. A first communication channel is established between a first one of the receivers and a network node. A private data stream is communicated to the first receiver on the first channel. A request is received from the first receiver to join a broadcast data stream that is directed to a plurality of receivers by a broadcast server. A second encrypted communication channel is established between the first receiver and the network node for purposes of carrying the broadcast data stream. Decryption information, which the first receiver can use to decrypt information that is sent on the second channel, is sent to the first receiver through the first channel. The broadcast data stream is then communicated to the first receiver on the second channel.Type: GrantFiled: May 27, 2003Date of Patent: December 18, 2007Assignee: Cisco Technology, Inc.Inventors: Jean-Philippe Champagne, Bruce Lueckenhoff, Matthew Gnagy, James Aviani
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Patent number: 7310731Abstract: A first information processing unit stores identification information into a storage module, stores an encrypted contents signal into a mass storage unit, and supplies the encrypted contents signal and identification information to a second information processing unit through a communication section. In a receiving unit of the first information processing unit, log information generated by a purchase processing module is stored into the storage module every time the contents key is decoded, and the log information is transmitted at predetermined timing to a key management center through the transmission section. The second information processing unit receives the encrypted contents signal and the identification information through a communication section, and causes a contents processing section to decode the encrypted contents signal and to append the identification information thereto.Type: GrantFiled: July 23, 2004Date of Patent: December 18, 2007Assignee: Sony CorporationInventors: Yoshihito Ishibashi, Tateo Oishi, Tomoyuki Asano, Yoshitomo Osawa
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Patent number: 7310732Abstract: A content distribution system allowing user authentication to be performed to identify a user in content transaction, thereby permitting the content to be used. The content is distributed with a secure container. The secure container includes the content enciphered with a content key and container information in which the content transaction condition is set. The container information includes an identification certificate identifier list. An identification certificate contains a template serving as personal identification data of a user who is to receive the content and it is identified in accordance with the list. A service provider, a user device, or the like authenticates the user in accordance with the identified certificate, and then permits the content to be used.Type: GrantFiled: August 30, 2001Date of Patent: December 18, 2007Assignee: Sony CorporationInventors: Shinako Matsuyama, Yoshihito Ishibashi, Ichiro Futamura, Masashi Kon, Hideaki Watanabe
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Patent number: 7310733Abstract: The present invention relates to various aspects for maintaining and utilizing login preference information of users of a network-based transaction facility. In one embodiment, user interface information is communicated to a client via a communications network. The user interface information includes information concerning a plurality of features within the network-based transaction facility. The user interface information also specifies a login interface that facilitates user input of login preference information pertaining to each of the plurality of features. Further, the login preference information is received from the client via the communications network and utilized to control user access to any of the plurality of features within the network-based transaction facility via the communications network.Type: GrantFiled: January 29, 2001Date of Patent: December 18, 2007Assignee: eBay Inc.Inventors: Jennifer Pearson, Alex D. Poon, Buffy Poon
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Patent number: 7310734Abstract: An improved computer network security system and a personal identifier device used for controlling network with real time authentication of both a person's identity and presence at a computer workstation is provided. A new user is registered to a portable personal digital identifier device and, within the portable personal digital identifier device, an input biometric of the user is received and a master template is derived therefrom and securely maintained in storage. A private key and public key encryption system is utilized to authenticate a user registered to the portable personal digital identifier device. The personal digital identifier device verifies the origin of a digitally signed challenge message from the network security manager component. A digitally and biometrically signed challenge response message is produced and transmitted by the personal digital identifier device in response to the verified challenge message.Type: GrantFiled: February 1, 2001Date of Patent: December 18, 2007Assignee: 3M Innovative Properties CompanyInventors: Alan Boate, Brian Reed
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Patent number: 7310735Abstract: Disclosed is a system, method, and program for distributing computer software from a first computer system. The first computer system receives a request for software from a second computer system. In response, the first computer system generates a message, encrypts the generated message, and transmits the encrypted message to the second computer system. The first computer system later receives an encrypted response from the second computer system and processes the encrypted response to determine whether the second computer system is authorized to access the software. The second computer system is permitted access to the software after determining that the second computer system is authorized to access the software. To access the computer software with the second computer system, the second computer system transmits a request for the software to the first computer system.Type: GrantFiled: October 1, 1999Date of Patent: December 18, 2007Assignee: International Business Machines CorporationInventor: David Michael Shackelford
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Patent number: 7310736Abstract: An application and method for transmitting copies of data to a remote back-up site for storage, and for retrieving copies of the previously stored data from the remote back-up site. A user designates files from an originating computer for which to transfer copies to a destination computer. A uniquely assigned application ID is used to identify the location of the second computer. The originating computer submits a transfer request to the destination computer. The destination computer authenticates the transfer request. If the request is authenticated, the originating computer transfers copies of the designated files to the destination computer at the identified location via a communication network. Alternatively, a user designates previously stored files to retrieve from the destination computer. The originating computer submits a retrieval request to the destination computer for the designated back-up copy files. The destination computer authenticates the retrieval request.Type: GrantFiled: October 9, 2003Date of Patent: December 18, 2007Assignee: PB&J Software, LLCInventors: James N. Rothbarth, Paul E. Becker
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Patent number: 7310737Abstract: A cooling system for cooling computer systems detects heat dissipated by the computer systems. If the heat dissipated by the computer systems exceeds a threshold, at least one component of the computer systems is placed in a lower-power state to reduce heat dissipation.Type: GrantFiled: June 30, 2003Date of Patent: December 18, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Chandrakant D. Patel, Keith Istvan Farkas, Gopalakrishnan Janakiraman
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Patent number: 7310738Abstract: A fan controller in one exemplary embodiment facilitates control over a cooling system having fans in a computing apparatus, and permits operating system and application program based software inputs as well as hardware inputs to be utilized in the control of the fans.Type: GrantFiled: February 9, 2005Date of Patent: December 18, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Nitin Bhagwath, Naysen Robertson, Sachin Navin Chheda
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Patent number: 7310739Abstract: A universal serial bus (USB) with a power-saving mode and an operating method thereof are provided. When the USB peripheral is coupled to the USB host, the USB host core logic of the USB host transmits an inquiry request via a USB transceiver to inquire whether or not the USB peripheral supports the power-saving mode. The core logic of the USB peripheral responds via the USB transceiver that the power-saving mode is supported. Then the USB peripheral is off-line and then is shifted to be on-line for operating the power-saving mode. The USB host is also switched to the power-saving mode. Under the power-saving mode, the data are respectively transceived by the serial transceivers. The clock frequency of the serial transceiver can be adjusted according to the request of data transmission.Type: GrantFiled: October 28, 2004Date of Patent: December 18, 2007Assignee: Prolific Technology Inc.Inventors: Arthur Wu, Wen-Hwa Chou
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Patent number: 7310740Abstract: Power down to a reduced power state, such as a standby or off state, of an information handling system is delayed by a user-configured time after detection of closing of the cover of the information handling system. In one embodiment, a cover delay module associated with the BIOS of the information handling system delays communication of the detection of the closing of the cover from the BIOS to a power manager of the operating system that commands the reduced power state. In another embodiment, the cover delay module integrates with the operating system power manager.Type: GrantFiled: August 20, 2004Date of Patent: December 18, 2007Assignee: Dell Products L.P.Inventors: Erin L. Price, John Billingsley
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Patent number: 7310741Abstract: In an embodiment of the invention, a method for a phase adjusted delay loop, includes: determining a requested delay value for a code path; and executing a delay loop in the code path in order to obtain a loop delay value that is in phase with the requested delay value. The act of executing the delay loop may include: executing at least one No-operation instruction (NOP) to adjust the loop delay value and to adjust the phase of the loop delay value.Type: GrantFiled: August 17, 2004Date of Patent: December 18, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventor: Louis D. Huemiller, Jr.
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Patent number: 7310742Abstract: Method and apparatus for performing disk diagnostics and repairs on remote clients. The method employs an embedded LAN microcontroller at a client to submit diagnostic commands to disk drives hosted by the client. Corresponding diagnostic data is returned from the disk to the LAN microcontroller, and an XML file containing the diagnostic data is generated. The XML file is then packaged as a Simple Object Access Protocol (SOAP) message, which is bound to the Hyper Text Transport Protocol (HTTP), processed via an Internet Protocol (IP) microstack, and sent to a management server via an out-of-band (OOB) communication channel that is transparent to an operating system running on the client. Upon receipt of the SOAP message, the diagnostic data are extracted from the XML file using an XML schema application. A user may request diagnostics be performed for selected disk drives connected to selected client hosts, wherein the request is packaged as an XML file in a SOAP request message.Type: GrantFiled: June 30, 2004Date of Patent: December 18, 2007Assignee: Intel CorporationInventors: Vincent J. Zimmer, Michael A. Rothman
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Patent number: 7310743Abstract: A method and apparatus for data recovery in a system involving a first data store acting as a standard device and a physical moving mirror data store that operates as moving mirror with a first mode to be synchronized and in a second, isolated mode. In response to a command to establish a third or protected restore operating mode, the data to be transferred in response to that command is identified. A restoration procedure copies data from the second data store to the first store to recover any data that may have been corrupted in the second data store. An update procedure acts on the restored data concurrently with the restoration procedure.Type: GrantFiled: January 31, 2005Date of Patent: December 18, 2007Assignee: EMC CorporationInventors: Mathieu Gagne, Haim Kopylovitz, Ishay Kedem
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Patent number: 7310744Abstract: The present invention is directed to systems and methods for remotely booting a server computer system. A boot request is received from the server computer. An access request is transmitted to a boot management system via a secondary communication channel in response to the received boot request. An access response is received from the boot management system. The access response includes boot data from a boot image accessible via the boot management system and compatible with the server computer. In response to the received access response, the boot data is extracted from the access response and forwarded to the server computer for processing and booting. Multiple responses may be required in certain instances to accumulate the entirety of the boot image.Type: GrantFiled: September 23, 2005Date of Patent: December 18, 2007Assignee: American Megatrends, Inc.Inventors: Sanjoy Maity, Samvinesh Christopher
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Patent number: 7310745Abstract: A method for media scan operations for storage system is disclosed. The method comprises the steps of arranging a range of sections of media of PSDs to perform media scan operations; scheduling the media scan operations; selecting a section in the range; verifying media of the selected section; determining the status of selected section; if the status is not ok, responding by proceeding with the corrective action processes, otherwise responding by selecting another section in the range to proceed with the verifying step, the determining step, and this responding step, until no more sections in the range to be verified. A storage subsystem implementing the method, a computer system comprising such storage subsystem, and a storage media having machine-executable codes stored therein for performing the method are also disclosed.Type: GrantFiled: March 29, 2005Date of Patent: December 18, 2007Assignee: Infertrend Technology, Inc.Inventors: Michael Gordon Schnapp, Chih-Chung Chan, Ching-Hai Hung
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Patent number: 7310746Abstract: A method is provided for transmitting messages between bus users that are each linked with a communication bus for the purpose of exchanging messages and with a diagnostic device for detecting the failure of the communication bus. In a diagnostic operation mode that is different from the normal operation mode, the bus user receiving the message is requested by the diagnostic device to output the message to the communication bus, thereby diagnosing a message transmission between two bus users.Type: GrantFiled: March 22, 2004Date of Patent: December 18, 2007Assignee: Bayerische Motoren Werke AktiengesellschaftInventor: Robert Griessbach
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Patent number: 7310747Abstract: The present invention provides a system and method for diagnostics execution in which diagnostics code is stored in a designated partition on a removable nonvolatile memory device, such as a compact flash or a personal computer (PC) card that is interfaced with the motherboard of a file server system. The file server system firmware is programmed in such a manner that, upon receipt of a diagnostics command, a normal boot mechanism is interrupted, and a diagnostics boot is performed. The firmware is programmed to probe the removable nonvolatile memory device, and to load the diagnostics code contained thereon into main memory and to execute the diagnostics in response to an initiation by an operator's key sequence. In accordance with a further aspect of the invention, the data produced as a result of the diagnostics test sequence is captured and stored in a maintenance log in another partition on the compact flash that has been pre-assigned for that purpose.Type: GrantFiled: February 23, 2007Date of Patent: December 18, 2007Assignee: Network Appliance, Inc.Inventors: R. Guy Lauterbach, John Marshal Reed, Michael J. Tuciarone
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Patent number: 7310748Abstract: A memory hub including a memory test bridge circuit for testing memory devices. Test command packets are coupled from a tester to the memory hub responsive to a test clock signal having a test clock frequency. The test bridge circuit generates memory device command, address, and data signals in accordance with the test command packets, and the memory device command, address, and data signals are provided to a memory device under test that is coupled to the memory hub responsive to a memory device clock signal having a memory device clock frequency.Type: GrantFiled: June 4, 2004Date of Patent: December 18, 2007Assignee: Micron Technology, Inc.Inventor: Joseph M. Jeddeloh
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Patent number: 7310749Abstract: When a DEBUG HALT signal is generated in a target processor during a test procedure, a debug halt sync marker is generated in a program counter trace stream. The debug halt sync marker includes a plurality of packets, the packets identifying that the sync marker is the result of a DEBUG HALT signal. The packets also identify the program counter address at the time of the generation of the DEBUG HALT signal and relate the debug halt sync marker to a timing trace stream.Type: GrantFiled: December 5, 2003Date of Patent: December 18, 2007Assignee: Texas Instruments IncorporatedInventors: Gary L. Swoboda, Bryan Thome, Lewis Nardini, Manisha Agarwala
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Patent number: 7310750Abstract: A system and method for enhancing the functionality of a dual opposing ISA/PCI bus alarm card of an industrial computer where the alarm card includes a microserver for communicating with web-enabled information on the host computer.Type: GrantFiled: January 8, 2004Date of Patent: December 18, 2007Assignee: Crystal Group Inc.Inventors: David T. Medin, Matthew J. Poduska, Christopher M. Jensen
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Patent number: 7310751Abstract: A system is disclosed for generating a plurality of timeout event triggers in response to a plurality of kinds of timeout events. The system includes an overflow generator, which generates a plurality of overflow signals having a plurality of periods. The system also includes a plurality of trigger generators corresponding to the plurality of kinds of timeout events. Each of the plurality of trigger generators is associated with a corresponding timeout threshold value representing the minimum amount of time that must elapse for the trigger generator to generate a timeout event trigger. For each of the plurality of timeout triggers, a corresponding selection signal selects one of the plurality of periodic overflow signals. The timeout threshold corresponding to each timeout trigger is equal to the period of the corresponding selected overflow signal multiplied by the value of the corresponding control signal.Type: GrantFiled: February 20, 2004Date of Patent: December 18, 2007Assignee: Hewlett-Packard Development Company, L.P.Inventors: Michael Tayler, Eric Delano