Patents Issued in December 25, 2007
  • Patent number: 7312577
    Abstract: A plasma display panel with first and second substrates facing each other, and address electrodes formed on the second substrate. A partition wall is disposed between the first and the second substrates to separately partition a plurality of discharge cells. A phosphor layer is formed within each discharge cell. Discharge sustain electrodes are formed on the first substrate. A thickness of the phosphor layer is designed so that the resulting internal space has a shape corresponding to the diffusion shape of the plasma discharge generated within the discharge cell to optimize brightness of the image and to maximize light emission efficiency.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: December 25, 2007
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Seok-Gyun Woo, Kyoung-Doo Kang, Woo-Tae Kim, Hun-Suk Yoo, Jae-Ik Kwon
  • Patent number: 7312578
    Abstract: A plasma lighting bulb is disclosed. The plasma lighting bulb includes a bulb emitting light, being formed of a transparent material, and having a plurality of grooves having a predetermined depth formed on a surface of the bulb, and a metal formed in the grooves, wherein a cross-section of the grooves is formed of one of a semicircular shape, a V-shape, and a polygonal shape.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: December 25, 2007
    Assignee: LG Electronics Inc.
    Inventors: Seung Min Lee, Byoung Chul Min, Young Hwan Choi
  • Patent number: 7312579
    Abstract: A Hall-current ion source for generation of low and high energy ion beams with selection of magnetic fields and emission currents, where there are utilized low magnetic fields and high emission currents that are higher than discharge currents for low energy ion beams, 15-100 eV; high magnetic fields and emission currents that are equal to discharge currents are utilized for discharge voltages providing ion beam energies of 100-500 eV. Other measures are utilized for protection of a gas distribution area and a magnet from pinching by an ion beam penetration through a reflector by a buffer chamber providing better gas distribution in anode area, a protective ring in a center part of a reflector, and others.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: December 25, 2007
    Assignee: Colorado Advanced Technology LLC
    Inventor: Viacheslav V. Zhurin
  • Patent number: 7312580
    Abstract: A spacer material is provided for a field emission display (10) with a cathode plate (12) having a plurality of electron emitters (44). An anode plate (14) is disposed to receive electrons emitted by the plurality of electron emitters (44), and includes an anode (26) designed to be connected to a potential source. A plurality of spacers (42) are positioned between the cathode plate (12) and the anode plate (14), the plurality of spacers (42) comprising a material that maintains a positive charge when the anode (26) is connected to the potential source.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: December 25, 2007
    Assignee: Motorola, Inc.
    Inventors: Hao Li, Bernard F. Coll
  • Patent number: 7312581
    Abstract: Light emitting elements with preselected or adjustable impedance characteristics are provided. Embodiments using a preselected impedance characteristic obtain significant performance benefits compared to the prior art. Embodiments having an adjustable impedance may alter the impedance associated with the light emitting component such that it has a substantially constant resistive or reactive impedance that improves certain performance attributes. This solution virtually eliminates the need for external compensation components and relieves the burden of impedance matching and circuit specialization from the driver circuit.
    Type: Grant
    Filed: July 6, 2005
    Date of Patent: December 25, 2007
    Assignee: Linear Technology Corp.
    Inventor: Steven D Roach
  • Patent number: 7312582
    Abstract: An electronic ballast for driving at least one lamp comprising a rectifying circuit operatively connectable to an AC line; a current drawing circuit connected across said rectifying circuit; and an inverter circuit connected to said rectifying circuit that supplies a lamp current to said at least one lamp; wherein said current drawing circuit draws current from said AC line when the instantaneous voltage of said AC line nears zero to reduce the total harmonic distortion of the input current drawn by said ballast.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: December 25, 2007
    Assignee: Lutron Electronics Co., Inc.
    Inventors: Robert C. Newman, Jr., Stuart DeJonge, Mark Taipale, Dominick Travaglini, Joel S. Spira
  • Patent number: 7312583
    Abstract: An apparatus for driving a lamp comprising at least one lamp, an inverter to supply an alternating current signal, a transformer to boost the signal from the inverter and to supply the boosted signal to the lamp, and a safety circuit to detect the signal flowing to the lamp and to compare the signal with a predetermined threshold to shut down the inverter in accordance with the compared result.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: December 25, 2007
    Assignee: LG.Philips Co., Ltd.
    Inventors: Pu Jin Kim, Jae Ho Lee, Yong Kon Lee
  • Patent number: 7312584
    Abstract: A plasma-generation power-supply device includes a transformer connected to an alternating-current power-supply, a rectifier connected to the transformer, an inverter connected to the rectifier, a reactor inserted in series in a power line of an ozonizer that is supplied with power from the inverter, and a controller that controls the inverter. The controller detects the current flowing to the ozonizer with a current detector and provides a control that keeps power applied to the ozonizer constant.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: December 25, 2007
    Assignee: Mitsubishi Electric Corporation
    Inventors: Taichiro Tamita, Akihiko Iwata, Noboru Wada, Shingo Mine, Hajime Nakatani
  • Patent number: 7312585
    Abstract: An electronic ballast system controls one or more ballasts of HID or fluorescent lamps, which are controlled in an “on/off” manner by a ultra low power controller that is isolated for a primary power circuit or derives its very low switch power from the ballast itself. The on/off control provides a near lossless control system. This system may be applied to electronic ballast for operates at fractional power levels corresponding to different lighting intensities and with conventional occupancy sensors. The system may also be applied to other electronically compatible end-use devices and applications.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: December 25, 2007
    Inventor: William George Wilhelm
  • Patent number: 7312586
    Abstract: A high frequency ballast power supply for a high intensity discharge lamp includes a variable frequency voltage generating circuit for producing a regulated cyclical voltage. After ignition of the lamp, the variable frequency voltage generating circuit operates to vary the frequency of the cyclical voltage over the range of frequencies with a maximum frequency of less than or equal to about 375 kHz. A resonant circuit for regulating the power supplied to the lamp is interposed between the variable frequency voltage generating circuit and the lamp.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: December 25, 2007
    Inventor: Charles J. Montante
  • Patent number: 7312587
    Abstract: Two types of rectangular waves having different numbers of driving pulses are applied to the HID bulb. By changing the combination of these two different types of rectangular waves to be supplied , the driving energy of the HID bulb is increased or decreased, thereby supply electric energy to the HID bulb is controlled accurately.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: December 25, 2007
    Assignee: Sanyo Tecnica Co., Ltd.
    Inventor: Kiyoshi Okishima
  • Patent number: 7312588
    Abstract: A ballast (20) for powering one or more gas discharge lamps (70,72,74,76) comprises an inverter (200) and a lamp fault protection circuit (400). Inverter (200) has an operating frequency that is load-dependent. Lamp fault protection circuit (400) monitors an electrical signal within inverter (200). In response to a change in the fundamental frequency of the electrical signal, such as what occurs when a lamp is removed, when a lamp approaches the end of its operating life, or when an arcing condition occurs at one or more of the ballast output connections (302,304,306,308,310), lamp fault protection circuit (400) disables the inverter (200) for a predetermined shutdown period. Lamp fault protection circuit (400) also provides a restart function for periodically attempting to ignite and operate the lamps. Additionally, in response to a sustained fault condition, lamp fault protection circuit (400) increases the predetermined shutdown period so as to minimize any undesirable effects due to the restart function.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: December 25, 2007
    Assignee: Osram Sylvania, Inc.
    Inventors: Qinghong Yu, Joseph L. Parisella
  • Patent number: 7312589
    Abstract: A driver control circuit and method for a cold cathode fluorescent lamp (CCFL), that the driver control circuit comprises: at least a comparator; at least an input/output port, at least an analog-to-digital converter; at least two programmable pulse generators (PPGs), including a first programmable pulse generator and a second programmable pulse generator, i.e. PPG0 and PPG1, being activated for generating pulse signals in an alternative manner for driving the CCFL; at least a programmable frequency divider (PFD), capable of programming the output thereof to be used as the control signal for activating the PPG0 and the PPG1 according to the alternative manner defined by the transition frequency of the PFD.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: December 25, 2007
    Assignee: Holtek Semiconductor
    Inventors: Yuan-Ho Liu, Chun-Hsiung Chen
  • Patent number: 7312590
    Abstract: Control over velocity of a model train may be determined based upon the speed of rotation of a control knob. A processor receives electronic pulses indicating rotation of the knob beyond a predetermined increment of angular distance. The processor calculates the amount of power ultimately conveyed to the model train based not only upon the number of pulses received, but also upon the elapsed time between these pulses. The shorter the elapsed time between pulses, the greater the change in power communicated to the train. Initially, a user can rapidly rotate the knob to attain coarse control over a wide range of velocities, and then rotate the knob more slowly to achieve fine-grained control over the coarse velocity. Utilizing the control scheme in accordance with embodiments of the present invention, in a compact and uninterrupted physical motion, a user can rapidly exercise both coarse and fine control over velocity of a model train.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: December 25, 2007
    Assignee: The Creative Train Company, LLC
    Inventors: Louis G. Kovach, II, Neil P. Young
  • Patent number: 7312591
    Abstract: A powered panel moving system includes a motor, electronic drive circuitry, a mechanism, a coupler, and electronic function circuitry. The drive circuitry drives a rotor of the motor. The coupler couples rotational output of the rotor to the mechanism to drive the mechanism in order to move the panel. The function circuitry is integrated with the drive circuitry for providing additional functionality beyond driving the motor for panel movement. The drive circuitry includes a current sensor for determining rotor position based on motor current, a back emf sensor for determining rotor position based on back emf of the motor, and an impedance sensor for determining rotor position based on motor impedance. The function circuitry may include an analyzer to determine presence of an obstruction to the motion of the panel based on at least one of the rotor position, the motor current, and the back emf of the motor.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: December 25, 2007
    Assignee: NPC Corporation
    Inventors: John M. Washeleski, Stephen R. W. Cooper, Peter H. Strom, Todd R. Newman
  • Patent number: 7312592
    Abstract: An adaptive control system for an electric motor has energization circuitry connected to phase windings of the motor for energization thereof and a controller for generating a control signal corresponding to a profile of an excitation current. The control signal is applied to the energization circuitry to control energization of the phase windings. The energization circuitry provides the excitation current to the phase windings from a power supply. For a present combination of torque and speed, the controller adaptively determine the profile of the excitation current optimal for achieving a particular motor control objective. Excitation current profiles may be optimized to achieve maximum efficiency, maximum torque, minimum torque ripple, minimum core loss, etc.
    Type: Grant
    Filed: April 26, 2004
    Date of Patent: December 25, 2007
    Inventors: Boris A. Maslov, Guohui Yuan
  • Patent number: 7312593
    Abstract: An apparatus for the thermal regulation of an AC drive for providing power to a motor includes a temperature sensor producing a signal indicative of temperature, a heater resistor connectable across a DC link of the AC drive, and a first switch. A controller is operable to monitor the temperature signal and control the first switch to provide power via the DC link to the heater resistor if the sensed temperature is below a predetermined setpoint.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: December 25, 2007
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: John T. Streicher, Steven J. Perreault, Jeffrey P. Rivard, David W. Siegler
  • Patent number: 7312594
    Abstract: A control system for a synchronous machine including a converter for converting DC voltage to AC voltage or AC voltage to DC voltage. The synchronous machine is driven by the converter. The control system further includes a magnetic pole position presuming device for performing a presuming operation to presume a magnetic pole position of the synchronous machine based on high-frequency components of a voltage applied to the synchronous machine and a current flowing into the synchronous machine, and a control device for controlling the converter based on the magnetic pole position presumed by the magnetic pole position presuming device. The control device controls the converter so as to contain significant high-frequency components in the voltage or the current used in the presuming operation when a mean voltage or a mean current output from the converter is spatially in a region close to a straight line containing starting and ending points of non-zero voltage vector output from the converter.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: December 25, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Yasui, Kazuaki Yuuki, Kentaro Suzuki, Katsumi Maekawa, Shouji Onda
  • Patent number: 7312595
    Abstract: Presence/absence of a failure in a feedback control system of a motor is monitored. When a failure is detected in the feedback control system, the motor is driven by switching to an open-loop control. During the open-loop control, the motor is rotated by sequentially switching the motor current supply phase without feeding back encoder count information. The position count is incremented or decremented every time the current supply phase is switched. When the position count has reached a target count, it is determined that the rotor has reached a target position, whereupon the open-loop control is finished.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: December 25, 2007
    Assignee: Denso Corporation
    Inventors: Shigeru Kamio, Kenichi Fujiki
  • Patent number: 7312596
    Abstract: A device and a method are provided for equalizing the charge of the capacitors belonging to a double layer capacitor. The device includes an individual transformer associated with each individual capacitor and a flyback transformer or a spool, from which the energy is transferred, via the individual transformers, to the individual transformer, by the respective low charge. Conclusions on the state of the double layer capacitor and the charge-equalizing switch are derived from the measured charging time and discharging time of the flyback transformer.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: December 25, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventors: Stephan Bolz, Martin Götzenberger, Rainer Knorr, Günter Lugert
  • Patent number: 7312597
    Abstract: An actuation circuit is provided for a switch controlling the power consumption in a switch-mode converter which has input terminals for applying an input voltage and output terminals for providing an output voltage. The actuation circuit comprises a first input for supplying a voltage measurement signal which is dependent on the output voltage, an error signal generation circuit which generates an error signal by comparing the voltage measurement signal with a reference signal, a filter arrangement which is supplied with the error signal and which generates a first control signal, and an actuation signal generation circuit which is supplied with the first control signal and which provides an actuation signal for the switch on the basis of the first control signal.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: December 25, 2007
    Assignee: Infineon Technologies AG
    Inventors: Marc Fahlenkamp, Martin Feldtkeller
  • Patent number: 7312598
    Abstract: A low drop out (LDO) regulator that includes a novel error amplifier, which is arranged with a first stage that employs both NMOS and PMOS devices that are similarly doped in differential pairs and a second stage that operates with NMOS and PMOS devices in a push-pull arrangement. In addition to the error amplifier, the LDO regulator can also include a startup circuit coupled to an enable voltage, a reference filter circuit coupled to a reference voltage, an output circuit, a quiescent current control circuit, and a pulse generator circuit. Also, an internal RC network is provided to compensate for phase shift. The integrated operation of the components of the regulator enables stable and fast operation of an LDO regulator with no external capacitors connected to the input or output terminals.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: December 25, 2007
    Assignee: National Semiconductor Corporation
    Inventor: Shengming Huang
  • Patent number: 7312599
    Abstract: A buck converter includes a first transistor, a second transistor, a filter circuit, a capacitor and a switch. The first transistor has a drain for receiving a first DC voltage, a gate for receiving a first control signal, and a source coupled to a node. The second transistor has a drain coupled to the node, a gate for receiving a second control signal, and a source coupled to a constant voltage. The filter circuit is electrically coupled to the node for outputting a second DC voltage. The switch has a first terminal electrically coupled to the gate of the second transistor via the capacitor, a second terminal electrically coupled to the source of the second transistor, and a control terminal for receiving the first control signal. The switch has a faster switching speed than the first transistor.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: December 25, 2007
    Assignee: Quanta Computer Inc.
    Inventors: Yung-Lu Wu, Wen-Chun Shen, Chien-Yao Chen
  • Patent number: 7312600
    Abstract: An electronic control system regulates and stabilizes AC line voltage to produce a constant AC voltage output. A switch-mode regulator circuit is employed in conjunction with a variable amplitude regulator to combine a feed-forward control with a variable amplitude regulator interface to achieve continuous real time response.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: December 25, 2007
    Inventor: Robert Fisher
  • Patent number: 7312601
    Abstract: A circuit includes a current generator, a start-up circuit coupled to provide a start-up current to the current generator during a start-up phase of the current generator, and a cut-off circuit coupled to both the current generator and to the start-up circuit to provide a control signal that reduces the start-up current when an output current from the current generator exceeds a threshold value.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: December 25, 2007
    Assignee: STMicroelectronics KK
    Inventor: Masaaki Mihara
  • Patent number: 7312602
    Abstract: An electrical meter 10 comprises a housing 12 with a spool 14 rotatably mounted therein. A first lead cable 16 and a second lead cable 18 are wound upon the spool 14. A wound spring 90 is connected to the spool and biases the spool against rotation in a direction that allows the lead cables to be unwound. A first head 20 and a second head 22 are respectively included on the end of the first lead cable 16 and the second lead cable 18. The heads abut against the housing and prevent the lead cables from being completely wound upon the spool when the meter is not in use. A circuit board 30 with electrical measurement circuitry is also mounted within the housing 12. The circuit board is electrically connected to a display 40 positioned on the outside of the housing 12.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: December 25, 2007
    Inventor: Paul Hoopengarner
  • Patent number: 7312603
    Abstract: A current clamp meter having a current meter body and a detachable current clamp. The current meter body and the current clamp are configured so that the current clamp is detachable from the current meter body and the meter is operable with the current clamp either attached to the current meter body or detached from the current meter body.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: December 25, 2007
    Assignee: Fluke Corporation
    Inventors: Shounan Luo, Wang Yong
  • Patent number: 7312604
    Abstract: This invention provides a manipulator for positioning a test head relative to a prober or other reference. The manipulator has a frame; a linkage coupled to the frame and including first and second links having freedom of rotation about respective pivots and a third link coupled to the first and second links such that the third link has translational and rotational degrees of freedom of movement; and an adaptor coupled to the third link and configured to attach to a test head. The invention also provides a method of controlling the manipulator.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: December 25, 2007
    Assignee: Nextest Systems Corporation
    Inventors: Paul Trudeau, Michael Caradonna
  • Patent number: 7312605
    Abstract: An AC power supply testing method upon booting a main board is provided. The testing method is applied to a main board, a microprocessor is in connection with the main board, and a relay is connected with the microprocessor, an AC power supply and a system power supply of the main board. The testing method includes steps of (1) configuring a system power on/off time of the microprocessor; (2) counting down the system power on/off time; (3) determining the current state of the relay; (4) shutting off the relay and resuming executing step (1) if the current state is ON; and (5) executing a power supply testing upon booting if the current state is OFF.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: December 25, 2007
    Assignee: Lite-On Technology Corp.
    Inventors: Kun Sheng Chang, Pao Jen Chen, Anpang Hsieh, Li An Huang
  • Patent number: 7312606
    Abstract: A method for detecting an abnormal condition of a MOS transistor in a subthreshold region. The method includes measuring a variation in a drain current with respect to a variation of a gate voltage of the MOS transistor to obtain a characteristics curve, and calculating, with reference to the obtained characteristics curve, a variation of transconductance with respect to each of the gate voltages to obtain a transconductance variable curve. The transconductance variable curve is differentiated. A number of inflection points in a curve obtained by the differentiation is determined to indicate the abnormal condition of the MOS transistor.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: December 25, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Chang Soo Jang
  • Patent number: 7312607
    Abstract: At least one measurement coil of an eddy current part inspection system is oriented relative to a track surface so that the longitudinal axis of the magnetic field generated by the at least one measurement coil is skewed relative to the track surface so as to be substantially aligned with the longitudinal axis of a part on the track surface which can move thereon through the at least one measurement coil.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: December 25, 2007
    Assignee: General Inspection LLC
    Inventor: George Nygaard
  • Patent number: 7312608
    Abstract: Systems and methods for inspecting electrical conductivity in composite materials having conductive structures are disclosed. In one embodiment, a system of inspecting electrical conductivity in an electrical bonding region includes a coil coupled to an alternating current source that is configured to induce a current in a conductive structure within the region. A processor is coupled to the coil that is operable to detect an impedance property value from the coil that results from the current induced in the conductive structure.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: December 25, 2007
    Assignee: The Boeing Company
    Inventors: Gary E. Georgeson, Joseph L. Hafenrichter, Everett A. Westerman
  • Patent number: 7312609
    Abstract: A GMR sensor element is proposed, having a rotationally symmetrical positioning of especially eight GMR resistor elements which are connected to each other to form two Wheatstone's full bridges. This GMR sensor element is especially suitable for use in an angle sensor for the detection of the absolute position of the camshaft or the crankshaft in a motor vehicle, particularly in the case of a camshaft-free engine having electrical or electrohydraulic valve timing, of a motor position of an electrically commutated motor, or of detection of a windshield wiper position, or in the steering angle sensor system in motor vehicles.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: December 25, 2007
    Assignee: Robert Bosch GmbH
    Inventors: Peter Schmollngruber, Ingo Herrmann, Henrik Siegle, Hartmut Kittel, Paul Farber, Ulrich May
  • Patent number: 7312610
    Abstract: In a method for magnetic resonance data acquisition from an examination region, that is larger than a maximum acquisition region of the magnetic resonance apparatus, a planning data set is generated and that is used to establish the examination region and the examination region is automatically separated into a number of acquisition regions by a computer. Each of the acquisition regions is limited in terms of its dimensions by the maximum acquisition region. A measurement protocol is created that includes parameters that are applicable for all acquisition regions and parameters applicable specifically for only one acquisition region. The acquisition regions are automatically positioned in series within the maximum acquisition volume with the measurement protocol in order to generate a measurement data set for each acquisition region. The measurement data sets are subsequently combined.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: December 25, 2007
    Assignee: Siemens Aktiengesellschaft
    Inventor: Martin Harder
  • Patent number: 7312611
    Abstract: The present invention provides an on-chip packed reactor bed design that allows for an effective exchange of packing materials such as beads at a miniaturized level. In accordance with the present invention, there is provided a method of concentrating an analyte within a microfluidic analysis system, comprising the steps of: a) providing a main channel having a trapping zone suitable for trapping packing material; b) providing a slurry of a reagent treated packing material prepared in a solution having a predetermined composition of a solvent; c) inducing a flow of said packing material into said trapping zone through a flow channel connected to said trapping zone so as to load said trapping zone and form a packed bed of said packing material; d) and flowing a sample containing analytes through said packed bed, said reagent acting to concentrate at least some of said analytes within said trapping zone.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: December 25, 2007
    Assignee: The Governors of the University of Alberta
    Inventors: D. Jed Harrison, Richard Oleschuk, Loranelle Shultz-Lockyear, Cameron Skinner, Paul Li
  • Patent number: 7312612
    Abstract: A circuit for detecting an electric current by which a loss portion of a forward current caused by a backward leakage current of a diode generated by the influence of temperature increase can be compensated such that error in the peak value of a load current detected by surrounding high temperature can be minimized, and reliability can be increased for electric instruments that call for an accurate control of the load current and that generate a high temperature such as induction heating cookers, induction heaters and the like.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: December 25, 2007
    Inventor: Yong Jai Kwon
  • Patent number: 7312613
    Abstract: A method for network diagnosis between a source end and a destination end coupled by a transmission line is provided. The method includes the following steps. First, a first test signal is transmitted from the transmitter to the receiver when the hybrid is set to a first mode. Next, a plurality of first coefficients are extracted from the first test signal received by the canceller during a first period, wherein each one of the first coefficients has an index corresponding to a received order. And then, the hybrid is switched to a second mode to generate a second test signal by sending an original signal to the receiver and the destination. Sequentially, a plurality of second coefficients are extracted from the second test signal received by the canceller during a second period, wherein each one of the second coefficients has an index corresponding to a received order. Therefore, a first index is determined when an absolute value of one of the first coefficients substantially exceeds a first threshold value.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: December 25, 2007
    Assignee: Via Technologies, Inc.
    Inventors: Tien-Hui Chen, Yi-Hua Lai
  • Patent number: 7312614
    Abstract: A commutator for power supply testing includes a printed circuit board (PCB), a plurality of connectors soldered on the PCB and coupling a power supply with an electronic load, a plurality of indicator light showing whether the power supply coupled to the commutator is working, and a switch circuit. The connectors are used to couple a power supply with an electronic load. The switch circuit controls a flow of current from the power supply to the electronic load.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: December 25, 2007
    Assignees: Hong Fu Jin Precision Indusrty (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Min Peng
  • Patent number: 7312615
    Abstract: A Force/Torque (FT) sensor includes memory for storing calibration data associated with the FT sensor. Force and torque analog signals are output to a data acquisition (DAQ) system. The digital calibration data is output to the DAQ system as a digital bitstream comprising a series of predetermined voltage levels driven for predetermined durations. The DAQ system interprets the series of voltage levels on the calibration input as a digital bitstream, receives and quantizes the force/torque signals, and calibrates the force/torque signals using the calibration data. Alternatively, the calibration signals may be routed to a standard serial port on the DAQ system. For small form factor FT sensors, the calibration data may be stored in an associated power supply unit.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: December 25, 2007
    Assignee: ATI Industrial Automation, Inc.
    Inventor: Dwayne Perry
  • Patent number: 7312616
    Abstract: A capacitance measurement circuit includes a current source, a switch, and a comparator. The current source is coupled to drive a current through a circuit node. The switch is coupled to the circuit node to switch the current into a device under test (“DUT”) capacitor. The comparator includes first and second input ports. The comparator is coupled to compare a first voltage received on the first input port against a reference voltage received on the second input port. The first voltage is related to the current driven through the circuit node, a frequency at which the switch is switched, and a capacitance of the DUT capacitor.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: December 25, 2007
    Assignee: Cypress Semiconductor Corporation
    Inventor: Warren S. Snyder
  • Patent number: 7312617
    Abstract: Method and apparatus for electrical testing of a device under test (DUT) that employs a connection board with signal contacts for applying test signals and a space transformer that has low pitch contacts arranged on one or more circumferential shelves that define an enclosure in the space transformer. The apparatus has a substrate with fine pitch contacts positioned such that these are within the enclosure. A set of wire bonds is used for pitch reduction by interconnecting the fine pitch contacts with the low pitch contacts arranged on the shelves. The probes are connected to the fine pitch contacts and are used to apply the test signals to a DUT by contacting its pads. In some embodiments, the fine pitch contacts may be embodied by plugs or by blind metal vias.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: December 25, 2007
    Assignee: MicroProbe, Inc.
    Inventor: January Kister
  • Patent number: 7312618
    Abstract: A method and system for compensating for thermally induced motion of probe cards used in testing die on a wafer are disclosed. A probe card incorporating temperature control devices to maintain a uniform temperature throughout the thickness of the probe card is disclosed. A probe card incorporating bi-material stiffening elements which respond to changes in temperature in such a way as to counteract thermally induced motion of the probe card is disclosed including rolling elements, slots and lubrication. Various means for allowing radial expansion of a probe card to prevent thermally induced movement of the probe card is disclosed. A method for detecting thermally induced movement of the probe card and moving the wafer to compensate is also disclosed.
    Type: Grant
    Filed: July 3, 2006
    Date of Patent: December 25, 2007
    Assignee: FormFactor, Inc.
    Inventors: Benjamin N. Eldridge, Gary W. Grube, Ken S. Matsubayashi, Richard A. Larder, Makarand S. Shinde, Gaetan L. Mathieu
  • Patent number: 7312619
    Abstract: A local probe measuring device is provided for effecting local measurements of a sample. This device includes first and second local probes for local measurements with respect to a sample or a reference surface. A measurement condition adjustment arrangement is adapted to commonly adjust first and second measurement conditions of the respective first and second local probes with respect to the sample or the reference surface. A detection arrangement is provided that includes a first detection arrangement associated with the first local probe adapted to independently detect first measurement data referring to local measurements reflected by first local probe and a second detection arrangement associated with the second local probe adapted to independently detect second measurement data referring to local measurements effected by second local probe. Further, methods for effecting local measurements and local manipulations using multiple local probes are provided.
    Type: Grant
    Filed: July 17, 2006
    Date of Patent: December 25, 2007
    Assignee: Europaisches Laboratorium fur Molekularbiologie (EMBL)
    Inventors: Stephan Maxmilian Altmann, Johann Karl Heinrich Hörber
  • Patent number: 7312620
    Abstract: An integrated circuit (IC) package testing apparatus integrates a temperature sensor, heater (or cooler), and controller within a single modular unit. The controller is a microprocessor embedded within the modular unit and in communication with the sensor and heater. The controller allows a selected testing temperature to be input by a user via a communications link to the controller. Each IC package has its testing temperature individually controlled by a controller. The module is easily attached and removed from an open-top socket through the use of latches on the testing socket. Many IC packages can be quickly placed and removed from testing sockets when a matrix of sensors and heaters (or coolers) are located on a single top attach plate with the sensors and heaters (or coolers) individually spring-loaded on the single top attach plate.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: December 25, 2007
    Assignee: Wells-CTI, LLC
    Inventors: Christopher A. Lopez, Brian J. Denheyer, Gordon B. Kuenster
  • Patent number: 7312621
    Abstract: A semiconductor test unit comprises a test circuit for inputting/outputting a test signal to/from an examined electronic product, a test signal wiring electrically connected to the test circuit, a contact board electrically connected to an electrode of the examined electronic product and provided with an electrically conductive via to which the test signal is transmitted, a multilayer circuit board electrically connected to the conductive via and the test signal wiring, located under the bottom face of the contact board, and provided with at least one through-hole, and a vacuum attachment mechanism for attaching thereto and holding the examined electronic product, the contact board, and the multilayer circuit board by vacuum. The contact board is made of an insulative material, has top and bottom faces, and is provided with at least one through-hole.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: December 25, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Yamaguchi, Yoshiaki Sugizaki, Hideo Aoki, Toshiro Hiraoka, Yasuyuki Hotta, Shigeru Matake, Misa Sawanobori
  • Patent number: 7312622
    Abstract: Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer's scribe regions; 3) on-wafer test wiring that can be scribed and yet thwart the spread of contamination into the product die; 4) an RFID tag design that allows for on-wafer testing without imposing substantial semiconductor surface area penalty; 5) an RFID tag design that includes built-in self test (BIST) circuitry for the RFID tag's non-volatile memory.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: December 25, 2007
    Assignee: Impinj, Inc.
    Inventors: John D. Hyde, Robert M. Glidden, Andrew Edward Horch, Jay A. Kuhn, Ronald A. Oliver
  • Patent number: 7312623
    Abstract: A method, system, and apparatus for testing one or more micro-magnetic switches on a wafer is described. A magnet is positioned adjacent to a first switch on the wafer. A probe card is positioned adjacent to the first switch. The probe card mounts a first set of probes and a second set of probes. The first set of probes interface with contact areas of a coil associated with the first switch. The second set of probes interface with conductors on the wafer associated with the cantilever of the first switch. A current source is electrically coupled to the first set of probes. The current source activates the coil of the first switch using the first set of probes to switch the cantilever from a first state to a second state. A switch state monitor is electrically coupled to the second set of probes. The switch state monitor determines whether the cantilever of the first switch is in the first state prior to the current source activating the coil of the first switch.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: December 25, 2007
    Assignee: Schneider Electric Industries SAS
    Inventors: Cheng Ping Wei, Jun Shen
  • Patent number: 7312624
    Abstract: A substrate for an electro-optical device includes amplifiers each has a first node and a second node, the first node connected to a signal line and being input with a first potential signal, the second node being input with a second potential signal, each amplifier outputting signals such that the potential of the first node is further decreased when the first potential signal is low, and the potential of the first node is further increased when the first potential signal is high. At least two signal lines correspond to at least one of the first and second nodes. A selection unit that selects one signal line. A connection unit connect the selected signal line to at least one of the first and second nodes.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: December 25, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Tatsuya Ishii
  • Patent number: 7312625
    Abstract: A test circuit for fabrication of transistors for Very Large Scale Integration (“VLSI”) processing and method of use thereof are described. Transistors are formed in an array. A first decoder is coupled to gates of the transistors and configured to selectively pass voltage to the gates. A second decoder is coupled to drain regions of the transistors and configured to selectively pass voltage to the drain regions of the transistors. A third decoder is coupled to source regions of the transistors and configured to selectively pass voltage to the source regions of the transistors. A fourth decoder is coupled to body regions of the transistors and configured to selectively pass voltage to the body regions of the transistors.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: December 25, 2007
    Assignee: Xilinx, Inc.
    Inventors: Sunhom Paak, Hsung Jai Im, Boon Yong Ang, Jan L. de Jong
  • Patent number: 7312626
    Abstract: Various circuit embodiments comprise an input node to receive an input signal for a CMOS transistor stack, a first output node to deliver the input signal to a PMOS pull-up transistor of the CMOS transistor stack, and a second output node to deliver the input signal to an NMOS pull-down transistor of the CMOS transistor stack. A first passive signal path between the input node and the first output node is adapted to pass an effective rising edge of the input signal and delay an effective falling edge of the input signal to a gate of the PMOS transistor. A second passive signal path between the input node and the second output node is adapted to delay the effective rising edge of the input signal and pass the effective falling edge of the input signal to a gate of the NMOS transistor. Other aspects and embodiments are provided herein.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: December 25, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Leonard Forbes