Patents Issued in February 19, 2008
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Patent number: 7332421Abstract: A method of forming a gate electrode of a semiconductor device includes forming a damascene pattern for fabricating a metal electrode on an upper part of a poly silicon gate so as to prevent a metal electrode from being oxidized when the poly silicon electrode and the metal electrode are formed simultaneously. The method of forming the gate electrode of the semiconductor device includes the steps of forming a gate including poly silicon with a plurality of layers at an upper part of a silicon substrate, forming a spacer on a sidewall of the gate, vapor depositing inter layer dielectric between gates at the upper part of the substrate, forming a damascene pattern to which a metal electrode is formed, and completing the gate electrode including poly silicon and metal by filling the damascene pattern with a predetermined metal and planarizing the metal.Type: GrantFiled: December 30, 2004Date of Patent: February 19, 2008Assignee: Dongbu Electronics Co., Ltd.Inventor: Yeong Sil Kim
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Patent number: 7332422Abstract: A method for cleaning a copper interconnect after a chemical-mechanical polishing that comprises: a) treating the surface of said copper interconnect with a nitrogen and oxygen containing treatment; and b) without breaking vacuum, treating the copper interconnect with a NH3 or H2 plasma treatment. Next a cap layer is formed over the copper interconnect.Type: GrantFiled: January 5, 2005Date of Patent: February 19, 2008Assignee: Chartered Semiconductor Manufacturing, Ltd.Inventors: Wei Lu, Loh Nah Luona Goh, Liang Choo Hsia
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Patent number: 7332423Abstract: One example electronic assembly includes a substrate that has a plurality of contacts which become bonded to a plurality of contacts on a die. The electronic assembly further includes a male member that extends from at least one of the substrate and the die and a female member that extends from the other of the substrate and the die. The male member is inserted into the female member to align the die relative to the substrate. The male member and the female member may have any configuration as long as one or more portions of the male member extend partially, or wholly, into the female member. An example method includes aligning a die relative to a substrate by inserting a male member that extends from one of the die and the substrate into a female member that extends from the other of the die and the substrate.Type: GrantFiled: June 29, 2005Date of Patent: February 19, 2008Assignee: Intel CorporationInventors: Robert Starkston, Sridhar Narasimhan, Chia-Pin Chiu, Suzana Prstic, Patrick N Stover, Hong Xie
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Patent number: 7332424Abstract: Disclosed is a new process that permits the transfer and reflow of solder features produced by Injection Molded Solder (IMS) from a mold plate to a solder receiving substrate without the use of flux. Several embodiments produce solder transfer and reflow separately or together and use either formic acid vapor or partial concentration of hydrogen, both in nitrogen, as the oxide reducing atmosphere. A final embodiment produces fluxless transfer and reflow in only nitrogen through the use of ultrasonic vibration between the solder filled mold plate and solder receiving substrate.Type: GrantFiled: February 1, 2005Date of Patent: February 19, 2008Assignee: International Business Machines CorporationInventors: Luc Bélanger, Peter A. Gruber, Valérie Oberson, Christopher L. Tessler
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Patent number: 7332425Abstract: The present invention provides a method of forming a interconnect barrier layer 100. In the method, physical vapor deposition of barrier material 200 is performed within an opening 140 located in a dielectric layer 135 of a substrate 110. RF plasma etching of the barrier material 200 that is deposited in the opening 140 occurs simultaneously with conducting the physical vapor deposition of the barrier material 200.Type: GrantFiled: May 11, 2005Date of Patent: February 19, 2008Assignee: Texas Instruments IncorporatedInventors: Asad M. Haider, Alfred J. Griffin, Jr., Kelly J. Taylor
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Patent number: 7332426Abstract: A method of fabricating a semiconductor device includes the steps of forming a via-hole in an interlayer insulation film such that a metal interconnection pattern formed underneath the interlayer insulation film is exposed at a bottom of the via-hole, forming a conductive barrier film on the interlayer insulation film so as to cover a sidewall surface of the via-hole and the exposed metal interconnection pattern in conformity with a shape of the via-hole. and forming a metal film on the conductive barrier film, wherein there is provided a preprocessing step, after the step of forming the via-hole but before the step of forming the conductive barrier film, of processing the interlayer insulation film including the sidewall surface of the via-hole and a bottom surface of the via-hole, with plasma containing hydrogen having energy not causing sputtering of the metal interconnection pattern.Type: GrantFiled: June 2, 2005Date of Patent: February 19, 2008Assignee: Tokyo Electron LimitedInventors: Taro Ikeda, Tadahiro Ishizaka, Masamichi Hara
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Patent number: 7332427Abstract: A method of forming an interconnection line in a semiconductor device includes forming an interlayer insulating layer on an underlying layer having a lower conductive layer, patterning the interlayer insulating layer to form an opening exposing the lower conductive layer, forming an additional material layer conformally on the underlying layer including the opening, anisotropically etching the additional material layer to form an opening spacer covering a sidewall of the opening, performing a wet etch process using the opening spacer as an etch mask, forming a conductive layer pattern in the opening, and performing a heat treatment on the opening spacer.Type: GrantFiled: December 27, 2004Date of Patent: February 19, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: Kye-Hee Yeom
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Patent number: 7332428Abstract: In a method of fabricating a semiconductor device, a dielectric layer is formed over a conductive region. A dual damascene structure including a trench and a via is formed within the dielectric layer. A liner is formed over the dual damascene structure. The liner is selectively removed from above the upper surface of the conductive region to expose the upper surface of the conductive region. After the selectively removing process, at least a portion of the liner remains over the lower surface of the trench and the sidewalls of the trench and the via hole. A wet etch can then be performed to etch a recess in the conductive region. A conductive material is then formed within the damascene structure. This conductive material physically contacts the conductive region and is separated from the dielectric layer by the remaining portion of the liner.Type: GrantFiled: February 28, 2005Date of Patent: February 19, 2008Assignee: Infineon Technologies AGInventor: Michael Beck
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Patent number: 7332429Abstract: In some embodiments, laser ablation and imprinting hybrid processing for fabrication of high density interconnect flip chip substrates are presented. In this regard, a substrate in introduced having a dielectric layer wherein material has been removed from a surface and the cavity has been plated with conductive material resulting in a feature width of less than about 10 micrometers. Other embodiments are also disclosed and claimed.Type: GrantFiled: December 27, 2005Date of Patent: February 19, 2008Assignee: Intel CorporationInventor: Stefanie M. Lotz
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Patent number: 7332430Abstract: The invention relates to a method for improving the mechanical properties of BOC module arrangements in which chips have 3D structures, solder balls, ? springs or soft bumps which are mechanically and electrically connected by means of solder connections to terminal contacts on a printed circuit board or leadframe. Advantages are achieved by providing a casting compound for the wafer or the chips after they have been individually separated and before they are mounted on the printed circuit board in such a way that the tips of the 3D structures protrude from this compound. The casting compound preferably has elastic and mechanical properties comparable to those of silicon.Type: GrantFiled: April 16, 2004Date of Patent: February 19, 2008Assignee: Infineon Technologies AGInventors: Axel Brintzinger, Octavio Trovarelli
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Patent number: 7332431Abstract: In a semiconductor device having a semiconductor film crystallized by using a metal element, it is an object to provide a technique for reducing the crystal defects in a semiconductor film, and a technique for forming a semiconductor film with high crystallinity by effectively removing impurity metal elements. An amorphous semiconductor film is formed over a transparent substrate; the amorphous semiconductor film is crystallized by using metal elements; a crystalline semiconductor film is irradiated with a first laser beam in a direction from the semiconductor film to the substrate, thereby partly melted and crystallized; and the semiconductor film is irradiated with a second laser beam through the substrate in a direction from the substrate film to the semiconductor film.Type: GrantFiled: October 16, 2003Date of Patent: February 19, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shinji Maekawa
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Patent number: 7332432Abstract: As a semiconductor device, specifically, a pixel portion included in a semiconductor device is made to have higher precision and higher aperture ratio, it is required to form a smaller wiring in width. In the case of forming a wiring by using an ink-jet method, a dot spreads on a wiring formation surface, and it is difficult to narrow width of a wiring. In the present invention, a photocatalytic substance typified by TiO2 is formed on a wiring formation surface, and a wiring is formed by utilizing photocatalytic activity of the photocatalytic substance. According to the present invention, a narrower wiring, that is, a smaller wiring in width than a diameter of a dot formed by an ink-jet method can be formed.Type: GrantFiled: September 22, 2004Date of Patent: February 19, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Osamu Nakamura, Kiyofumi Ogino
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Patent number: 7332433Abstract: Methods for fabricating two metal gate stacks with varying work functions for complementary metal oxide semiconductor (CMOS) devices are provided A first metal layer may be deposited onto a gate dielectric, followed by the deposition of a second metal layer, where the second metal layer modulated the work function of the first metal layer. The second metal layer and subsequently etch, exposing a portion of the first metal layer. A third metal layer may be deposited on the etched second metal layer and the exposed first metal layer, where the third metal layer may modulate the work function of the exposed first metal layer. Subsequent fabrication techniques may be used to define the gate stack.Type: GrantFiled: September 22, 2005Date of Patent: February 19, 2008Assignee: Sematech Inc.Inventors: Kisik Choi, Husam Alshareef, Prashant Majhi
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Patent number: 7332434Abstract: A semiconductor device is provided which is capable of preventing a constitutional material of a diffusion barrier layer from diffusing into a bottom electrode during a high thermal process and of preventing an increase in contact resistance of a contact plug by suppressing mutual diffusions of the constitutional material of the diffusion barrier layer and the contact plug and a method for fabricating the same. The semiconductor device includes a bottom electrode of a capacitor connecting to a substrate through a contact plug; a first diffusion barrier layer disposed on the contact plug, wherein the first diffusion barrier contains Cr therein for preventing mutual diffusions between the bottom electrode and the contact plug; and a second diffusion barrier on the first diffusion barrier for preventing the Cr in the first diffusion layer from diffusing into the bottom electrode; a dielectric layer disposed on the bottom electrode and a top electrode disposed on the dielectric layer.Type: GrantFiled: August 2, 2006Date of Patent: February 19, 2008Assignee: Hynix Semiconductor Inc.Inventor: Suk-Kyoung Hong
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Patent number: 7332435Abstract: A method of forming a semiconductor device comprising: forming a gate dielectric layer over a channel region; forming a gate electrode on the gate dielectric layer; forming source/drain regions substantially aligned with respective edges of the gate electrode with the channel region therebetween; forming a thin metal layer on the source/drain regions; forming a metal alloy layer on the thin metal layer; and transforming the thin metal layer into a low resistance metal silicide.Type: GrantFiled: March 4, 2005Date of Patent: February 19, 2008Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsueh Shih, Shih-Wei Chou, Hung-Wen Su, Minghsing Tsai
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Patent number: 7332436Abstract: A composition which includes liquid or supercritical carbon dioxide and an acid having a pKa of less than about 4. The composition is employed in a process of removing residue from a precision surface, such as a semiconductor sample, in which the precision surface is contacted with the composition under thermodynamic conditions consistent with the retention of the liquid or supercritical carbon dioxide in the liquid or supercritical state.Type: GrantFiled: October 15, 2004Date of Patent: February 19, 2008Assignee: International Business Machines CorporationInventors: John Michael Cotte, Dario L. Goldfarb, Pamela Jones, Kenneth John McCullough, Wayne Martin Moreau, Keith R. Pope, John P. Simons, Charles J. Taft
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Patent number: 7332437Abstract: There is provided a method for processing a semiconductor wafer subjected to a chamfering process, a lapping process, an etching process, and a mirror-polishing process, wherein acid etching is performed after alkaline etching as the etching process, and the acid etching is performed with an acid etchant composed of hydrofluoric acid, nitric acid, phosphoric acid, and water, a method for processing a semiconductor wafer subjected to a chamfering process, a surface grinding process, an etching process, and a mirror-polishing process, wherein the etching process is performed as described above, and a method for processing a semiconductor wafer subjected to a flattening process, an etching process, and a mirror-polishing process, wherein the etching process is performed as described above, a back surface polishing process is performed after the acid etching as the mirror-polishing process, and then a front surface polishing process is performed.Type: GrantFiled: June 25, 2001Date of Patent: February 19, 2008Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Takashi Nihonmatsu, Masahiko Yoshida, Yoshinori Sasaki, Masahito Saitoh, Toshiaki Takaku, Tadahiro Kato
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Patent number: 7332438Abstract: Methods and systems for monitoring a parameter of a measurement device during polishing, damage to a specimen during polishing, a characteristic of a polishing pad, or a characteristic of a polishing tool are provided. One method includes scanning a specimen with a measurement device during polishing of a specimen to generate output signals at measurement spots on the specimen. The method also includes determining if the output signals are outside of a range of output signals. Output signals outside of the range may indicate that a parameter of the measurement device is out of control limits. In a different embodiment, output signals outside of the range may indicate damage to the specimen. Another method includes scanning a polishing pad with a measurement device to generate output signals at measurement spots on the polishing pad. The method also includes determining a characteristic of the polishing pad from the output signals.Type: GrantFiled: February 14, 2006Date of Patent: February 19, 2008Assignee: KLA-Tencor Technologies Corp.Inventors: Kurt Lehman, Charles Chen, Ronald L. Allen, Robert Shinagawa, Anantha Sethuraman, Christopher F. Bevis, Thanassis Trikas, Haiguang Chen, Ching Ling Meng
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Patent number: 7332439Abstract: An MOS transistor formed on a heavily doped substrate is described. Metal gates are used in low temperature processing to prevent doping from the substrate from diffusing into the channel region of the transistor.Type: GrantFiled: September 29, 2004Date of Patent: February 19, 2008Assignee: Intel CorporationInventors: Nick Lindert, Justin K. Brask, Andrew Westmeyer
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Patent number: 7332440Abstract: A wet etching apparatus and method to shorten processing time and to eliminate formation of unintended mask pattern are described. In the conventional art, after a mask pattern is formed, alien substances such as water mist or stain are left on the substrate. The alien substances act as an etching block in the wet etching process. This generates an unintended mask pattern. The present invention uses ultraviolet light to remove the alien substances prior to the etching process. When the alien substances are removed, the intended mask pattern is generated after the etching process. The wet etching device according to the present invention includes an ultraviolet cleaner and a conveyor to convey substrates to and from the ultraviolet cleaner. Spaces for the ultraviolet cleaner and the conveyor are created in the wet etching apparatus by reducing space for cassettes and reducing space required by the loader.Type: GrantFiled: June 24, 2004Date of Patent: February 19, 2008Assignee: LG.Philips LCD Co., Ltd.Inventors: Soon Ho Choi, Jae Hyeob Seo
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Patent number: 7332441Abstract: A method is disclosed for stabilizing porous silicon. A porous silicon structure having a surface terminated with hydrogen atoms is subjected to organic thermal processing to substitute the hydrogen atoms with a protective organic layer. The resulting structures are found to have unprecedented stability.Type: GrantFiled: April 23, 2004Date of Patent: February 19, 2008Assignee: National Research Council of CanadaInventors: Rabah Boukherroub, Danial D. M. Wayner, David J. Lockwood, Sylvie Morin
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Patent number: 7332442Abstract: A method of forming (and apparatus for forming) a metal oxide layer, preferably a dielectric layer, on a substrate, particularly a semiconductor substrate or substrate assembly, using a vapor deposition process and ozone with one or more metal organo-amine precursor compounds.Type: GrantFiled: July 12, 2006Date of Patent: February 19, 2008Assignee: Micron Technology, Inc.Inventors: Brian A. Vaartstra, Timothy A. Quick
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Patent number: 7332443Abstract: The present invention relates to a method for fabricating a semiconductor device. In order to provide for a high carrier mobility in an active region of the device, germanium atoms are implanted into a surface of a semiconductor substrate such that a germanium-containing layer inside the semiconductor substrate is formed. Then, the surface of the semiconductor surface is oxidized down to and including the upper part of the germanium-containing layer, thereby pushing the implanted germanium atoms from the surface down into the semiconductor substrate and thereby enhancing the germanium concentration inside the remaining germanium-containing layer and forming a layer with enhanced germanium concentration inside the semiconductor substrate. The fabrication of the semiconductor device is concluded such that the active region of the device is placed at least partly within the layer with enhanced germanium concentration.Type: GrantFiled: March 18, 2005Date of Patent: February 19, 2008Assignee: Infineon Technologies AGInventor: Ralph Stoemmer
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Patent number: 7332444Abstract: A method for smoothing areas of a structure made of a first material having a predetermined first glass transition temperature on a carrier includes the steps of: (1) applying a second material having a predetermined second glass transition temperature, so that the surface of the structure of the first material is at least partially covered by the second material; (2) increasing the temperature of the first material to a first predeterminable temperature, which is greater than the first glass transition temperature; and (3) lowering the temperature of the first material below the first glass transition temperature of the first material.Type: GrantFiled: February 22, 2005Date of Patent: February 19, 2008Assignee: Infineon Technologies AGInventors: Wolf-Dieter Domke, Siegfried Schwarzl
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Patent number: 7332445Abstract: A porous organosilicate glass (OSG) film: SivOwCxHyFz, where v+w+x+y+z=100%, v is 10 to 35 atomic %, w is 10 to 65 atomic %, x is 5 to 30 atomic %, y is 10 to 50 atomic % and z is 0 to 15 atomic %, has a silicate network with carbon bonds as methyl groups (Si—CH3) and contains pores with diameter less than 3 nm equivalent spherical diameter and dielectric constant less than 2.7. A preliminary film is deposited by a chemical vapor deposition method from organosilane and/or organosiloxane precursors, and independent pore-forming precursors. Porogen precursors form pores within the preliminary film and are subsequently removed to provide the porous film. Compositions, film forming kits, include organosilane and/or organosiloxane compounds containing at least one Si—H bond and porogen precursors of hydrocarbons containing alcohol, ether, carbonyl, carboxylic acid, ester, nitro, primary amine, secondary amine, and/or tertiary amine functionality or combinations.Type: GrantFiled: September 19, 2005Date of Patent: February 19, 2008Assignee: Air Products and Chemicals, Inc.Inventors: Aaron Scott Lukas, Mark Leonard O'Neill, Eugene Joseph Karwacki, Jr., Raymond Nicholas Vrtis, Jean Louise Vincent
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Patent number: 7332446Abstract: According to the invention, the thin film having the thickness controlled desirably can be easily formed using common semiconductor processes. Provided is a coating liquid for forming the porous film having an excellent dielectric property and mechanical property. Specifically, the coating liquid for forming a porous film comprises the condensation product obtained by condensation of one or more silicate compounds represented by the formula (X2O) i(SiO2)j(H2O)k and one more organosilate compounds represented by the formula (X2O)a(RSiO1.5)b(H2O)c. Thus, the porous insulating film having sufficient mechanical strength and dielectric properties for use in the semiconductor manufacturing process can be manufactured.Type: GrantFiled: March 25, 2004Date of Patent: February 19, 2008Assignees: Shin-Etsu Chemical Co., Ltd., Matsushita Electric Industrial Co., Ltd.Inventors: Tsutomu Ogihara, Fujio Yagihashi, Yoshitaka Hamada, Takeshi Asano, Motoaki Iwabuchi, Hideo Nakagawa, Masaru Sasago
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Patent number: 7332447Abstract: A method of forming a contact is provided. A substrate having at least two metal oxide semiconductor devices is provided and a gap is formed between the two devices. A first stress layer is formed over the substrate to cover the metal-oxide semiconductor devices and the substrate. The first stress layer is formed by first forming a first stress material layer over the substrate to cover the metal-oxide semiconductor devices and to fill the gap, wherein the stress material inside the gap has a seam. An etching back process is then performed to remove a portion of the stress material layer inside the gap. A second stress layer and a dielectric layer are sequentially formed on the first stress layer. A portion of the second stress layer is removed to form a contact opening. A second conductive layer is filled into the contact opening to form a contact.Type: GrantFiled: November 24, 2005Date of Patent: February 19, 2008Assignee: United Microelectronics Corp.Inventors: Neng-Kuo Chen, Teng-Chun Tsai, Chien-Chung Huang
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Patent number: 7332448Abstract: A manufacturing method of a semiconductor device, comprises; a process of heat-treating a semiconductor substrate under the ordinary pressure and in an oxidizing atmosphere; and a process of heat-treating the semiconductor substrate under the ordinary pressure and in an inert atmosphere, wherein heat-treating time or heat-treating temperature in heat treatment in the oxidizing atmosphere is changed based on the fluctuation of atmospheric pressure, and the heat-treating time in the inert atmosphere is determined based on the heat-treating time or the heat-treating temperature in the oxidizing atmosphere.Type: GrantFiled: August 18, 2005Date of Patent: February 19, 2008Assignee: Seiko Epson CorporationInventor: Shinji Terao
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Patent number: 7332449Abstract: A method for forming a damascene structure by providing a single process solution for resist ashing while avoiding and repairing plasma etching damage as well as removing absorbed moisture in the dielectric layer, the method including providing a substrate comprising an uppermost photoresist layer and an opening extending through a thickness of an inter-metal dielectric (IMD) layer to expose an underlying metal region; and, carrying out at least one supercritical fluid treatment comprising supercritical CO2, a first co-solvent, and an additive selected from the group consisting of a metal corrosion inhibitor and a metal anti-oxidation agent to remove the uppermost photoresist layer, as well as including an optional dielectric insulating layer bond forming agent.Type: GrantFiled: September 30, 2005Date of Patent: February 19, 2008Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ching-Ya Wang, Joshua Tseng, Henry Lo, Jean Wang
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Patent number: 7332450Abstract: A blend comprising a paraffin wax emulsion and a polymer emulsion, wherein the polymer contains polymerized units of one or more C1-12 ester of acrylic or methacrylic acid and a vinyl ester of a C8-13 neo-acid. When the blend is applied as a coating to a substrate, such as a nonwoven web, a nonwoven absorbent pad, a nonwoven textile, or a textile fabric, and dried, it has a hydrostatic head barrier sufficient to prevent passage of aqueous fluids but allow passage of water vapor through it. A multi-layer material comprising at least one layer of a nonwoven web, an absorbent pad, or a textile, and at least one layer of the above described blend.Type: GrantFiled: July 17, 2003Date of Patent: February 19, 2008Assignee: Air Products Polymers, L.P.Inventor: John Richard Boylan
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Patent number: 7332451Abstract: Paper-machine clothing comprising a woven structure and a filling component. A filament and a second filament of the woven structure intersect in a weave pattern contact each other. Void spaces produced by the intersection of the first filament and the second filament are substantially filled by a durable filling component. The durable component adheres to at most one of the first and second filaments.Type: GrantFiled: November 17, 2004Date of Patent: February 19, 2008Assignee: The Procter & Gamble CompanyInventors: Steven Lee Barnholtz, Michael Gomer Stelljes, Jr., Douglas Jay Barkey, Alyssandrea Hope Hamad
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Patent number: 7332452Abstract: A bioactive glass having a composition substantially comprising 30 to 60 mol % of CaO, 40 to 70 mol % of SiO2 and 20 mol % or less of Na2O has low glass transition temperature and/or crystallization temperature, and a sintered calcium phosphate obtained by using the bioactive glass as a sintering aid has excellent biocompatibility, mechanical strength and sinterability.Type: GrantFiled: July 15, 2003Date of Patent: February 19, 2008Assignees: PENTAX CorporationInventors: Tetsuro Ogawa, Tadashi Kokubo
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Patent number: 7332453Abstract: Ceramics (including glasses and glass-ceramics) comprising nitrogen, and methods of making the same.Type: GrantFiled: July 29, 2004Date of Patent: February 19, 2008Assignee: 3M Innovative Properties CompanyInventors: Anatoly Z. Rosenflanz, Berkan K. Endres, Thomas J. Anderson
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Patent number: 7332454Abstract: An oxidation catalyst deposited on a filter substrate for the removal of CO, hydrocarbons, and particulate matter, such as soot, from an exhaust stream wherein the oxidation catalyst is formed from a platinum group metal supported on a refractory oxide, tin oxide, and a zeolite.Type: GrantFiled: March 16, 2005Date of Patent: February 19, 2008Assignee: Sud-Chemie Inc.Inventors: Zhongyuan Dang, Yinyan Huang, Amiram Bar-Ilan
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Patent number: 7332455Abstract: The present invention relates to a catalyst component and a catalyst for olefin polymerization. The catalyst component utilizes magnesium halide and silica as composite support, and the particle morphology thereof can be improved by regulating the ratio of magnesium halide to silica. Further, the purpose of stabilizing the rate of catalytic polymerization reaction and improving the particle morphology of polymer so as to meet the requirements on catalyst performance of various polymerization processes can be achieved through the combination of the supports of the catalyst. In the meantime, when used in the polymerization of propylene, the catalyst of the present invention exhibits a relatively high polymerization activity and high stereospecificity.Type: GrantFiled: September 16, 2004Date of Patent: February 19, 2008Assignees: China Petroleum & Chemical Corporation, Beijing Research Institute of Chemical Industry, China Petroleum & Chemical CorporationInventors: Chen Wei, Yuexiang Liu, Xianzhi Xia, Wenbo Song, Hongbin Du, Zifang Guo, Yang Tan, Zhaowen Ma, Weimin Ji, Zhichao Yang, Xiaodong Wang, Lei Guo
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Patent number: 7332456Abstract: The present invention provides a method for varying the melting points and molecular weights of polyolefins by changing the structure of the catalyst used in the polymerization. The catalysts that are useful in the present invention are chiral, stereorigid metallocene catalyst of the formula R?(C5R?m)2MeQ. The catalysts include a bridge structure between the (C5R?m) groups and may contain substituents on the groups. It has been discovered that the melting points and molecular weights of the polymers produced by such catalysts are influenced by the bridge and substituents added to the (C5R?m) groups. Thus, the present invention provides a method for varying the melting points of the polymer product and a method of varying the molecular weights of the product by changing the components and structure of the metallocene catalysts. The present invention also provides a process for polymerizing olefins in which the melting points and/or molecular weights of the product may be controlled.Type: GrantFiled: March 21, 2005Date of Patent: February 19, 2008Assignee: Fina Technology, Inc.Inventor: John A. Ewen
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Patent number: 7332457Abstract: Stable concentrated suspensions readily dispersible in water comprising one or more agricultural solids, a single non-ionic surfactant and a water-soluble glycol liquid. The agricultural solids include fertilizers, adjuvants, herbicides, pesticides and combinations thereof approved for use with foods. The non-ionic surfactant is an alkyl-phenoxy-poly(ethylenoxide)alkanol, an ethoxylated aliphatic C11 to C15 alcohol, an ethylene oxide-propylene oxide block copolymer or an ethoxylated fatty acid. Preferably, the surfactant has an average molecular weight from about 300 to about 1000. The water-soluble glycol liquid is ethylene glycol, propylene glycol, or mixtures thereof. The agricultural solid particles are at least about 99 wt. % passable through a Tyler #48 sieve. The suspensions of the invention exhibit physical stability during normal storage conditions, good pourability, and are readily dispersed in water.Type: GrantFiled: June 21, 2001Date of Patent: February 19, 2008Assignee: Honeywell International Inc.Inventors: Ronald E. Highsmith, Robert A. Foster
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Patent number: 7332458Abstract: A drilling fluid for use in high oil viscosity formations containing tar, sand and oil entrained therein. The drilling fluid can be comprised of a polymer in an amount from between 0.05% and 5% by volume, a solvent in an amount from between 1% and 20% by volume and de-emulsifier in an amount from between 0.05% and 10% by volume.Type: GrantFiled: April 2, 2004Date of Patent: February 19, 2008Assignee: Q'Max Solutions Inc.Inventors: Len Baltoiu, Flori Baltoiu, Brent Warren
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Patent number: 7332459Abstract: A method of inhibiting scale formation in a subterranean formation comprising: (a) injecting a suspension comprising particles of a controlled release scale inhibitor suspended in an aqueous medium into a formation through an injection well wherein the particles have a mean diameter of less than 10 microns, preferably less than 5 microns, more preferably less than 1 micron; (b) allowing the suspension to percolate through the subterranean formation towards a production well; and (c) controllably releasing the scale inhibitor from the particles in the near well bore region of the production well. Suitably, the particles of the controlled release scale inhibitor comprise an esterifiable scale inhibitor cross-linked with a polyol via ester cross-links.Type: GrantFiled: May 15, 2003Date of Patent: February 19, 2008Assignee: BP Exploration Operating Company LimitedInventors: Ian Ralph Collins, Simon Neil Duncum
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Patent number: 7332460Abstract: The present invention is directed to alkylxylene sulfonate for enhanced oil recovery processes. The alkylxylene moiety in the alkylxylene sulfonate contains a high percentage of the 4-alkyl-1,2-dimethyl benzene isomer and a high percentage of alkyl group attachment to the xylene ring at positions higher than the 2-position on the alkyl carbon chain. The present invention is also directed to a method for enhancing the recovery of oil from a subterranean reservoir which method employs the alkylxylene sulfonate of the present invention. The alkylxylene sulfonate is employed in an aqueous media. The method optionally employs co-surfactants.Type: GrantFiled: July 15, 2004Date of Patent: February 19, 2008Assignee: Chevron Oronite Company LLCInventors: Curt B. Campbell, Gilles P. Sinquin
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Patent number: 7332461Abstract: A lubricant composition for metal forming and cutting has at least one compound of the formula (I): R1—(AO)n—OOC—(CH2)m—Ph—(R2)p where R1 is a C1 to C15 alkyl group AO is an alkyleneoxy group which may vary along the (poly) alkylenoxy chain; n is 0 or from 1 to 100; m is 0, 1 or 2; and Ph is a phenly group, which may be substituted with groups (R2)p; where each R2 is independently an alkyl, halogen, haloalky or alkoxy group; and p is 0 or from 1 to 3. The lubricant composition also includes at least one lubricant additive selected from the group consisting of an organic ester additive, a polyalkylene glycol additive, a sulphur-containing synthetic additive, a sulphur-containing oleochemical additive, a suiphonate, a phosphorus-containing additive and a chlorinated paraffin additive. Also described are a method of using the lubricant composition in metal forming and cutting applications and the use of the lubricant composition in metal forming and cutting applications.Type: GrantFiled: August 14, 2003Date of Patent: February 19, 2008Assignee: Croda International PLCInventor: John Eastwood
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Patent number: 7332462Abstract: A composition is provided for MOC that contains compounds with the structure wherein R1 is a hydrogen, an alkyl, an alkoxy, or a substituted or unsubstituted aryl group; R2 is an alkyl having greater than 6 carbons, a substituted aryl, or unsubstituted aryl. Preferably these compounds have a low odor intensity. These compounds may be used with other MOC ingredients that act synergistically or additively with them.Type: GrantFiled: January 23, 2007Date of Patent: February 19, 2008Assignee: Givaudan SAInventors: Thomas McGee, Kenneth Leo Purzycki, Venkateswara Kumar Vedantam, Tee Yong Tan, John Callf
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Patent number: 7332463Abstract: Cleaning formulations, methods, and systems are effective, mild, and non-hazardous. Embodiments of the cleaning formulation comprise a fatty acid, a saponifier, a water conditioner, a solvent, a nonionic surfactant, and an anionic surfactant. Some embodiments also optionally additives. Embodiments are particularly effective for cleaning concrete.Type: GrantFiled: March 21, 2006Date of Patent: February 19, 2008Assignee: On Legal Grounds, Inc.Inventor: Robert Greenberg
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Patent number: 7332464Abstract: Bleach activator cogranulates of one or more ammonium nitrites and at least one further bleach activator obtained by spraying an aqueous solution of one or more ammonium nitrites onto the further bleach activator, granulating the resulting mixture and drying and sieving the moist granulate.Type: GrantFiled: July 6, 2006Date of Patent: February 19, 2008Assignee: Clariant Produkte (Deutschland) GmbHInventors: Jürgen Cramer, Johannes Himmrich, Helmut Kramer
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Patent number: 7332465Abstract: The present invention relates to compositions at least comprising one alkoxylate of the formula RO(A)n(B)mH, to processes for the preparation of such compositions, in particular in the presence of double-metal cyanide compounds as catalyst, and their use as emulsifier, foam regulator or as wetting agents for hard surfaces. Moreover, the present invention also relates to the use of such compositions in detergents and surfactant formulations.Type: GrantFiled: April 25, 2003Date of Patent: February 19, 2008Assignee: BASF AktiengesellschaftInventors: Christian Wulff, Kai-Uwe Baldenius, Martin Scholtissek, Michael Stoesser, Norbert Wagner, Edward Bohres
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Patent number: 7332466Abstract: A low-foaming surfactant composition comprising: (a) a hydroxy mixed ether corresponding to formula I: R1O[CH2CH(CH3)O]x(CH2CHR2O)y[CH2CH(OH)R3]z??(I) wherein R1 is an alkyl and/or alkylene group containing from 4 to 18 carbon atoms, R2 is hydrogen, R3 is an alkyl group having from 2 to 22 carbon atoms, x is 0, y is a number from 1 to 30, and z is a number from 1 to 3; and (b) a low-foaming nonionic surfactant selected from the group consisting of an optionally end-capped fatty alcohol polyethylene glycol/polypropylene glycol ether corresponding to formula II: R4O(CH2CH2O)n[CH2(CH3)CHO]mR5 ??(II) wherein R4 is an alkyl and/or alkylene group containing from 8 to 22 carbon atoms, R5 is hydrogen or an alkyl group containing from 1 to 8 carbon atoms, n is a number from 1 to 15 and m is a number up to 10, an optionally end-capped fatty alcohol polypropylene glycol/polyethylene glycol ether corresponding to formula II: R6O[CH2(CH3)CHO]p(CH2CH2O)qR7 ??(III) wherein R6 is an alkyl and/or alkylene group having fType: GrantFiled: November 17, 2004Date of Patent: February 19, 2008Assignee: Cognis Deutschland GmbH & Co. KGInventors: Karl-Heinz Schmid, Rita Koester
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Patent number: 7332467Abstract: A hydrophilically modified polyol compounds, compositions including the hydrophilically modified polyol compounds and methods of using such compositions and process of making such compositions for anti-redeposition and hydrophobic soil cleaning benefits.Type: GrantFiled: December 16, 2005Date of Patent: February 19, 2008Assignee: Procter & Gamble CompanyInventors: Eva Schneiderman, Jun Ma, Kevin Todd Norwood, Randy Thomas Reilman, Julie Ann Menkhaus, Jeffrey John Scheibel
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Patent number: 7332468Abstract: The invention relates to the use of (Z)-8-tetradecenal and of a mixture consisting of (Z)-8-tetradecanal and (E)-8-tetradecanal as an odorous or aromatic substance.Type: GrantFiled: July 6, 2002Date of Patent: February 19, 2008Assignee: Symrise GmbH & Co. KGInventors: Sabine Widder, Berthold Weber, Marcus Eggers, Jan Looft, Tobias Voessing, Wilhelm Pickenhagen
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Patent number: 7332469Abstract: The present invention relates to methods of preventing or decreasing the severity of scarring in a subject comprising: obtaining a pharmaceutical composition comprising a single chain urokinase plasminogen activator molecule (scuPA) or a scuPA mimetic; and administering the pharmaceutical composition to a subject; wherein scarring in the subject is either prevented or decreased relative to an amount of scarring that would be expected if the pharmaceutical composition were not administered to the subject. The invention also relates to methods of screening for compounds that prevent or decrease the severity of scarring in a subject.Type: GrantFiled: April 4, 2003Date of Patent: February 19, 2008Assignee: Board of Regents The University of Texas SystemInventor: Steven Idell
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Patent number: 7332470Abstract: The use of collectins and/or surfactant proteins for the treatment and prevention of ocular disease.Type: GrantFiled: April 14, 2004Date of Patent: February 19, 2008Assignees: The Regents of the University of California, The Research Foundation of State University of New YorkInventors: Suzanne Fleiszig, David J. Evans, Robert Sack