Patents Issued in September 2, 2008
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Patent number: 7421575Abstract: A description of components in a reconfigurable data center is received. A set of components from the description is selected for a physical platform based on a logical platform specification.Type: GrantFiled: July 16, 2004Date of Patent: September 2, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Seong Ang, Michael Schlansker
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Patent number: 7421576Abstract: Methods and systems in a data/computer network for authenticating identifying data transmitted from a client to a server through use of a gateway interface system which are communicately coupled to each other are disclosed. An authentication packet transmitted from a client to a server of the data network is intercepted by the interface, wherein the authentication packet is encrypted with a one-time password for transmission from the client to the server. The one-time password associated with the authentication packet can be verified utilizing a one-time password token system. The authentication packet can then be modified for acceptance by the server, wherein the response packet generated by the server is thereafter intercepted, verified and modified for transmission back to the client in a similar but reverse process.Type: GrantFiled: January 16, 2003Date of Patent: September 2, 2008Assignee: The United States of America as represented by the United States Department of EnergyInventor: Alexander Dale Kent
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Patent number: 7421577Abstract: The present invention provides a means for reflecting modifications made in a server to data with regard to a scope of rights, which are granted to an application program operable in a communication device such as a mobile station, on data stored in the communication device. To achieve the aim, in a system according to the present invention, Java-AP software is provided to a mobile station by transmitting an ADF, a SDF and a JAR file from servers to the mobile station in that order. The SDF is a file containing data indicating restrictions of behavior of a Java-AP in a mobile station. The SDF also contains data indicating a validity state of the SDF, namely ‘valid’ or ‘invalid’, which is managed by management server device 18. Before a mobile station runs a Java-APP which is installed in the mobile station, the mobile station accesses management server device 18 and checks whether a SDF corresponding to the Java-APP is valid.Type: GrantFiled: March 31, 2004Date of Patent: September 2, 2008Assignee: NTT DoCoMo, Inc.Inventors: Yuichi Ichikawa, Naoki Naruse, Tatsuro Oi, Nobuyuki Watanabe, Yasunori Hattori, Masato Takeshita, Masakazu Nishida, Mao Asai, Masayuki Tsuda, Atsuki Tomioka, Kazuhiro Yamada, Dai Kamiya, Satoshi Washio, Naoki Yamane, Keiichi Murakami
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Patent number: 7421578Abstract: A method performed by a first computer node for selecting a leader node to provide service to a plurality of other nodes in a multicast group, wherein each of the nodes communicates using multicast messages, comprises issuing a first election call message; receiving candidacy announcement messages from one or more leader candidate nodes in a specified time period; selecting a victor from among all leader candidate nodes from which candidacy announcement messages are received; receiving one or more victor announcement messages from one or more leader victor nodes for a second specified time period; resolving zero or more collisions among the victor announcement messages to result in selecting the leader node. One embodiment provides a dynamic secure protocol for electing a key server, such as a key server that is suited for use with a group key exchange protocol such as the Group Domain of Interpretation (GDOI).Type: GrantFiled: July 22, 2003Date of Patent: September 2, 2008Assignee: Cisco Technology, Inc.Inventors: Geoffrey Huang, Brian Weis
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Patent number: 7421579Abstract: A multiplexed secure counter is provided, in which a multiplicity of child secure counters are secured by a parent secure counter. Child counters are stored with a parent secure counter value and a signature. Before a child counter is read, the signature is verified and value stored is checked against the current value of the parent secure value. If the verifications are successful, the child secure counter can be used. To increment a child counter, the signature is verified and the value stored checked against the current value of the parent secure value. If the verifications are successful, the parent counter and the child counter are incremented, and the data is signed again.Type: GrantFiled: June 28, 2002Date of Patent: September 2, 2008Assignee: Microsoft CorporationInventors: Paul England, Marcus Peinado
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Patent number: 7421580Abstract: A method for synchronizing a user's e-mail addresses in two locations and validating the synchronized e-mail address is provided, wherein the two locations can be an authentication proxy and an integrated authorized site of the authentication proxy, or they can be the authentication proxy and a partner site of the authentication proxy. Also disclosed are several methods for maintaining the synchronized status and confirmed status when the user changes his e-mail address from either of the two locations.Type: GrantFiled: August 12, 2002Date of Patent: September 2, 2008Assignee: AOL LLC a Delaware limited liability companyInventors: Morgan Hua, Jose Machuca
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Patent number: 7421581Abstract: An automated method of producing encoded images for incorporation into a digital document is provided. The method comprises receiving a request from a user to produce an encoded image. The request includes user-supplied data for producing the encoded image, the user-supplied data including user-supplied authentication indicia and/or at least one user-supplied encoding parameter. The method further comprises determining whether the user is authorized to produce an encoded image using the user-supplied data. Responsive to a determination that the user is authorized to produce an encoded image using the user-supplied data, encoding actions are carried out. The encoding actions include establishing at least one digitized authentication image and establishing an encoding parameter set including any user-supplied encoding parameters. The encoding parameter set is usable to encode one or more of the at least one digitized authentication image.Type: GrantFiled: May 18, 2004Date of Patent: September 2, 2008Assignee: Graphic Security Systems CorporationInventors: Alfred V. Alasia, Alfred J. Alasia, Thomas C. Alasia, Slobodan Cvetkovic
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Method and apparatus for mutual authentication at handoff in a mobile wireless communication network
Patent number: 7421582Abstract: A method for mutual authentication in a mobile wireless communication network (100) that includes the steps of: verifying a second authenticating device (20) by a mobile node (30) based on a first authentication between the mobile node and a first authenticating device (10); and verifying the mobile node by the second authenticating device based on the first authentication, whereby the mobile node and the second authenticating device perform a second authentication.Type: GrantFiled: May 28, 2004Date of Patent: September 2, 2008Assignee: Motorola, Inc.Inventors: Zhi Fu, Gregory W. Cox, Aaron M. Smith -
Patent number: 7421583Abstract: A system, method and article of manufacture are provided for pricing a cryptographic service. A request for a cryptographic service is received. An identification is made of one or more of a computational burden required to perform the cryptographic service, a privacy level of the cryptographic service, and/or a speed of performing the cryptographic service. A price of the cryptographic service is determined based on the computational burden, privacy level, and/or speed. A method is also provided for pricing a cryptographic service based on a compactness of a cryptographic message. A request for encrypting a message is received. The message is encrypted and is also compressed during the encryption. An amount of compression of the message is determined. A price of the encryption is determined based on the amount of compression.Type: GrantFiled: June 19, 2000Date of Patent: September 2, 2008Inventors: Thomas A Berson, R Drews Dean, Matthew K Franklin, Teresa F Lunt, Diana K Smetters
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Patent number: 7421584Abstract: A specific frequency component extraction unit extracts a specific frequency component signal from an input image signal. A phase controller controls the phase of the specific frequency component signal. A correlator computes the cross-correlation value of the phase-controlled specific frequency component signal and the input image signal. A watermark information estimation unit filters the cross-correlation value to detect watermark information embedded in the input image signal.Type: GrantFiled: May 23, 2007Date of Patent: September 2, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Asano, Shinichiro Koto, Tomoo Yamakage
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Patent number: 7421585Abstract: Apparatus, methods, and computer program products are disclosed that use a lease to manage interpersonal communications over a computer-mediated network such as a telephone network or the Internet, whether using textual, audio, or video communication means. The use of the lease allows enables negotiated evolution and revocation of a communication privilege in a socially-acceptable manner.Type: GrantFiled: June 18, 2004Date of Patent: September 2, 2008Assignee: Palo Alto Research Center IncorporatedInventors: Paul M. Aoki, Allison G. Woodruff
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Patent number: 7421586Abstract: Techniques for using a class loader to protect mobile code against a malicious host. The techniques include using the class loader to extend a class used by the mobile code such that a method is added to the code which authenticates the mobile code. When executed, the method provides a dynamic watermark that authenticates the code. The method may be encrypted until it is added to the code. One such method uses a static watermark in the code to determine whether the code has been modified. The techniques also include using a class loader to extend the class such that obfuscated symbolic names in the program that correspond to symbolic names defined by the class can be resolved. A way of doing this is to include a first association between the obfuscated symbolic names and encrypted forms of the corresponding symbolic names in the program and to make a second association between the encrypted forms of the corresponding symbolic names and information used to resolve the symbolic names defined in the class.Type: GrantFiled: September 4, 2003Date of Patent: September 2, 2008Assignee: Fraunhofer GesselschaftInventors: Chenghui Luo, Jian Zhao
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Patent number: 7421587Abstract: A technique for detecting Trojans and worms within packed computer files uses fingerprint data derived from the unpacked resource data associated with the packed computer files. The number of entries, the position within the resource data and size of the resource that is the largest resource specified, a timestamp value of compilation and a checksum value derived from the whole of the resource data may be included within a fingerprint value as characteristic of a particular set of resource data. A library of such fingerprint values may be generated for known Trojans and worms, or other programs it is wished to detect, and then a suspect file compared against this library of fingerprints.Type: GrantFiled: July 26, 2001Date of Patent: September 2, 2008Assignee: McAfee, Inc.Inventors: Neil Andrew Cowie, Igor Muttik
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Patent number: 7421588Abstract: An apparatus, method, and system to seal a data repository to a trusted computing platform is described. The data repository may be sealed by encrypting the data on the repository and sealing a cryptographic key to a specific set of platform resources. With the data repository sealed to the platform, the system boot sequence will fail if the system configuration is compromised, for example by insertion of “snoopware” or a modified BIOS. Additionally, if the computer containing the data repository is lost or stolen, the encrypted data remains secure even if the repository is attached to a system modified to bypass normal safeguards.Type: GrantFiled: December 30, 2003Date of Patent: September 2, 2008Assignee: Lenovo Pte LtdInventors: David Carroll Challener, Joseph Wayne Freeman, Steven Dale Goodman, Randall Scott Springfield
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Patent number: 7421589Abstract: A data security system and method protects stored data from unauthorized access. According to one aspect of the invention, a client computing device communicates periodically with a server. If communications is not established between the client and the server for a selected activation interval and a subsequent grace period, the data is determined to be lost, and programmed security rules are automatically executed.Type: GrantFiled: July 21, 2004Date of Patent: September 2, 2008Assignee: Beachhead Solutions, Inc.Inventors: Cuong G. Williams, John W. Hanay, David K. Rensin, Yuri Yuryev
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Patent number: 7421591Abstract: A system and method for conserving power in a power managed information handling system are provided. While the host unit or central processing unit of the information handling system is in a reduced power state, the communication controller maintains received data in an associated buffer. The communication controller releases all or a portion of the buffered data during time intervals in which the host unit is in a normal operating mode. By buffering and releasing data in coordination with the reduced power state and normal operating state, respectively, of the host unit, power conservation in the information handling system may be enhanced by not causing the host unit to return to normal operation prematurely.Type: GrantFiled: August 29, 2003Date of Patent: September 2, 2008Assignee: Dell Products L.P.Inventors: Andrew T. Sultenfuss, Jonathan Foster Lewis
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Patent number: 7421592Abstract: The present invention leverages high-frequency interrupts and/or low priority threads to accurately determine which computing resources are available. This provides a computing asset (CPUs and/or software applications) with a means to accurately compensate for resource utilization in order to increase its performance. By utilizing the present invention, the computing asset can optimize its performance in a real-time, self-tuning manner. In one instance of the present invention, high intensity, low priority threads are initiated on available CPUs (logical and/or physical) to effectively replace a CPU's idle time with the low priority thread. This thread generally constitutes a computationally-intensive and/or a memory-intensive thread which permits a highly accurate performance measurement to be obtained for available CPU resources.Type: GrantFiled: February 13, 2004Date of Patent: September 2, 2008Assignee: Microsoft CorporationInventors: Andrew Kadatch, James E. Walsh, Stuart R. Patrick, Xiaowen Shan
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Patent number: 7421593Abstract: An apparatus includes a first voltage regulator that is controlled to provide an output voltage that matches a reference voltage. The apparatus further includes a second voltage regulator that is coupled to an output of the first voltage regulator and controlled to minimize a current output from the first voltage regulator.Type: GrantFiled: November 19, 2004Date of Patent: September 2, 2008Assignee: Intel CorporationInventor: Henry W. Koertzen
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Patent number: 7421594Abstract: A bus power device includes a connector that is connected to a port of a host apparatus compliant with a predetermined interface standard; a current/voltage detecting unit that detects a current/voltage supplied from the host apparatus to a bus power line via the port and the connector; and a power assisting unit that assists a current to the bus power line based on a result of comparison between the current detected by the current/voltage detecting unit and a threshold current, and assists a voltage to the bus power line by an amount of shortfalls in the voltage based on a result of comparison between the voltage detected by the current/voltage detecting unit and a threshold voltage.Type: GrantFiled: December 27, 2004Date of Patent: September 2, 2008Assignee: Fujitsu LimitedInventors: Kenji Nakajima, Kazuhide Ooba, Masamichi Suzuki
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Patent number: 7421595Abstract: A microprocessor includes a computation unit having logic units for executing operations associated with determined instructions of a microprocessor instruction set and a control unit for interpreting the instructions and for controlling the logic units accordingly. An internal timer of the microprocessor is activated by the control unit in response to the execution of a dedicated standby instruction of the microprocessor instruction set. Responsive thereto, a timeout signal is delivered to the control unit so as to place the microprocessor in a standby state during a determined timeout period.Type: GrantFiled: March 17, 2005Date of Patent: September 2, 2008Assignee: STMicroelectronics S.A.Inventors: Olivier Ferrand, Jean-Michel Gril-Maffre
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Patent number: 7421596Abstract: In a disk array system, multiplexed clusters and multiplexed power source units for supplying power sources to the respective clusters are arranged. Each cluster has a power failure judging unit for judging the power source condition of other cluster. In response to a case where one cluster stops its operation first owing to a power failure, at the power failure, for example, MP of the cluster blocks the portion of the other cluster, and judges the power source condition of the other cluster on the basis of a signal from the power failure judging unit, and records power failure information showing the power source condition to a memory. At power recovery, if the cluster recognizes that the portion in blocked condition of the other cluster is in blockage owing to the power failure, the cluster recovers the portion.Type: GrantFiled: April 13, 2005Date of Patent: September 2, 2008Assignee: Hitachi, Ltd.Inventor: Mitsuo Fukumori
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Patent number: 7421597Abstract: A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.Type: GrantFiled: October 28, 2005Date of Patent: September 2, 2008Assignee: Intel CorporationInventors: James P. Kardach, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty, Vivek Gupta, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand
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Patent number: 7421598Abstract: A method and system for enabling directed temperature/power management at the DIMM-level and/or DRAM-level utilizing intelligent scheduling of memory access operations received at the memory controller. Hot spots within the memory subsystem, caused by operating the DIMMs/DRAMs above predetermined/preset threshold power/temperature values for operating a DIMM and/or a DRAM, are avoided/controlled by logic within the memory controller. The memory controller logic throttles the number/frequency at which commands (read/write operations) are issued to the specific DIMM/DRAM based on feedback data received from the specific DIMM/DRAM reaching the preset threshold power usage value.Type: GrantFiled: February 9, 2005Date of Patent: September 2, 2008Assignee: International Business Machines CorporationInventors: Mark Andrew Brittain, Edgar Rolando Cordero, James Stephen Fields, Jr., Warren Edward Maule, Eric Eugene Retter
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Patent number: 7421599Abstract: A power management server and method for managing power consumption is disclosed. According to one embodiment, a power management server data processing system is provided, where the power management server data processing system comprises a power management communication port to communicatively couple the power management server data processing system to a power-managed server data processing system and a system management processor coupled to the power management communication port. In the described embodiment, the system management processor comprises power management logic configured to receive power management data from the power-managed server data processing system, to generate a power management command utilizing the power management data, and to transmit the power management command to the power-managed server data processing system utilizing the power management communication port. Moreover, the power management data of the described embodiment comprises power management capability data.Type: GrantFiled: June 9, 2005Date of Patent: September 2, 2008Assignee: International Business Machines CorporationInventors: Sumanta K. Bahali, Warren D. Bailey, Jimmy G. Foster, Sr., Gregory D. Sellman
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Patent number: 7421600Abstract: A power-saving method of continuous display and effective cost in a system that includes memory directly accessed by a CPU and at least one display device within vertical blanking. The method includes the following steps: issuing a Power-saving related message; dropping the Power-saving related message, wherein a Power-saving related flag is not set; setting the Power-saving related flag; setting a VID/FID pending bit in the CPU, wherein the vertical blanking of the display/displays occurs and clearing the Power-saving related flag, wherein the Power-saving related flag is set, and executing a power saving process.Type: GrantFiled: July 29, 2005Date of Patent: September 2, 2008Assignee: Silicon Integrated Systems Corp.Inventor: Te-Lin Ping
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Patent number: 7421601Abstract: A system and method for controlling power and performance in a microprocessor system includes a monitoring and control system integrated into a microprocessor system. The monitoring and control system includes a hierarchical architecture having a plurality of layers. Each layer in the hierarchical architecture is responsive to commands from a higher level, and the commands provide instructions on operations and power distribution, such that the higher levels provide modes of operation and budgets to lower levels and the lower levels provide feedback to the higher levels to control and manage power usage in the microprocessor system both globally and locally.Type: GrantFiled: February 17, 2006Date of Patent: September 2, 2008Assignee: International Business Machines CorporationInventors: Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, Prabhakar N. Kudva
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Patent number: 7421602Abstract: A computer includes a primary processor, a primary memory, and a primary input/output (I/O) interface that communicates with the primary processor and the primary memory. A primary display communicates with the primary I/O interface. The primary processor, the primary memory, and the primary display are operated in active and inactive modes and are powered down when the computer is in the inactive mode. A secondary processor dissipates less power than the primary processor. A secondary display communicates with the secondary processor. The secondary processor and the secondary display are powered up when the computer is in the inactive mode. The secondary processor and display support PDA-like functionality when the computer is in the inactive mode.Type: GrantFiled: February 13, 2004Date of Patent: September 2, 2008Assignee: Marvell World Trade Ltd.Inventor: Sehat Sutardja
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Patent number: 7421603Abstract: A method for monitoring the operating readiness of memory elements which are assigned to an electronic unit, an engine control unit for example. Furthermore, an electronic unit for executing the method and a computer program, as well as a computer program product are described. In the method described, a supply voltage of the electronic unit is monitored to ensure error-free operation of the memory elements.Type: GrantFiled: January 17, 2003Date of Patent: September 2, 2008Assignee: Robert Bosch GmbHInventors: Claus Steinle, Axel Aue
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Patent number: 7421604Abstract: Methods and apparatus for controlling a voltage supplied to a device based on an anticipated change in load current demanded by the device are provided. In response to detecting the anticipated change in load current, a load control signal may be generated that causes the voltage regulator to adjust the output voltage supplied to the device.Type: GrantFiled: July 25, 2005Date of Patent: September 2, 2008Assignee: NVIDIA CorporationInventor: Ludger Mimberg
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Patent number: 7421605Abstract: A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.Type: GrantFiled: October 31, 2007Date of Patent: September 2, 2008Assignee: Actel CorporationInventors: Rabindranth Balasubramanian, Gregory Bakker
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Patent number: 7421606Abstract: A system and method are disclosed to generate and terminate clock shift modes during initialization of a synchronous circuit (e.g., a delay-locked loop or DLL). Upon initialization, the DLL is entered into a ForceSL (Force Shift Left) mode and an On1x mode (i.e., left shifting on each clock cycle). The feedback clock that tracks the phase of the reference clock (which, in turn, is derived from the system clock) is initially delayed in a coarse phase detector prior to applying it to the coarse phase detection window. Two delayed versions of the feedback clock are sampled by the reference clock to generate a pair of phase information signals, which are then used to establish an advanced phase equal (APHEQ) signal. The APHEQ signal advances onset of the PHEQ (phase equalization) phase and is used to terminate the ForceSL and On1x modes, thereby preventing wrong ForceSL exit due to clock jitter or feedback path overshooting during On1x exit.Type: GrantFiled: May 18, 2004Date of Patent: September 2, 2008Assignee: Micron Technology, Inc.Inventor: Kang Yong Kim
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Patent number: 7421607Abstract: An apparatus and method is disclosed to compensate for skew and asymmetry of a locally processed system clock used to synchronize an output signal, e.g., a data signal or a timing signal, from a logic circuit, for example a memory device. A first phase detector, array of delay lock loop (DLL) delay elements and accompanying circuitry are disclosed to phase-lock the rising edge of the output signal with the rising edge of the system clock XCLK signal. Additionally, a comparator circuit, a register delay, an array of DLL delay elements and accompanying circuitry are disclosed to add or subtract delay from the falling edge of the DQ signal in order to produce a symmetrical output of the DQ signal.Type: GrantFiled: May 21, 2007Date of Patent: September 2, 2008Assignee: Micron Technology, Inc.Inventors: Wen Li, Aaron Schoenfeld, R. Jacob Baker
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Patent number: 7421608Abstract: A method and a system for operating a dental operating chair connected to a computer, comprising operating elements and/or state indicators arranged on the dental operating chair, an interface via which the information is transmitted from the dental operating chair to the computer, in the form of function codes, by the operating elements and/or state indicators, and a memory region on the computer, in which at least one action associated with a function code is stored. To adapt the operating elements or the operating surface, software for managing the function codes is provided on the computer, by which the action associated with the function codes and stored in a configuration file is initiated. The allocation of the function codes of the operating elements and/or the state indicators of the dental operating chair to the PC actions can be configured by changing the configuration file.Type: GrantFiled: December 12, 2003Date of Patent: September 2, 2008Assignee: Sirona Dental Systems GmbHInventor: Roger Schron
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Patent number: 7421609Abstract: Systems and methods for circuits which can reduce the average frequency of a clock signal while keeping the maximum frequency of the clock signal are disclosed. Embodiments of these systems and methods may allow for a circuit which receives a clock signal and can output a clock signal with a frequency which is on average some ratio of the frequency of the received clock signal, but still has a maximum frequency which is substantially equal to the frequency of the received clock signal. In one mode of operation, these circuits may output a clock signal substantially identical to a received clock signal, while in another mode of operation these circuits may output a clock signal substantially identical to a received clock during a time interval, thus reducing the average frequency of the output clock signal with respect to the received clock signal while maintaining the maximum frequency of the received clock signal.Type: GrantFiled: July 14, 2005Date of Patent: September 2, 2008Assignee: Kabushiki Kaisha ToshibaInventor: Toshihiko Himeno
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Patent number: 7421610Abstract: A clock generation circuit for an integrated circuit device, such as an SOC, has increased test coverage. The clock generation circuit includes first and second latches that receive an input clock signal at their clock inputs and a selector that receives at first and second data inputs respectively, the input clock signal and an output of the second latch circuit, which is a divided clock signal. A logic gate has a first input connected to an output of the first latch and a second input that receives a scan mode signal. The logic gate generates a selector control signal provided to the selector.Type: GrantFiled: March 6, 2006Date of Patent: September 2, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Arnab K. Mitra, Amrit Singh, Nitin Vig
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Patent number: 7421611Abstract: A system and method are disclosed for dividing a network into clock partitions to limit the overhead created by transmitting clock sources. A clock partition can be implemented through several methods. A first method turns off the clock topology exchange on ports connected to the nodes outside the partition. A second method appends a four-byte partition identifier to network clock distribution protocol (NCDP) messages. A third method uses private network-network interface (PNNI) peer group identification to determine the clock partition group.Type: GrantFiled: September 6, 2005Date of Patent: September 2, 2008Assignee: Cisco Technology, Inc.Inventors: Krishna Sundaresan, Chandrasekar Krishnamurthy, Mahesh Chellappa
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Patent number: 7421612Abstract: A method of failure recovery in a network element is disclosed. The method includes indicating to a number of forwarding engines that a forwarding engine has completed a switchover operation and causing at least one of the forwarding engines to acknowledge that the forwarding engine has completed the switchover operation in response to the indication.Type: GrantFiled: January 13, 2003Date of Patent: September 2, 2008Assignee: Cisco Technology, Inc.Inventors: Marcus A. Maranhao, Michael Roy Smith, John M. Knight, Rohit Shrivastava, Ana H. Burghelea
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Patent number: 7421613Abstract: The system of the present invention is devised so that the execution of all jobs that access all of the logical volumes containing a physical volume in which trouble has occurred can be stopped at least until there is a recovery from this trouble. The schedule management part manages the timing at which a given job registered in the client is executed by the service server. The execution managing part performs the actual exchange of data with the service server. This part performs management of the data format of the data that is exchanged with the service server, address management of the service server that is the partner in data exchange, control of the circuit connections, control relating to data transmission and reception, and the like. The trouble recovery management part waits until receiving a notification from the managing server that there has been a recovery from the trouble occurring in a logical volume of the storage device.Type: GrantFiled: August 27, 2004Date of Patent: September 2, 2008Assignee: Hitachi, Ltd.Inventor: Hironobu Nakaya
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Patent number: 7421614Abstract: A method and apparatus are provided for enhancing the performance of storage systems to allow recovery after all types of suspensions in remote copy operations. Data is synchronized after an interruption in transfer between a first storage volume of a primary storage system and a first storage volume of a secondary storage system which also includes a second storage volume. After the interruption is detected, at the primary storage system, a record is provided of the data written onto the first storage volume of the primary storage system, and at the secondary storage volume a record is provided of the data written onto the first storage volume of the secondary storage system. Then, at least a partial copy of the record of the data written onto the first storage volume of the primary storage system is written onto the second storage volume. Using the copy, the first storage volume of the secondary storage system is synchronized with the second storage volume of the secondary storage system.Type: GrantFiled: November 13, 2006Date of Patent: September 2, 2008Assignee: Hitachi, Ltd.Inventor: Naoki Watanabe
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Patent number: 7421615Abstract: Remote access to a platform management system, for example via an intelligent platform management interface (IPMI), is maintained despite a failure affecting a local area network (LAN) controller. Failover to a second, operational LAN controller can be achieved by monitoring the status of the LAN controllers, and using a selector to couple a different LAN controller to a platform controller if the LAN controller currently coupled to the platform controller fails.Type: GrantFiled: September 27, 2004Date of Patent: September 2, 2008Assignee: Dell Products L.P.Inventors: Yinglin Yang, Jinsaku Masuyama
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Patent number: 7421616Abstract: A replicated state machine includes multiple state machine replicas. In response to a request from a client, the state machine replicas can execute a service for the request in parallel. Each of the state machine replicas is provided with a request manager instance. The request manager instance includes a distributed consensus means and a selection means. The distributed consensus means commits a stimulus sequence of requests to be processed by each of the state machine replicas. The selection means selects requests to be committed to the stimulus sequence. The selection is based on an estimated service time of the request from the client. The estimated service time of the request from the client is based on a history of service times from the client provided by a feedback from the state machine replicas. As such, requests from multiple clients are serviced fairly.Type: GrantFiled: March 9, 2005Date of Patent: September 2, 2008Assignee: International Business Machines CorporationInventors: Henry E. Butterworth, Paul J. Quelch
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Patent number: 7421617Abstract: A system and method is provided for optimizing restoration of stored data. A request for data to be restored to any point in time is received. A current state of the data is determined. One or more data blocks required to modify the data from the current state to the any point in time requested are identified. The data at the any point in time is restored within a storage medium using the identified one or more data blocks.Type: GrantFiled: August 30, 2005Date of Patent: September 2, 2008Assignee: Symantec CorporationInventors: Curtis Anderson, John P. Woychowski, Pratik Wadher
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Patent number: 7421618Abstract: In an information processing system including one or a plurality of processors, a diagnostic program is executed with a predetermined frequency to diagnose the processors. The diagnostic program generates one or a plurality of processes or threads at a predetermined frequency, at predetermined time intervals, for example, to diagnose the processors. A generated process or thread executes diagnosis on each processor, and the process or thread that detected a fault in the processor finishes its execution by storing fault information in storage. The process or thread of another processor other than the faulty processor refers to the fault information about the faulty processor and executes a troubleshooting process.Type: GrantFiled: December 22, 2004Date of Patent: September 2, 2008Assignee: Hitachi, Ltd.Inventors: Masanao Ito, Tadayuki Sakakibara
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Patent number: 7421619Abstract: A method, apparatus, and computer program product are disclosed for performing in-memory hardware tracing in a processor using an existing system bus. The processor includes multiple processing units that are coupled together utilizing the system bus. The processing units include a memory controller that controls a system memory. Information is transmitted among the processing units utilizing the system bus. The information is formatted according to a standard system bus protocol. Hardware trace data is captured utilizing a hardware trace facility that is coupled directly to the system bus. The system bus is utilized for transmitting the hardware trace data to the memory controller for storage in the system memory. The memory controller is coupled directly to the system bus. The hardware trace data is formatted according to the standard system bus protocol for transmission via the system bus.Type: GrantFiled: February 11, 2005Date of Patent: September 2, 2008Assignee: International Business Machines CorporationInventors: Ra'ed Mohammad Al-Omari, Alexander Erik Mericas, William John Starke
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Patent number: 7421620Abstract: A method of abstracting information through object interfaces is described. The object interfaces are used to present platform device information in a pre-boot service environment. Firmware tables such as Advanced Configuration and Power Interface and System Management Basic Input/Output System may be used to auto-configure diagnostic test suites through an abstracted software interface.Type: GrantFiled: April 7, 2005Date of Patent: September 2, 2008Assignee: Intel CorporationInventor: Russell L. Carr
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Patent number: 7421621Abstract: Application testing is disclosed. A definition of a test to be performed on a subject application is received in a generic form not specific to the subject application. The test is performed by exchanging data with the subject application, as required to perform the test, using a test connector application associated with the subject application to do at least one of (1) convert an input data to be supplied to the subject application during the test from a generic data format not specific to the subject application into an application-specific data format associated with the subject application, if the application-specific data format is different than the generic data format and (2) normalize an output data received from the subject application in the application-specific data format into the generic data format not specific to the subject application, if the application-specific data format is different than the generic data format.Type: GrantFiled: September 17, 2004Date of Patent: September 2, 2008Assignee: Matador Technologies Corp.Inventor: Gustavo Zambrana
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Patent number: 7421622Abstract: A recording medium for storing start position information for each zone and a method of managing data using the information. In a disc having a plurality of zones which form a group, and a spare area which is allocated at the start portion or the end portion of the group for replacing defects, when start logical sector numbers of each zone are changed by slipping replacement during initialization or reinitialization, the information is stored in the defect management area to thereby increase the compatibility of the medium. In particular, by the method of managing data using information stored in a defect management area, generation of errors is prevented in reading or writing due to the change of a physical position of a real-recorded file which are caused by wrong calculation of the start logical sector numbers for each zone.Type: GrantFiled: May 9, 2006Date of Patent: September 2, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: Jung-wan Ko
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Patent number: 7421623Abstract: Systems, methods and media for controlling temperature of a system are disclosed. More particularly, hardware, software and/or firmware for controlling the temperature of a computer system are disclosed. Embodiments may include receiving component temperatures for a group of components and selecting a component to perform an activity based at least partially on the component temperatures. In one embodiment, the lowest temperature component may be selected to perform the activity. Other embodiments may provide for determining an average temperature of the components, and if the average temperature exceeds a threshold, delaying or reducing the performance of the components. In some embodiments, components may include computer processors, memory modules, hard drives, etc.Type: GrantFiled: July 8, 2004Date of Patent: September 2, 2008Assignee: International Business Machines CorporationInventor: Julianne Frances Haugh
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Patent number: 7421624Abstract: A data recovery apparatus and method used for a flash memory, which can recover data damaged or lost when power supplied to the flash memory is cut off while data operations are being consecutively performed on at least one data stored in the flash memory. The data recovery apparatus performs a data operation at each of a plurality of consecutive logical addresses, and if the data operations performed at the logical addresses are successful, records a mark value in a last index area of a plurality of consecutive index areas respectively corresponding to the consecutive logical addresses.Type: GrantFiled: January 19, 2005Date of Patent: September 2, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Ji-hyun In, Hyo-jun Kim, Kwang-yoon Lee, Tae-sun Chung
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Patent number: 7421625Abstract: A system for identifying data connection attributes is disclosed. The system comprises a connection monitor that identifies an operational attribute of a data connection. The system also includes a signal module that activates operation of a status indicator of the data connection such that a manner of operation of the status indicator is associated with the operational attribute. Methods for operating the system are also disclosed.Type: GrantFiled: May 26, 2005Date of Patent: September 2, 2008Assignee: Microsoft CorporationInventors: Firdosh K. Bhesania, Mark E. Maszak, John Charles Dunn