Abstract: A semiconductor device for programmable logic or operation processing includes a semiconductor chip; a first connecting terminal for electrically connecting the semiconductor device to a printed circuit board on which the semiconductor device is to be mounted; a second connecting terminal for electrically connecting the semiconductor device to another semiconductor device; and a packaging material for sealing the semiconductor chip, the first connecting terminal, and the second connecting terminal. Then, the first connecting terminal is formed of the lead frame, and the second connecting terminal is formed on the wiring board.

Abstract: A packaged integrated circuit device is disclosed which includes a leadframe comprising a die paddle and a plurality of lead fingers, a plurality of integrated circuit die positioned above the paddle in a stacked arrangement, a plurality of conductive structures for coupling each of the plurality of die to the lead fingers and a body of encapsulant material positioned around the plurality of die and the plurality of conductive structures, wherein the plurality of lead fingers are folded such that a portion of the lead fingers is positioned above the top surface of the body of encapsulant material.

Abstract: Disclosed in this specification is a wireless semiconductor package with multiple dies, at least two of which are attached to a thermally and electrically conductive heat sink. The package provides an efficient means for dissipating heat.

Abstract: The present invention is related to a method of producing a semiconductor device and the resulting device. The method is suitable in the first place for producing high power devices, such as High Electron Mobility Transistors (HEMT), in particular HEMT-devices with multiples source-gate-drain groups or multiple base bipolar transistors. According to the method, the interconnect between the source contacts is not produced by air bridge structures, but by etching vias through the semiconductor layer directly to the ohmic contacts and applying a contact layer on the backside of the device.

Abstract: The object of the present invention is to provide an adhesion film for semiconductor that is capable of bonding a semiconductor chip to a lead frame tightly at an adhesion temperature lower than that of the adhesion film of a traditional polyimide resin without generation of voids and that can also be used for protection of lead frame-exposed area, a thermoplastic resin composition for semiconductor for use in the adhesive agent layer therein, and a lead frame having the adhesive film and a semiconductor device; and, to achieve the object, the present invention provides a thermoplastic resin composition for semiconductor, comprising a thermoplastic resin obtained in reaction of an amine component containing an aromatic diamine mixture (A) containing 1,3-bis(3-aminophenoxy)benzene, 3-(3?-(3?-aminophenoxy)phenyl)amino-1-(3?-(3?-aminophenoxy)phenoxy)benzene and 3,3?-bis(3?-aminophenoxy)diphenylether, and an acid component (C), an adhesion film for semiconductor using the same, a lead frame having the adhesion fi

Abstract: A lead frame of the present invention includes: a die pad on which a device is mounted; a first connection terminal which is provided around the die pad, and the lower surface of which serves as an external terminal; a second connection terminal which is provided around the die pad and electrically independent of the die pad, and the upper surface of which serves as an external terminal; a bent part provided between the first and the second connection terminals and connecting the first and the second connection terminals; and an outer frame. The bent part is bending-processed in a direction perpendicular to a face of the die pad. Within the outer frame, electronic component regions are formed adjoining each other and each including a die pad, and the first and the second connection terminals. The adjoining electronic components are connected through the first or the second connection terminal.

Abstract: To provide a thin film device which becomes possible to be formed in the portion which has been considered impossible to be provided with such device by the conventional technique, and to provide a semiconductor device which occupies small space and which has high shock resistance and flexibility, a device formation layer with a thickness of at most 50 ?m which was peeled from a substrate by a transfer technique is transferred to another substrate, hence, a thin film device can be formed over various substrates. For instance, a semiconductor device can be formed so as to occupy small space by pasting a thin film device which is transferred to a flexible substrate onto a rear surface of a substrate of a panel, by pasting directly a thin film device onto a rear surface of a substrate of a panel, or by transferring a thin film device to an FPC which is pasted onto a substrate of a panel.

Abstract: A stacked-type chip package structure including a first package structure, a second package structure, and a first molding compound is provided. The first package structure includes a first substrate, and a first chip stacked thereon and electrically connected thereto. The second package structure is stacked on the first package structure, and includes a second substrate, a second chip, and a plurality of solder blocks. The second chip is electrically connected to the second substrate, and the second substrate is electrically connected to the first substrate. The second chip is fixed on the first chip through an adhesive layer. The solder blocks are disposed on the back of the second substrate. The first molding compound is disposed on the first substrate and encapsulates the first package structure and the second package structure. The first molding compound has a recess for exposing the solder blocks.

Abstract: A semiconductor device, including methods and arrangements for making the same, are described. The device includes an integrated circuit die having a plurality of bond pads. At least one bond pad on the active surface of the die is an extended I/O pad. Each extended I/O pad extends to at least one peripheral side edge of the die.

Abstract: Disclosed are IC partitioned packaging and interconnection constructions that provide for improved distribution of power, ground, cross chip interconnections and clocks.

Abstract: An electronic component sealing substrate capable of configuring an electronic apparatus in which the influence of electromagnetic coupling and radio frequency noises between an electrical connection path and a micro electronic mechanical system is suppressed is provided.

Abstract: Disclosed are IC package structures having stair stepped layers and which have no plated vias. Such structures can be fabricated either as discrete packages or as strips such as might be beneficial in for use with memory devices wherein critical or high speed signals can be routed along the length of the multi-chip strip package without having to have the signals ascend and descend from the interconnection substrate on which the assembly is mounted to the IC package termination and back as the signal transmits between devices.

Abstract: A co-fired ceramic module includes a ceramic substrate and at least one heat-emitting device. The ceramic substrate has at least one high thermal conductivity material. The heat-emitting device is disposed on the ceramic substrate. The substrate further includes a cavity and the heat-emitting device is disposed in the cavity.

Abstract: An insulating resin 4 is packed between a semiconductor chip 5 and a tape carrier 1, with taper portions 4a formed on the side faces, and a resin layer 7 is formed in close contact with the rear face of the semiconductor chip 5, the tape carrier 1, and the taper portions 4a; further, by forming a metal layer 9 having a depression 8 and formed with a shape enabling close contact with the resin layer 7, the metal layer 9, which functions as a heat spreader, can be fastened stably to the semiconductor chip 5, and moreover heat generated from the semiconductor chip 5 is transmitted efficiently not only from the rear face of the semiconductor chip 5 but from the side faces thereof to the metal layer 9 for heat dissipation, whereby heat dissipation can be improved.

Abstract: A method for fabricating a device, a semiconductor chip package, and a semiconductor chip assembly is disclosed. One embodiment includes applying at least one semiconductor chip on a first form element. At least one element is applied on a second form element. A material is applied on the at least one semiconductor chip and on the at least one element.

Abstract: A semiconductor device package incorporating a connector that reduces manufacturing operations and enables efficient manufacturing. The semiconductor device package includes a primary molded product and a secondary molded product. The primary molded product includes a semiconductor device, a lead connected to the semiconductor device, and a plug terminal formed by at least part of the lead. The primary molded product envelops the semiconductor device and part of the lead in a first resin material. The secondary molded product envelops the primary molded product in a second resin material and includes a connector guide surrounding the plug terminal and used to guide insertion of a holder holding a socket terminal connectable to the plug terminal.

Abstract: A metallic interconnect structure (200) for connecting a gold bump (205) and a copper pad (212), as used for example in semiconductor flip-chip assembly. A first region (207) of binary AuSn2 intermetallic is adjacent to the gold bump. A region (208) of binary AuSn4 intermetallic is adjacent to the first AuSn2 region. Then, a region (209) of binary gold-tin solid solution is adjacent to the AuSn4 region, and a second region (210) of binary AuSn2 intermetallic is adjacent to the solid solution region. The second AuSn2 region is adjacent to a nickel layer (213) (preferred thickness about 0.08 ?m), which covers the copper pad. The nickel layer insures that the gold/tin intermetallics and solutions remain substantially free of copper and thus avoid ternary compounds, providing stabilized gold bump/solder connections.

Abstract: A method for forming and releasing interconnects by using a dummy substrate. The method comprises applying metallization to the dummy substrate for creating a relatively strong bond between the metallization and the dummy substrate and a weak bond between a first end of each of the interconnects and the metallization; weakly bonding the first ends to the metallization; shaping the interconnects; releasing the weak bond between the metallization and the first ends by using a reduced release force to release the first end of the interconnects from the dummy substrate.

Abstract: A stackable semiconductor package is revealed, primarily comprising a chip carrier, a chip, and a plurality of bottom bump sets. The chip carrier has a plurality of stacking pads disposed on the top surface and a plurality of bump pads on the bottom surface. The chip is disposed on and electrically connected to the chip carrier. The bottom bump sets are disposed on the corresponding bump pads and each consists of a plurality of conductive pillars. Solder-filling gaps are formed between the adjacent conductive pillars for filling and holding solder paste so that the soldering area can be increase and the anchoring effect can be enhanced due to complicated the soldering interfaces to achieve higher soldering reliability and less cracks at the soldering interfaces.

Abstract: A semiconductor package with crack-restraining ring surfaces is revealed, primarily comprising a chip carrier, a chip disposed on the chip carrier, and a plurality of belfry-like bumps. The belfry-like bumps are disposed on a plurality of corresponding conductive pads on the bottom surface of the chip carrier as external terminals. Each belfry-like bump has at least a crack-restraining ring surface parallel to the conductive pads and between the top of the belfry-like bump and the conductive pad to prevent the spreading of the soldering cracks and to enhance the soldering strengths at the micro contacts to achieve higher package reliability.

Abstract: A semiconductor device including a semiconductor substrate, a contact pad, a passivation layer, a bump, and a seeding layer is provided. The semiconductor substrate has an active surface. The contact pad is disposed on the active surface. The passivation layer is disposed on the active surface and exposes a central part of the contact pad. The seeding layer is disposed on the exposed central part of the contact pad. The bump has a top surface, a bottom surface opposite to the top surface, and a side surface connecting the top surface and the bottom surface. The bump is disposed on the seeding layer. The bump is placed in contact with the seeding layer by the bottom surface and by part of the side surface.

Abstract: The symbolization of a semiconductor device (100) is incorporated in a thin sheet (130) attached to the top of the device, facing outwardly with its bare surface. The material of the sheet (about 1 to 10 ?m thick) includes regions of a first optical reflectivity and a first color, and regions (133) of a second optical reflectivity and a second color, which differ from, and contrast with, the first reflectivity and color. Preferred choices for the sheet material include the compound o-cresol novolac epoxy and the compound bisphenol-A, more preferably with the chemical imidazole added to the film material. A preferred embodiment of the invention is a packaged device with a semiconductor chip a (101) connected to a substrate (102); the connection is achieved by bonding wires (111) forming an arch with a top 111a. The chip, the wire arches, and the substrate are embedded in an encapsulation material (120), which borders on the attached top sheet so that the arch tops touch the border (131).

Abstract: In order to realize a semiconductor device which is easily mounted on a circuit board and which has high mounting reliability, a semiconductor device 1 of the present invention includes: a semiconductor substrate 2; and an Au bump 3 provided on an electrode 21. The Au bump 3 is provided with a projection 3a. Also, on a surface of the Au bump 3, a solder layer 32 is formed via a Ni layer 31. The projection 3a makes it possible to easily mount the semiconductor device 1 by applying a small weight. Further, even if the amount of solder 62 supplied on an electrode 61 on a circuit board 6 is reduced, it is possible to bond the semiconductor device with a sufficient amount of solder during mounting. Furthermore, because a Ni layer 31 prevents dissolution of the bump, it is possible to ensure high mounting reliability.

Abstract: A semiconductor device comprises: a package substrate having a plurality of bonding electrodes arranged in a peripheral region of a main surface thereof and wirings connected to the respective bonding electrodes and electrolessly plated; a semiconductor chip mounted on the package substrate; a plurality of wires connecting pads of the semiconductor chip and the bonding electrodes; a sealing body for sealing the semiconductor chip and the wires with resin; and a plurality of solder balls arranged on the package substrate. The wirings are formed only at the inner side of the plurality of bonding electrodes on the main surface of the package substrate, and no solder resist film is formed at the outer side of the plurality of bonding electrodes. With this arrangement, the region outside the bonding electrodes can be minimized and the semiconductor device can be downsized without changing the size of the chip mounted thereon.

Abstract: A bonding pad design is disclosed that includes one or more pad groups on a semiconductor device. Each pad group is made up of two or more bonding pads that have an alternating orientation, such that adjacent bonding pads have their bond ball on opposite sides in relation to the adjacent bonding pad.

Abstract: A process of fabricating a metal oxide film includes depositing a multiphase, metal-based precursor film comprising the metal and an oxide of the metal on a substrate. The process further includes thermally growing a metal oxide film from the precursor film in a humid atmosphere for a predetermined period of time and at a predetermined temperature.

Abstract: A driving circuit of a liquid crystal display panel includes a substrate, a plurality of driver IC chips located on the substrate, a current supplier, and a first conductive wire set. The first conductive wire set has a plurality of conductive wire segments for connecting the driver IC chips in parallel to the current supplier. Furthermore, the conductive wire segments each have a form, such that paths formed of the conductive wire segments from the current supplier to the respective driver IC chips have an equal resistance, and, accordingly, each of the driver IC chips obtain the same input voltage. Hence, a problem of band mura is avoided.

Abstract: A semiconductor device and its manufacture method wherein the semiconductor substrate has first and second insulating films, the first insulating film being an insulating film other than a silicon nitride film formed at least on a side wall of a conductive pattern including at least one layer of metal or metal silicide, and the second insulating film being a silicon nitride film formed to cover the first insulating film and the upper surface and side wall of the conductive pattern. The first insulating film may be formed to cover the upper surface and side wall of the conductive pattern. A semiconductor device and its manufacture method are provided which can realize high integrated DRAMs of 256 M or larger without degrading reliability and stability.

Abstract: A wafer structure with a buffer layer is provided. The wafer structure comprises a wafer which has at least one pad formed thereon, a passivation layer formed on the wafer for partially exposing the at least one pad, a buffer layer formed on the passivation layer and the pad, and an under bump metallurgy (UBM) formed on the buffer layer. The buffer layer comprises a thickness-increased inner buffering member made from aluminum and located between the UBM and the pad to enhance the shock-absorbing ability of the wafer in a drop test to avoid the conductive bump bonded to a substrate coming off or cracking. The invention can also enhance the bonding between the conductive bump and the UBM. The buffer layer may further comprise an outer buffering member made of polyimide, coated on the passivation layer and partially arranged between the UBM and the passivation layer.

Abstract: A pillar structure that is contacted by a vertical contact is formed in an integrated circuit. A hard mask is formed and utilized to pattern a least a portion of the pillar structure. The hard mask comprises carbon. Subsequently, the hard mask is removed. A conductive material is then deposited in a region previously occupied by the hard mask to form the vertical contact. The hard mask may, for example, comprise diamond-like carbon. The pillar structure may have a width or diameter less than about 100 nanometers.

Abstract: The present disclosure provides a method for fabricating an integrated circuit. The method includes forming an energy removable film (ERF) on a substrate; forming a first dielectric layer on the ERF; patterning the ERF and first dielectric layer to form a trench in the ERF and the first dielectric layer; filling a conductive material in the trench; forming a ceiling layer on the first dielectric layer and conductive material filled in the trench; and applying energy to the ERF to form air gaps in the ERF after the forming of the ceiling layer.

Abstract: According to the present invention, for collective molding of semiconductor devices, a semiconductor substrate includes first electrodes formed on the front side, second electrodes formed on the back side and connected to external electrode terminals, and a plurality of semiconductor element mounting regions 203. Along partition lines 202 for partitioning the semiconductor substrate into the plurality of semiconductor element mounting regions 203, recessed portions 205 are formed on the partition lines 202 on the front side of the semiconductor substrate.

Abstract: A semiconductor storage device includes a memory cell transistor and a selective transistor formed on a semiconductor substrate, a first interlayer insulating film which is formed on the semiconductor substrate, an insulating layer formed by use of a material higher in dielectric constant than the first interlayer insulating film, a contact plug which penetrates the insulating layer and the first interlayer insulating film and which is electrically connected to a drain of the selective transistor, and a bit line which is in contact with the contact plug. A partial region in the bottom surface of the bit line is located lower than the upper surface of the contact plug, and is in contact with the surface of the insulating layer, and the partial region is also in contact with the side surface of the contact plug.

Abstract: A stacked type chip package structure including a package structure, a corresponding substrate, and a number of second bumps is provided. The package structure includes a first chip, a second chip, a number of first bumps, and a first underfill. The first chip is disposed above the second chip. The first bumps are disposed between the first chip and the second chip for electrically connecting the first chip and the second chip. The first underfill is used to fill between the first chip and the second chip and encapsulates the first bumps. The package structure is disposed above the corresponding substrate in a reverse manner, such that the first chip is disposed between the second chip and the corresponding substrate. The second bumps are disposed between the second chip and the corresponding substrate, such that the second chip is electrically connected to the corresponding substrate through the second bumps.

Abstract: An integrated circuit package system includes: providing a substrate; attaching a base die to the substrate, the base die having a relief region with a shaped cross-section; and connecting a bond wire between an active base surface of the base die and the substrate, the bond wire extending through the shaped cross-section of the relief region.

Abstract: A semiconductor die is provided on a spacer, the die having first and second opposite edges which extend beyond respective first and second opposite edges of the spacer, the first edge of the die extending beyond the first edge of the spacer to a lesser extent than the second edge of the die extends beyond the second edge of the spacer. Furthermore, a first semiconductor die has a plurality of bond pads thereon, a second semiconductor die has a plurality of bond pads thereon, and a substrate has a plurality of bond pads thereon. Each of a first plurality of wires connects a bond pad on the first semiconductor die with a bond pad on the second semiconductor die, and each of a second plurality of wires connects a bond pad on the second semiconductor die with a bond pad on the substrate.

Abstract: A dicing die attachment film includes a die attachment layer attached to one surface of a semiconductor wafer; a dicing film layer attached to a dicing die that is used for cutting the semi-conductor wafer into die units; and an intermediate layer laminated between the die attachment layer and the dicing film layer. The intermediate layer has a modulus of 100 to 3000 MPa, which is greater than a modulus of the die attachment layer and the dicing film layer.

Abstract: A thermosetting composition for an optical semiconductor containing a silicone resin having a cyclic ether-containing groups and a thermosetting agent capable of reacting with said cyclic ether-containing group, wherein the silicone resin has, as the principal components, a structural unit expressed by the following formula (1) and a structural unit expressed by the following formula (2). The content of the structural unit expressed by the formula (1) is 0.6 to 0.95 (on a molar basis) and the content of the structural unit expressed by the formula (2) is 0.05 to 0.4 (on a molar basis) when total number of the structural units contained is taken as 1, and the content of the cyclic ether-containing group is 5 to 40 mol %: [formula 1] (R1R2SiO2/2)??(1) and [formula 2] (R3SiO3/2)??(2) at least one of R1, R2 and R3 represents a cyclic ether-containing group, R1, R2 and R3 other than the cyclic ether-containing group represent hydrocarbon having 1 to 8 carbon atoms or fluoride thereof.

Abstract: A variety of toy polariscopes are simpler in design and less costly than precision instruments used in scientific research and stress analysis of materials and structures. The toy polariscopes are designed for a variety of objects that may exhibit photoelastic properties such as glass, plastic, Plexiglas, gel candle material and other gels, and even edible photoelastic objects. They are specially designed for objects of various sizes with a variety of purposes such as objects to enhance learning in a variety of conditions and experiences. Special objects are designed to go with the toy polariscopes such as edible and inedible photoelastic objects, photoelastic candle material, a variety of photoelastic/photoplastic stands capable of a variety of displays in interaction with other designed photoelastic objects capable of a variety of interaction and displays. Other optical phenomena may also be observed.

Abstract: This invention describes molds made from alicyclic co-polymers that are useful in the production of contact lenses and methods for their use.

Abstract: A top mold capable of holding a substrate and a bottom mold including a cavity having a molding portion corresponding to a geometry of a lens are prepared. Then the substrate with a plurality of chips mounted thereon is fixed to the top mold. Then a translucent resin material is introduced into the cavity and alters to be molten resin. Then the top mold and the bottom mold are closed together to immerse the plurality of chips in the molten resin and also distribute the molten resin in the cavity uniformly. Then the molten resin alters to be a translucent mold product to provide a lens member. Subsequently the top mold and the bottom mold are opened to detach from the bottom mold the substrate bearing the lens member. Then the substrate bearing the lens member is removed from the top mold.

Abstract: The invention relates to an agglomeration apparatus comprising a fluid bed, a source of descending particles, one or more nozzles for atomizing an agglomeration fluid and an outlet for discharging the agglomerated particles. In the fluid bed, the particles are guided towards the outlet and pass an outer and an inner zone. The apparatus provides for the production of an improved agglomerated particulate product with a low content of fine particles.

Abstract: A fabrication method is provided for forming a multilayer preform with a barrier layer and determining the existence of the barrier layer in the multilayer preform. The barrier layer may consist essentially of a polymeric material without any optical brighteners. The multilayer preform may be illuminated with ultra-violet (UV) light. The fluorescence caused by the interaction of the UV light with the multilayer preform may be measured to generate a fluorescence signal. Based on the fluorescence signal, the existence of the barrier layer in the multilayer preform may be determined.

Abstract: A refractory self-flow filler mortar, includes in mass % with relation to the basic refractory material, at least 1% and at most 10% of non-granulated spherical particles with median size greater than 0.1 ?m and less than or equal to 2 mm and further includes in mass % with relation to the total dry mass of the mortar, less than 4.5% of silica (SiO2) and between 1% and 8% water, the standard deviation of the non-granulated spherical particle size being less than 100%.

Abstract: A method of monitoring the performance of a pressure intensifier for use in the manufacture of a composite part. The method comprises: placing an array of pressure sensors adjacent a curved region of a mould tool; compressing the pressure sensors between a pressure intensifier and the mould tool; and monitoring the distribution of pressure across the curved region of the mould tool with the array of pressure sensors.

Abstract: Methods for fabricating compressible object are described. These compressible objects may be utilized in drilling mud and with a drilling system to manage the density of the drilling mud. The method includes selecting an architecture for a compressible object; selecting a wall material for the compressible object; and fabricating the compressible object, wherein the compressible object has a shell that encloses an interior region, and has an internal pressure (i) greater than about 200 pounds per square inch at atmospheric pressure and (ii) selected for a predetermined external pressure, wherein external pressures that exceed the internal pressure reduce the volume of the compressible object.

Abstract: The invention relates to a device for producing pellets from a plastic melt by extrusion, comprising a perforated plate from which the plastic melt is extruded at a pressure above the ambient pressure; a process chamber into which the plastic melt is extruded; a chopping device for chopping strands of the plastic melt extruded from the perforated plate into individual granules, the process chamber being filled with a process fluid; and a pumping device which supplies the process fluid to the process chamber at a pressure above the ambient pressure, the pressure of the process fluid with the therein contained granules being reduced downstream of the process chamber.

Abstract: In a method and an apparatus for producing pipes having a transverse profile from thermoplastic material, mold segment halves are used on a molding path and are circulated in pairs. A main conveying device is provided for returning the mold segment halves, the main conveying device being designed like a gantry crane. A conveying bridge encompassing the molding path is provided with two conveying carriages which are displaceable at right angles to a direction of production and in opposite directions relative to each other and to which is in each case attached a downwards facing conveying arm comprising a holding device for in each case one mold segment half. Downstream of the downstream end of the molding path are provided parking positions for additional mold segment halves. Disposed downstream of the molding path is an auxiliary conveying device which is provided for removing the additional mold segment halves from the molding path in order to subsequently return them to the parking positions.

Abstract: A fiber making device, fiber making method, and apparatus which incorporates a series of two or more stacked, thin circular die plates, two end plates and two enclosure plates, where all of the plates cooperate to form a chamber having opposite ends and define a first end and a second end. The first end will receive material to be formed into fibers and the second end will receive a fiberizing fluid, although the second end could be used to supply a second fiber forming fluid to form composite fibers. All of the die plates have a central opening to receive fiber forming material, and at least one of the die plates has an outflow edge peripheral to the plate which will define a spinneret orifice, which is in fluid communication with said central opening, and which will allow the flow of material along a radial path through which fibers can be extruded.

Abstract: A mold assembly device and method for assembling a semi-permanent mold assembly is disclosed, the mold assembly device includes a base die and a transfer frame, wherein the transfer frame is capable of transferring a core package to the base die and facilitates assembly of the transfer frame and the core package with the base die.