Abstract: A fluid contamination analyzer has a sample cell containing a trapping medium capable of trapping contaminants suspended in the aqueous fluid flowing through the trapping medium, a light source for illuminating the trapping medium to cause the entrapped contaminants generate a secondary radiation indicative of the identity and quantity of the contaminants, and a photodetector for receiving the secondary radiation. The fluid contamination analyzer has a reflective shell in the form of an ellipsoid extending at least partially around the sample cell and the detector, the sample cell being positioned at one of the focal points of the ellipsoid, and the photodetector at the other point of the ellipsoid to receive the secondary radiation reflected by the reflective shell.

Abstract: A method of manufacturing an analytical sample by a secondary ion mass spectrometry method is provided, which comprises a step of forming a separation layer over a substrate, a step of forming one of a thin film and a thin-film stack body to be analyzed over the separation layer, a step of forming an opening portion in one of the thin film and the thin-film stack body, a step of attaching a supporting body to one of a surface of the thin film and a surface of a top layer of the thin-film stack body, and a step of separating one of the thin film and the thin-film stack body from the substrate.

Abstract: An apparatus and method for selecting and dispensing coverglasses over specimens on slides for the purpose of viewing specimens through a microscope. The selecting device contains a suctioning mechanism for picking up a coverglass from a stack of coverglasses. It also contains the ability to bend the coverglass to assist in separating the coverglasses. The apparatus further contains a matched barrier to eliminate any coverglasses that may stick to the selected coverglass. The selecting device also contains spring members which aid in the dispensing of the coverglass. After the suctioning mechanism releases the coverglass, the spring members exert a force onto the coverglass to insure that it is released from the selecting device and placed onto the slide. After placement of the coverglass onto the slide, capillary action pushes air bubbles out from underneath the coverglass.

Abstract: Labels and methods of producing labels for use in clinical, analytical and pharmaceutical development assays are provided. Labels may comprise shape-encoded particles which may be coupled to ligands such as DNA, RNA and antibodies, where different shapes are used to identify which ligand(s) are present. Labels may also comprise reflectors, including retroreflectors and retroreflectors susceptible to analyte-dependent assembly for efficient homogeneous assays.

Abstract: A nanoparticle having a self assembly monolayer of molecules as a shell on the nanoparticle. The monolayer may include organic molecules working as surface enhanced Raman spectroscopy (SERS) reporters. Also, the core shell may include at least a receptor, and/or the like, to ensure that a target analyte can be bound for measurement with SERS. The target analyte may be organic, chemical, biological, inorganic, gas, liquid, solid, and so forth.

Abstract: In accordance with some embodiments, a ferroelectric polymer memory may be formed of a plurality of stacked layers. Each layer may be separated from the ensuing layer by a polyimide layer. The polyimide layer may provide reduced layer-to-layer coupling, and may improve planarization after the lower layer fabrication.

Abstract: A magnetoresistive element includes a stack formed by sequentially stacking a first fixed layer in which a magnetization direction is fixed, a first nonmagnetic layer, a free layer in which a magnetization direction is changeable, a second nonmagnetic layer, and a second fixed layer in which a magnetization direction is fixed, a first circumferential wall provided on the second nonmagnetic layer in contact with a circumferential surface of the second fixed layer to surround the second fixed layer, and made of an insulator, and a second circumferential wall provided on the first nonmagnetic layer in contact with a circumferential surface of the free layer to surround the free layer, and made of an insulator.

Abstract: A method of repairing a light emitting device which makes high quality image display possible even if a pin hole is formed during formation of an EL layer is provided. The method of repairing a light emitting device is characterized in that a reverse bias voltage is applied to an EL element at given time intervals to thereby reduce a current flowing into an EL element when the reverse bias voltage is applied to the EL element.

Abstract: A semiconductor manufacturing apparatus and substrate processing method includes a step of acquiring a measurement value based on a first detecting and a second detecting section and determining a first difference of measurement values between the first detecting section and the second detecting section, comparing between a previously stored second difference between measurement values concerning the first detecting section and the second detecting section, calculating a correction value for a pressure in a cooling-gas passage provided between a process chamber and a heating device depending upon the first difference when the first difference is different from the second difference, and correcting the pressure value based on the pressure correction value, and a step of processing the substrate by flowing a cooling gas through the cooling-gas passage while heating the process chamber, and placing the heating device and the cooling device under a control section depending upon a pressure value corrected.

Abstract: Typical testing of solder joints, (e.g. joints at printed circuit board pads) has not proven totally predictive of the ultimate performance of such joints. It has been found that this lack of reliability is, at least in part, due to the tendency during testing for these pads to lose adhesion to, or delaminate from, the underlying substrate. In contrast, such occurrence is not typical of phenomena induced during typical device usage. To remove this source of unreliability, a test structure is made together with the manufacturing device lot. The same pad processing is used and the pad size is substantially enlarged in the test structure. The test structure is employed to predict performance of devices in the lot and then the lot is processed accordingly.

Abstract: An apparatus and method for inspecting wafers at a reclaim factory is described. Embodiments of the invention describe an apparatus in which a wafer ID and wafer thickness may be simultaneously measured. A wafer is placed onto a sloped surface and positioned by aligning a notch in the wafer with a pin located on the surface, and by propping the wafer against a pair of laterally opposite restraints. In one embodiment, a foot-switch is used to trigger the simultaneous wafer ID and wafer thickness measurements.

Abstract: A method of measuring a diffusion length of a minority carrier in a silicon wafer by a surface photovoltage method including irradiating the surface-treated silicon wafer with ultraviolet radiation in an oxygen-containing atmosphere, and measuring a diffusion length of a minority carrier in a silicon wafer by a surface photovoltage method.

Abstract: The present invention provides a display device which forms thin film transistor circuits differing in characteristics from each other on a substrate in mixture and a fabrication method of the display device. On a glass substrate having a background layer which is formed by stacking an SiN film and an SiO2 film, a precursor film which is constituted of an a-Si layer or a fine particle crystalline p-Si layer is formed and the implantation is applied to the precursor film. Here, an acceleration voltage and a dose quantity are adjusted such that a proper quantity of dopant is dosed in the inside of the precursor film. When the precursor film is melted by laser radiation, the dopant dosed in the precursor film is activated and taken into the precursor.

Abstract: A method for balancing layer-caused compressive or tensile stress in a semiconductor die, die wafer or similar substrate uses a stress-balancing layer (SBL) attached to an opposite side from a stress-causing layer before the semiconductor die or wafer is significantly warped are provided. The SBL may also serve as, or support, an adhesive layer for die attach and be of a markable material for an enhanced marking method.

Abstract: An optical memory cell having a material layer associated with a pixel capable of emitting and receiving light. The material layer has phosphorescent material formed therein for storing data as light received from and emitted to the pixel.

Abstract: There are provided a method of manufacturing a nitride semiconductor light emitting device and the nitride semiconductor light emitting device manufactured by the method, the method including: forming a light emitting structure by sequentially growing a first conductivity nitride layer, an active layer and a second conductivity type nitride layer on a preliminary substrate for nitride single crystal growth; separating the light emitting structure in accordance with a size of final light emitting device; forming a conductive substrate on the light emitting structure; polishing a bottom surface of the preliminary substrate to reduce a thickness of the preliminary substrate; forming uneven surface structures by machining the preliminary substrate; selectively removing the preliminary substrate to expose portions of the first conductivity type nitride layer; and forming electrodes on the portions of the first conductivity type nitride layer exposed by selectively removing the preliminary substrate.

Abstract: A method for manufacturing a display device using light emitting diode chips contemplates manufacturing a plurality of light emitting diode (LED) chips using a porous template; forming a plurality of first electrodes on a substrate; attaching the LED chips to pixel sites on the first electrodes using fluidic self assembly (FSA); and forming a plurality of second electrodes on a top surface of the LED chips.

Abstract: A method for fabricating an array substrate for a liquid crystal display (LCD) is provided. A semiconductor layer and a transparent lower electrode formed on a substrate is provided and covered by a first dielectric layer serving as a gate dielectric layer and a capacitor dielectric layer. A gate electrode and an upper electrode comprising a transparent electrode portion and a metal electrode portion are formed on the first dielectric layer and covered by a second dielectric layer. A source/drain electrode, a planarization layer, and a pixel electrode are sequentially formed on the second dielectric layer, in which the source/drain electrode is electrically connected to the semiconductor layer through the first and second dielectric layers and the pixel electrode is electrically connected to the source/drain electrode through the planarization layer. An array substrate for an LCD is also disclosed.

Abstract: The invention is method for fabricating light emitting diodes. A layered semiconductor structure is provided on a growth substrate. The method includes using a pulsed laser to form an interfacial layer between the layered semiconductor structure and the growth substrate for subsequent substrate detachment and to simultaneously form light extracting elements on the layered semiconductor structure. The method reduces the number of steps required to fabricate a light emitting diode.

Abstract: A semiconductor layer contains, as a principal constituent, a Group III-V semiconductor compound, which may be represented by the general formula: AlxGayInzN, wherein x represents a number satisfying the condition 0?x<1, y represents a number satisfying the condition 0<y<1, and z represents a number satisfying the condition 0<z<1, with the proviso that x+y+z=1. The semiconductor layer is formed with a laser assisted metalorganic vapor phase epitaxy technique. A semiconductor light emitting device comprises the semiconductor layer and may be constituted as a semiconductor laser or a light emitting diode.

Abstract: A laser diode epitaxial wafer has an n-type GaAs substrate, an n-type cladding layer formed on the n-type GaAs substrate, an active layer formed on the n-type cladding layer, and a p-type cladding layer formed on the active layer. The n-type cladding layer, the active layer, and the p-type cladding layer are formed of an AlGaInP-based material. The p-type cladding layer has carbon as a p-type impurity. The p-type cladding layer has a carrier concentration in the range of not less than 8.0×1017 cm?3 and not more than 1.5×1018 cm?3.

Abstract: A physical quantity sensor includes a pair of physical quantity sensor chips that are inclined with respect to the bottom of an exterior mold package whose side surfaces are each inclined in a thickness direction by an angle ranging from 0° to 5° and are formed in proximity to the outer ends of the physical quantity sensor chips. It is possible to realize the inclination of stages without using molds, wherein absorption devices are used to absorb prescribed portions related to stages, which rotate about axial lines and are thus inclined with respect to a prescribed base. In manufacturing, a thin metal plate having a plurality of lead frames is placed on a base delimited by a clamp; then, intersecting points of intermediate portions formed between the lead frames are subjected to pressing so as to realize the inclination of stages.

Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.

Abstract: A method of forming a multijunction solar cell including an upper subcell, a middle subcell, and a lower subcell, including providing first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a grading interlayer over the second subcell, the grading interlayer having a third band gap greater than the second band gap; and forming a third solar subcell over the grading interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mis-matched with respect to the second subcell, wherein at least one of the bases of a solar subcell has an exponentially doped profile.

Abstract: A semiconductor radiation detector crystal is patterned by using a Q-switched laser to selectively remove material from a surface of said semiconductor radiation detector crystal, thus producing a groove in said surface that penetrates deeper than the thickness of a diffused layer on said surface.

Abstract: A method for manufacturing an organic thin film transistor substrate comprising forming a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, defining a channel region on the gate insulating layer between a source electrode and a drain electrode, neutralizing the channel region, forming a bank insulating layer on the source electrode and the drain electrode, and forming an organic semiconductor layer in a region prepared by the bank insulating layer.

Abstract: Method for production of diamond-like carbon film having semiconducting properties comprises preparing a boron-doped diamond-like carbon (B-DLC) thin film on a silicon substrate through a radio frequency magnetron sputtering process, wherein a composite target material formed by inserting boron tablet as a dopant source in a graphite target is used. After forming a boron-containing diamond-like carbon film, the thin film is annealed at a temperature of 500° C. and kept at this temperature for 10 minutes, and determine its carrier concentration and resistivity. Thus demonstrated that the polarity of said boron-doped diamond-like carbon film is p-type semiconductor characteristic. Carrier concentration can be up to 1.3×1018 cm-3, and its resistivity is about 0.6 ?-cm; consequently.

Abstract: Two integrated circuits 1, 3, 101, 103 having circuitry on one of their major surfaces 11, 31, 111, 131 are ground on their opposite major surfaces 13, 33 to reduce their thickness. The ground integrated circuits are then adhered together to form a composite body 7 and placed in a chamber 97, 197 formed within a substrate 9, 109 such as a printed circuit board. Electrical connections are formed between contacts 15, 35, 115, 135 of the integrated circuits 1, 3, 101, 103 and contacts 92, 192 of the substrate 9, 109. Components 22 may be mounted on the outer surfaces 24 of the substrate 9, 109.

Abstract: A die bonding apparatus and a bonding method are provided wherein the apparatus comprises a bond head movable between a supply of semiconductor dice and a die bonding site, a pick-up tool attached to the bond head for holding a die to be bonded at the die bonding site and an optical assembly positioned for viewing an orientation of the die bonding site. The bond head is configured such that an orientation of the die being held by the pick-up tool between the optical assembly and the die bonding site is viewable by the optical assembly, whereby the orientation of the die may be aligned with the orientation of the die bonding site.

Abstract: A semiconductor package comprising a die adjacent a substrate, a supporting plate adjacent the die, and a conducting plate abutting the supporting plate and electrically coupled to a metal apparatus adjacent the substrate and the die using a plurality of bond wires. The metal apparatus supplies power to the conducting plate.

Abstract: A method for fabricating an electronic component embedded substrate including an electronic component that is embedded within a buildup layer is disclosed. The method includes a first buildup layer lamination step of laminating plural first buildup layers on a core substrate such that the total thickness of the first buildup layers corresponds to the thickness of the electronic component; a cavity formation step of forming a cavity for accommodating the electronic component at the laminated first buildup layers; an accommodating step of accommodating the electronic component within the cavity; and a second buildup layer lamination step of laminating a second buildup layer on the first buildup layers and the electronic component.

Abstract: A semiconductor device includes a plurality of insulating layers laminated on a substrate to cover passive elements such as a capacitor, an inductor, and the like, and to fix an IC chip in a face up state in one of the insulating layers. The insulating layers have similar structures in each of which the passive element or the semiconductor chip is disposed in at the bottom, a plug is formed in the insulating layer to pass therethrough in the thickness direction for extending an electrode of one of these elements to the top surface, and a conductive layer is provided as wiring on the top surface of the insulating layer to be connected to the plugs for electrically connecting respective elements or rearranging the electrode position. Also, an insulating layer is provided on the top for protecting the semiconductor device and for providing an external connecting electrode.

Abstract: A method and apparatus for assembling microstructures onto a substrate through fluid transport. The microstructures being shaped blocks self-align into recessed regions located on a substrate such that the microstructure becomes integral with the substrate. The improved method includes a step of transferring the shaped blocks into a fluid to create a slurry. Such slurry is then dispensed evenly or circulated over the top surface of a substrate having recessed regions thereon. The microstructure via the shape and fluid tumbles onto the surface of the substrate, self-aligns, and engages into a recessed region.

Abstract: In one embodiment, the present invention includes a method for depositing lead-free bumps on a package substrate, depositing an alloy material on the lead-free bumps, attaching a semiconductor die including conductive bumps to the package substrate so that the conductive bumps contact the alloy material, and heating attached components to reflow the alloy material to form a joint therebetween. Other embodiments are described and claimed.

Abstract: A method for forming a device, comprising providing a first substrate carrying a first set of components disposed in a first encapsulating layer over the first set of components, providing a second substrate carrying a second set of components disposed in a second encapsulating layer over the second set of components, bonding the first and second substrates and functionally interconnecting at least one of the predefined components in the first set of components with at least one of the components in the second set of components.

Abstract: A semiconductor device according to embodiments may include an interposer, a plurality of devices stacked on the interposer, a cooling device provided in at least one of the devices and including a passage for a cooling material, and a connection electrode provided between the devices, in which the connection electrode connects a signal electrode in an upper device to a signal electrode in a lower device.

Abstract: A method for forming an ultra thin die electronic package includes disposing a first polymer film on a first substrate, applying a first adhesive layer to the first polymer film, disposing at least one die on the first adhesive layer, disposing a second polymer film on at least one additional substrate, applying a second adhesive layer to the second polymer film on at least one additional substrate, applying a second adhesive layer to the second polymer film, and attaching the first substrate and the at least one additional substrate via the first adhesive layer and the second adhesive layer such that the at least one die is interspersed between. The method also includes forming multiple vias on a top and/or bottom side of the first and the additional substrate(s), wherein the multiple vias are directly connected to the die, and forming an electrical interconnection between the first substrate, the at least one additional substrate and a die pad of the at least one die.

Abstract: The invention proposes a method and an apparatus for attaching a plurality of components having different arrangement densities or arrangement intervals, which can achieve shorter takt time. An object is to provide a low-cost manufacturing method of a semiconductor device and a manufacturing apparatus capable of manufacturing a semiconductor device at low cost. Plural pairs of components having different arrangement densities are simultaneously attached to each other by temporarily attaching first components to a first flexible substrate while changing an arrangement interval in an X direction, and then connecting the first components to second components over a second flexible substrate while changing an arrangement interval of the first components in a Y direction.

Abstract: A method of dividing a wafer having a plurality of areas, which are sectioned by the streets formed on the front surface in a lattice pattern and a plurality of devices, which are formed in the sectioned areas, along streets, the method comprising a first cutting step for holding the front surface of the wafer on a chuck table of a cutting machine and forming a first groove having a depth that is about half of the thickness of the wafer, along the streets from the rear surface of the wafer; a second cutting step for holding the rear surface of the wafer on a chuck table and forming a second groove which does not reach the first groove, along the streets from the front surface of the wafer; and a dividing step for breaking an uncut portion between the first groove and the second groove by exerting external force along the streets of the wafer, on which the first grooves and the second grooves have been formed.

Abstract: The present invention relates to a pressure-sensitive adhesive sheet for processing a semiconductor wafer or semiconductor substrate, which includes a base material and a pressure-sensitive adhesive layer which is polymerizable and curable by an energy ray, the pressure-sensitive adhesive layer being disposed on a surface of the base material, in which the pressure-sensitive adhesive layer includes a base polymer, a multifunctional acrylate-based oligomer which has an energy-ray polymerizable carbon-carbon double bond and has a molecular weight of 1000 to 2500, and a multifunctional acrylate-based compound which has an energy-ray polymerizable carbon-carbon double bond and has a molecular weight of 200 to 700. The pressure-sensitive adhesive sheet of the invention is excellent in follow-up properties to a minute unevenness with a depth of about 0.

Abstract: Provided is a singulation method of a semiconductor device that can perform a sawing process while protecting a pad. In the singulation method for forming a semiconductor device including a scribe lane region and a chip region, pads are formed in the chip region. Photoresist patterns exposing the scribe lane region and covering the pads are formed, and a substrate in the scribe lane region is cut and a washing solution is sprayed on the scribe lane region. According to the method, wafers can be stably separated from each other while pads of a semiconductor device are protected, so that stabilization in the fabrication process can be realized and pad corrosion caused by DI water is prevented during a sawing process. Accordingly, a defective device is minimized and reliability of a device can improve.

Abstract: A method for making a device is disclosed. One embodiment provides a substrate having a first element protruding from the substrate. A semiconductor chip has a first electrode on a first surface and a second electrode on a second surface opposite to the first surface. The semiconductor chip is placed over the first element of the substrate with the first surface of the semiconductor chip facing the substrate. The second electrode of the semiconductor chip is electrically coupled to the substrate, and the substrate is at least partially removed.

Abstract: A method of interconnecting and an interconnect is provided to connect a first component and a second component of an integrated circuit. The interconnect includes a plurality of Carbon Nanotubes (CNTs), which provide a conducting path between the first component and the second component. The interconnect further includes a passivation layer to fill the gaps between adjacent CNTs. A method of producing Anisotropic Conductive Film (ACF) and an ACF is provided. The ACF includes a plurality of CNTs, which provide a conducting path between a first side of the ACF and a second side of the ACF. The sides of the ACF can also include a conductive curable adhesive layer. In an embodiment, the conductive curable adhesive layer can incorporate a B-stage cross-linkable polymer and silver particles.

Abstract: A method for forming a high thermal conductivity heat sink to IC package interface is disclosed. The method uses reactive getter materials added to a two phase solder system having a phase change temperature that is about the normal operating temperature range of the IC, to bind absorbed and dissolved oxygen in the two phase solder interface material at or near the air to solder surface. Over time this chemical binding action results in an oxide layer at the air to solder surface that slows the rate of oxygen absorption into the solder interface material, and thus reduces the harmful oxidation of the solder to IC package interface and the solder to heat sink interface.

Abstract: An integrated circuit package system provides a leadframe having a short lead finger and a long lead finger. A first die is placed in the leadframe. A second die is offset from the first die. The offset second die is attached to the first die and the long lead finger with an adhesive. The first die is electrically connected to the short lead finger. The second die is electrically connected to at least the long lead finger or the short lead finger. At least portions of the leadframe, the first die, and the second die are encapsulated in an encapsulant.

Abstract: In a method of packaging a semiconductor IC, a tape is attached to a back surface of a lead frame array, and the lead frame array is held between an upper mold chase and a lower mold chase of a mold, with the back surface of the lead frame array upward. The upper and lower mold chases form an upper cavity and a lower cavity with respect to the lead frame array respectively. A mold compound is injected into the upper and lower cavities respectively. With respect to clearances between leads, between die pads and/or between the leads and the die pads, the mold compound injected into the upper cavity covers the portion of the tape over the clearances before the mold compound injected into the lower cavity fills the clearances, so that the tape is depressed.

Abstract: A first dielectric layer is formed on a mold having a surface and protruding components and covers the protruding components. At least one electronic component having an active surface, a back surface, and contacts formed on the active surface is disposed on the first dielectric layer. The active surface is faced to the first dielectric layer, and the contacts are corresponding to the protruding components. A second dielectric layer is formed on the first dielectric layer and a carrier is disposed on the back surface of the electronic component. Openings located corresponding to the contacts are further formed within the first dielectric layer by the protruding components in an imprinting step, such that when the mold is removed, the contacts are exposed from the openings.

Abstract: The present disclosure provides an optical functional device-mounted module which needs no expensive or special members, can be reduced in size, and provide a producing process thereof. A bank to dam a liquid sealing resin is provided on a substrate around an optical functional device, the substrate being formed with a predetermined wiring pattern and having the optical functional device mounted thereon. The liquid sealing resin is filled between the functional device and the bank by dropping the liquid sealing resin therebetween. A package component member having a light transmission hole corresponding to an optical function part of the optical functional device is brought into contact with the bank such that the light transmission hole is opposed to the function part of the optical functional device, thereby causing the package component member to contact with the liquid sealing resin.

Abstract: This disclosure relates to misalignment-tolerant processes for fabricating multiplexing/demultiplexing architectures. One process enables fabricating a multiplexing/demultiplexing architecture at a tolerance greater than a pitch of conductive structures with which the architecture is capable of communicating. Another process can enable creation of address elements and conductive structures having substantially identical widths.

Abstract: An image sensing device can include one or more image sensing cells. Each image sensing cell can have a charge store element formed from a semiconductor material doped to a first conductivity type. The charge store element can be in contact with a channel region formed from a semiconductor material doped to a second conductivity type. The charge store element can have one or more surfaces for exposure to an image source. Each image sensing cell can also include a charge electrode formed from a semiconductor material doped to the first conductivity type that is separated from the charge store element by a semiconductor material doped to the second conductivity type. In addition, one or more current detection electrodes can be included in each image sensing cell. A current detection electrode can pass a current flowing through the channel region in a read operation. Such an image sensing cell can be compact in size and/or have a large image sensing area.