Abstract: A method of fabricating a semiconductor device according to one embodiment includes: removing a native oxide film and adhering silicon nitrides on an area of a Si based substrate in hydrogen gas atmosphere under a condition in which a pressure is a first pressure and a temperature is a first temperature, a silicon nitride-containing member being formed on the Si based substrate, the area being a area not covered by the member; lowering the temperature to a second temperature from the first temperature while maintaining the pressure at the first pressure in hydrogen gas atmosphere; lowering the pressure to a second pressure from the first pressure while maintaining the temperature at the second temperature in hydrogen gas atmosphere; and epitaxially growing a crystal on the area of the Si based substrate in a precursor gas atmosphere after the pressure is lowered to the second pressure, the crystal including at least one of Si and Ge, the precursor gas atmosphere including at least one of hydrogen, Si and Ge.

Abstract: A method is provided for depositing silicon and silicon-containing films by atomic layer deposition (ALD). The method includes disposing the substrate in a batch processing system configured for performing ALD of the silicon-containing film, exposing the substrate to a non-saturating amount of a first precursor containing silicon, and evacuating or purging the first precursor from the batch processing system. The method further includes exposing the substrate to a saturating amount of a second precursor containing silicon or a dopant, where only one of the first and second precursors contain a halogen, and a reaction of the first and second precursors on the substrate forms a silicon or silicon-containing film and a volatile hydrogen-halogen (HX) by-product, evacuating or purging the second precursor and the HX by-product from the batch processing system, and repeating the exposing and evacuation or purging steps until the silicon or silicon-containing film has a desired thickness.

Abstract: A method for producing a product of a functionalized nanocomposition colloidal material using atomic layer deposition to coat the colloidal material. The ALD layer comprises an inorganic material which enables improved optical and electrical properties for the nanocomposite.

Abstract: The disclosed subject matter relates to systems and methods for preparing epitaxially textured polycrystalline films. In one or more embodiments, the method for making a textured thin film includes providing a precursor film on a substrate, the film includes crystal grains having a surface texture and a non-uniform degree of texture throughout the thickness of the film, wherein at least a portion of the this substrate is transparent to laser irradiation; and irradiating the textured precursor film through the substrate using a pulsed laser crystallization technique at least partially melt the film wherein the irradiated film crystallizes upon cooling to form crystal grains having a uniform degree of texture.

Abstract: A fin-shaped semiconductor region is formed on a substrate, and then the substrate is placed in a chamber. Then, an ignition gas is introduced into a chamber to thereby turn the ignition gas into a plasma, and then a process gas containing an impurity is introduced into the chamber to thereby turn the process gas into a plasma. Then, a bias voltage is applied to the substrate so as to dope the semiconductor region with the impurity after confirming attenuation of an amount of the ignition gas remaining in the chamber.

Abstract: A transistor with a gate stack having a metal electrode and a method for forming the same. The method includes providing a structure which includes (a) a substrate, (b) a gate dielectric layer on the substrate, and (c) a gate layer on the gate dielectric layer. The gate layer includes an oxidized layer. The oxidized layer comprises an oxidized material. Then, the structure is exposed to a first plasma resulting in removal of oxygen atoms from molecules of the oxidized material.

Abstract: A semiconductor device includes: a semiconductor substrate including a first face and a second face on a side opposite to the first face; an external connection terminal formed on the first face of the semiconductor substrate; a first electrode formed on the first face of the semiconductor substrate and electrically connected to the external connection terminal; an electronic element formed on or above the second face of the semiconductor substrate; a second electrode electrically connected to the electronic element and having a top face and a rear face; a groove portion formed on the second face of the semiconductor substrate and having a bottom face including at least part of the rear face of the second electrode; and a conductive portion formed in the groove portion and electrically connected to the rear face of the second electrode.

Abstract: A method of forming packages containing SiC or other semiconductor devices bonded to other components or conductive surfaces utilizing transient liquid phase (TLP) bonding to create high temperature melting point bonds using in situ formed ternary or quaternary mixtures of conductive metals and the devices created using TLP bonds of ternary or quaternary materials. The compositions meet the conflicting requirements of an interconnect or joint that can be exposed to high temperature, and is thermally and electrically conductive, void and creep resistant, corrosion resistant, and reliable upon temperature and power cycling.

Abstract: A method for bonding a semiconductor device onto a substrate is provided which comprises the steps of picking up a solder ball with a pick head, placing the solder ball onto the substrate and melting the solder ball on the substrate and placing the semiconductor device on the molten solder ball. The molten solder ball is then allowed to cool to form a solder joint which bonds the semiconductor device to the substrate.

Abstract: A wafer level chip scale package system is provided including placing a first integrated circuit over a semiconductor wafer having a second integrated circuit; connecting a second electrical interconnect between the first integrated circuit and the second integrated circuit; forming a stress relieving encapsulant on the outer perimeter of the second integrated circuit for covering the second electrical interconnect; and singulating a chip scale package, from the semiconductor wafer, through the stress relieving encapsulant and the semiconductor wafer.

Abstract: A semiconductor device has a substrate having a plurality of metal layers. A die coupled to the substrate. A first wire fence structure is formed on the substrate. A second wire fence structure is formed on the substrate. A mold compound is used for encapsulating the die, a first surface of the substrate, the first wire fence structure, and the second wire fence structure, wherein a top portion of at least one of the first wire fence structure or the second wire fence structure is exposed. A conductive coating is applied to the mold compound and to the portion of the at least one of the first wire fence structure or the second wire fence structure is exposed.

Abstract: An aluminum wire is bonded to a silicon electrode by a wedge tool pressing the aluminum wire against the silicon electrode. In this way, a firmly bonded structure is obtained by sequentially stacking aluminum, aluminum oxide, silicon oxide, and silicon.

Abstract: In a wiring structure between steps in which a step portion is covered by an insulating slope formed by providing and drying droplets of an insulating ink in which an insulating material is dispersed in a dispersion medium and a wiring line formed by drying and firing provided droplets of a conductive ink in which a conductive material is dispersed in a dispersion medium is laid out between the steps and passes on a top surface of the insulating slope, the structure includes a liquid repellent layer formed of a liquid repellent material repelling the dispersion medium in the insulating ink, and a plurality of dot lines including a plurality of dots that is formed by hardening arranged droplets of a resin ink including a resin material. In the structure, the liquid repellent layer covers a surface including the step portion where the wiring line to be laid out.

Abstract: A semiconductor device and a manufacturing method thereof are provided for the improvement of the reliability of copper damascene wiring in which a film between wiring layers and a film between via layers are comprised of an SiOC film with low dielectric constant. A film between wiring layers, a film between wiring layers, and a film between via layers are respectively comprised of an SiOC film, and stopper insulating films and a cap insulating film are comprised of a laminated film of an SiCN film A and an SiC film B. By doing so, it becomes possible to reduce the leakage current of the film between wiring layers, the film between wiring layers, and the film between via layers, and also possible to improve the adhesion of the film between wiring layers, the film between wiring layers, and the film between via layers to the stopper insulating films and the cap insulating film.

Abstract: Manufacturing a damascene structure involves: forming a sacrificial layer (20) on a substrate (10) to protect an area around a recess (30) for the damascene structure, forming a barrier layer (40) in the recess, and in electrical contact with the sacrificial layer, forming the damascene structure (50) in the recess, and planarizing. During the planarizing the sacrificial layer reacts electrochemically with the barrier layer or with the damascene structure. This can alter a relative rate of removal of the damascene structure and the sacrificial layer so as to reduce dishing or protrusion of the damascene structure, and reduce copper residues, and reduce barrier corrosion. The barrier layer can be formed by ALCVD. The barrier material being one or more of WCN and TaN. The sacrificial layer can be TaN, TiN or W.

Abstract: A method for annealing a semiconductor device having at least one polysilicon region formed on a substrate, comprises growing dielectric material on the substrate adjacent to the polysilicon region. The method continues by polishing a surface of the dielectric material and by depositing a layer of a semi-transparent material on both the surface of the dielectric material and the surface of the polysilicon region. The method concludes by annealing the semiconductor device.

Abstract: Various methods and apparatus for coupling capacitors to a chip substrate are disclosed. In one aspect, a method of manufacturing is provided that includes forming a mask on a semiconductor chip substrate that has plural conductor pads. The mask has plural openings that expose selected portions of the plural conductor pads. Each of the plural openings has a footprint corresponding to a footprint of a smallest size terminal of a capacitor adapted to be coupled to the semiconductor chip substrate. A conductor material is placed in the plural openings to establish plural capacitor pads.

Abstract: In some embodiments, a workpiece-surface-influencing device preferentially contacts the top surface of the workpiece, to chemically modify the surface at desired field areas of the workpiece without affecting the surfaces of cavities or recesses in the field areas. The device includes a substance which is chemically reactive with material forming the workpiece surface. The substance can be in the form of a thin film or coating which contacts the surface of the workpiece to chemically modify that surface. The workpiece-surface-influencing device can be in the form of a solid state applicator such as a roller or a semi-permeable membrane. In some other embodiments, the cavities are filled with material that prevents surface modification of the cavity surfaces while allowing modification of the field areas, or which encourages surface modification of the cavity surfaces while preventing modification of the field areas. The modified surface facilitates selective deposition of materials on the workpiece.

Abstract: A method is disclosed that uses solid precursors for semiconductor processing. A solid precursor is provided in a storage container. The solid precursor is transformed into a liquid state in the storage container. The liquid state precursor is transported from the storage container to a liquid holding container. The liquid state precursor is transported from the liquid holding container to a reaction chamber. The molten precursor allows the precursor to be metered in the liquid state. The storage container can be heated only when necessary to replenish the liquid holding container, thereby reducing the possibility of thermal decomposition of the precursor.

Abstract: Exemplary embodiments provide a method for fabricating an integrated circuit (IC) device with reduced streak defects. In one embodiment, the IC device structure can be formed having a first pad oxide-based layer on a front side of a semiconductor substrate and having an oxide-nitride-based structure on a backside of the semiconductor substrate. The IC device structure can be etched to remove a nitride-related material from the backside oxide-nitride-based structure, and further to remove the first pad oxide-based layer from the front side of the semiconductor substrate. On the removed front side of the semiconductor substrate a second pad oxide-based layer can be formed, e.g., for forming an isolation structure for device component or circuitry isolation.

Abstract: A two-stage method to remove a metal layer from a substrate surface comprises using a CMP process to remove a first portion of the metal layer from the substrate surface, and using an ALV process to remove a second portion of the copper layer from the substrate surface. The ALV process comprises pulsing a co-reactant into a reactor housing the substrate, wherein the co-reactant reacts with the metal layer to form a volatile metal-containing product, and then evacuating the reactor to volatize and remove the metal-containing product.

Abstract: An etching method that uses an etch reactant retained within at least a semi-solid media (120, 220, 224, 230). The etch reactant media is applied to selectively etch a surface layer (106, 218, 222). The etch reactant media may be applied to remove metal shorts (222), smearing and eaves resulting from CMP or in failure analysis for uniform removal of a metal layer (218) without damaging the vias, contact, or underlying structures.

Abstract: The present invention relates to a method of manufacturing a semiconductor device using a substrate including an organic low dielectric constant film containing a silicon, a carbon, an oxygen, and a hydrogen, with a resist pattern being formed on an upper layer side of the low dielectric constant film. The method comprising: an etching step in which the low dielectric constant film is etched by a plasma; an ashing step following to the etching step, in which the resist pattern is ashed by a plasma that is rich in oxygen radicals in such a manner that a relative dielectric constant of the low dielectric constant film can become 5.2 or more; and a recovering step following to the ashing step, in which an organic gas is supplied to the low dielectric constant film so as to recovery a damage of the low dielectric constant film caused by the plasma.

Abstract: A method for forming contact holes in a semiconductor device includes forming a hard mask layer over an etch target layer, forming a first line pattern in the hard mask layer by etching a portion of the hard mask layer through a primary etch process, forming a second line pattern crossing the first line pattern by etching the hard mask layer including the first line pattern through a secondary etch process, and etching the etch target layer by using the hard mask layer including the first line pattern and the second line pattern as an etch barrier.

Abstract: In an independent GaN film manufactured by creating a GaN layer on a base heterosubstrate using vapor-phase deposition and then removing the base substrate, owing to layer-base discrepancy in thermal expansion coefficient and lattice constant, bow will be a large ±40 ?m to ±100 ?m. Since with that bow device fabrication by photolithography is challenging, reducing the bow to +30 ?m to ?20 ?m is the goal. The surface deflected concavely is ground to impart to it a damaged layer that has a stretching effect, making the surface become convex. The damaged layer on the surface having become convex is removed by etching, which curtails the bow. Alternatively, the convex surface on the side opposite the surface having become convex is ground to generate a damaged layer. With the concave surface having become convex due to the damaged layer, suitably etching off the damaged layer curtails the bow.

Abstract: Methods are provided for manufacturing optical display devices which remove an etch resist and residual post-etch metal in a single step. These methods are particularly useful in the manufacture of LCDs.

Abstract: A predicted film formation rate value is computed based on a film formation rate prediction formula obtained in advance and apparatus parameters obtained during a previously-performed film formation process. A processing time required for an amount of film formed on a wafer to reach a predetermined target film thickness is computed based on the computed predicted film formation rate value and the target film thickness. Then, according to the computed processing time, a film-formation process is performed on wafers. In addition, it is determined whether the computed predicted film formation rate value is within a predetermined range, and only when it is determined to be within the predetermined range, the film formation process may be performed.

Abstract: To provide a manufacturing method of a semiconductor device capable of performing a selective growth at a low temperature. A manufacturing method of a semiconductor device for placing in a processing chamber a substrate having at least a silicon surface and an insulating film surface on a surface; and allowing an epitaxial film to selectively grow only on the silicon surface by using a substrate processing apparatus for heating an atmosphere in the processing chamber and the substrate, using a heating unit disposed outside of the processing chamber, includes a substrate loading step of loading the substrate into the processing chamber; a pre-processing step of supplying dichlorosilane gas and hydrogen gas into the processing chamber while maintaining a temperature in the substrate processing chamber to a prescribed temperature of 700° C.

Abstract: A method is provided for treating a leadframe comprising copper or copper alloy to enhance adhesion of molding compound to it. The leadframe is oxidized in an oxidation treatment bath to form copper oxide on the surface of the leadframe. It is then dipped in a complexing or chelating agent to enhance the purity of the copper oxide formed. Thereafter, the leadframe is cleaned with an acid to remove any contaminants remaining on the leadframe.

Abstract: Methods of depositing silicon oxide layers on substrates involve flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that a uniform silicon oxide growth rate is achieved across the substrate surface. The surface of silicon oxide layers grown according to embodiments may have a reduced roughness when grown with the additive precursor. In other aspects of the disclosure, silicon oxide layers are deposited on a patterned substrate with trenches on the surface by flowing a silicon-containing precursor, an oxidizing gas, water and an additive precursor into a processing chamber such that the trenches are filled with a reduced quantity and/or size of voids within the silicon oxide filler material.

Abstract: Provided is a substrate processing apparatus comprising: a process chamber for processing a substrate; a heater for heating an interior of the process chamber; a holder for sustaining the substrate in the process chamber; and a substrate transfer plate for transferring the substrate to the holder; wherein the holder has a retainer for sustaining the substrate at its outer periphery and a main body for sustaining the retainer, a portion of the retainer extending at least from a back region thereof with respect to an inserting direction of the substrate transfer plate to a region adjacent thereto and to be sustained by the main body and lying outer than the substrate upon putting the substrate on the retainer being made thicker than other portions of the retainer.

Abstract: The following disclosure provides a low-density fire retardant structural board. The board has a body of fibrous material, a binder and fire retardant agent. The body of fibrous material includes a weight, first and second ends, first and second sides and a thickness. The fibrous material is dispersed throughout the thickness of the body. The binder is also dispersed throughout the thickness of the body. The fire retardant agent is dispersed between individual fibers of the fibrous material and throughout the thickness of the body.

Abstract: Provided herein are flame resistant fabrics having a thermoplastic fiber content of as much as 65% (where no more than 5% of the fibers are non-thermoplastic synthetic fibers). The flame resistant properties are imparted by treating the fabric with one or more flame retardant chemicals and then by curing the treated fabric at high temperatures. Optionally, softeners, stain release agents, soil repellent agents, permanent press resins, and the like may be added to the bath of flame retardant chemicals. Alternately, the treated fabric may be subjected to mechanical treatment to increase softness. The fabrics produced by the present process exhibit improved performance and tear strength, as compared to conventionally treated fabrics.

Abstract: A process for imparting flame resistance and the flame resistant fabrics produced by such process are provided. The process for imparting flame resistant properties involves treating a target fabric with one or more flame retardant chemicals (and, preferably, a softening agent) and then curing the treated fabric to durably affix the flame retardant to the fabric. In many cases, it may be desirable to subject the treated fabric to mechanical face finishing to increase softness. Optionally, stain release agents, soil repellent agents, permanent press resins, and the like may be added to the bath of flame retardant chemicals, eliminating the need for one or more additional manufacturing processes. Alternately, soil repellent agents may be applied to only one side of the treated fabric after the application of the flame retardant chemicals. The present fabrics exhibit improved performance and tear strength, even after repeated launderings, as compared to conventionally treated fabrics.

Abstract: A composite resin molded product has a molded product body made of a resin and a fiber sheet material inserted on the surface of the molded product body. The fiber sheet material is formed of a knitted fabric, and the rear surface of the knitted fabric faces the molded product. The surfaces of fiber yarns of the knitted fabric are integrated with the molded product body by melting and solidifying.

Abstract: An appliqué is described that includes a woven fabric that is stretchable in a single direction.

Abstract: A fused silica glass and a fused silica article having a combined concentration of at least one of OH and OD of up to about 50 ppm. The fused silica glass is formed by drying a fused silica soot blank or preform in an inert atmosphere containing a drying agent, followed by removal of residual drying agent from the dried soot blank by heating the dried soot blank in an atmosphere comprising an inert gas and of oxygen.

Abstract: A sealing material for solid oxide fuel cells is provided, which is composed of around 60% to 80% by weight of glass, around 20% to 30% by weight of alcohol, around 0.5% to 3% by weight of ethyl celluloid as a binder, and around 0.01% to 0.1% by weight of polyethylene glycol as a plasticizer.

Abstract: The present invention relates to an optical glass having optical constants in the form of a refractive index nd of 1.70 or higher and an Abbé number nud of 50 or higher, a preform for precision press molding comprised of this glass, an optical element comprised of this glass, and methods for manufacturing the preform and the optical element.

Abstract: The invention provides a sintered, yttria stabilized zirconium-toughened alumina ceramic product comprising about 80-94 w/w % Al2O3, about 5-19 w/w % ZrO2 and about 0.18-0.72 w/w % Y2O.

Abstract: An insulator including alumina in an amount between about 90 and about 99% by weight and an oxide mixture or glass mixture including Boron Oxide, Phosphorus Oxide, or both Boron and Phosphorus Oxide.

Abstract: Provided is a process for safely transporting or recycling an ionic liquid catalyst based on chloroaluminates. The process comprises mixing a secondary alcohol with an ionic liquid based on a chloroaluminate and allowing a reaction to occur forming an aluminum chloride adduct precipitate. The precipitate is filtered and the secondary alcohol removed, leaving a solid salt. This solid salt is the ionic liquid catalyst absent aluminum chloride, for example, Nbutylpyridinium chloride. This salt is recycled to the reactor. AlCl3 is added to the salt prior to introduction into the reactor to remake the ionic liquid catalyst, for example, Nbutylpyridinium heptachloroaluminate.

Abstract: The present invention provides polymerization catalyst compositions employing novel dinuclear metallocene compounds. Methods for making these new dinuclear metallocene compounds and for using such compounds in catalyst compositions for the polymerization and copolymerization of olefins are also provided.

Abstract: A practical and efficient procedure for the enantioselective synthesis of mexiletine analogues using 10% of a novel spiroborate ester as chirality transfer agent is presented. A variety of mexiletine analogues were prepared with excellent enantioselectivities (91-97% ee) in good yield from readily available starting materials. The developed methodology was also successfully applied for the synthesis of novel ?-amino ethers containing thiophenyl and pyridyl fragments.

Abstract: Disclosed are partially deactivated metal catalysts useful for modifying structures of nanomaterials. The present invention is also directed to a method for preparing the partially deactivated metal catalysts, which comprises patterning a substrate with micelles containing iron nanoparticles, removing the micelles from the patterned substrate to deposit the iron nanoparticles thereon, nitriding the iron nanoparticles using a nitrogen plasma, and exposing the nitrided iron nanoparticles to a mixture of ethanol and nitric acid to remove iron from the surface of the nitrided nanoparticles. The iron nitride metal catalyst with a nano-size according to the present invention comprises a core that includes deactivated iron nitride and an active shell surrounding the core. Thus, when preparing a carbon nanotube, the metal catalyst can be effectively used to control the number of walls formed in the carbon nanotube.

Abstract: Methods are provided to prepare a catalyst system that includes at least one titanium compound, at least one magnesium compound, at least one electron donor compound, at least one activator compound, and at least one silica support material, the at least one silica support material having a median particle size in the range of from 20 to 50 microns with no more than 10% of the particles having a size less than 10 microns and no more than 10% of the particles having a size greater than 50 microns and average pore diameter of at least ?220 angstroms.

Abstract: The present invention provides porous ceramic materials having good resistance to heat, acid and base, comprising three or more oxides selected from an oxide of silicon (SiO), an oxide of aluminum (AlO), an oxide of a transition metal, MxOy, [wherein M represents a 4B, 5B or 6B-group transition metal which can be selected from Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W or Ce, x represents an integer of 1 to 3, and y represents an integer of 1 to 3] and its preparation. By applying ceramic materials prepared according to the present invention that are structurally, thermally and chemically stable to a porous honeycomb support for the purification of exhaust gas or to a filter (DPF, Diesel Particulate Filter) for the purification of diesel engine exhaust gas, it is possible to prevent or remarkably reduce any structural destruction caused by corrosive gas, which results from employing a cordierite material as a structural support.

Abstract: A method for preparing platinum (Pt) based nano-size catalyst which is useful as an electrode catalyst of a direct methanol fuel cell (DMFC). This method includes the implementation of a reduction reaction of a platinum precursor and an optional ad-metal precursor with a reducing agent in a solvent and in the presence of a stabilizer to form a suspension containing colloidal particles of platinum or platinum/ad-metal; mixing the suspension with a co-solvent; subjecting the resultant mixture to a centrifugal treatment to form a platinum or platinum/ad-metal colloidal particle portion and a liquid portion, repeating the co-solvent mixing and centrifugal treatment to the platinum or platinum/ad-metal colloidal particle portion until the resultant liquid portion no longer contains the product of the reduction reaction; and drying the resultant platinum or platinum/ad-metal colloidal particle portion to obtain a platinum based nano-size catalyst.

Abstract: A high-temperature catalytic material and a method for producing the same are disclosed. The high-temperature catalytic material is obtained by subjecting a mixture of gibbsite and boehmite in a desired weight ratio to a single dry thermal treatment in the air, without alkaline or hydrothermal treatment, so as to obtain multiphase alumina powder as the high-temperature catalytic material. The multiphase alumina powder applied in the high-temperature catalytic material can raise the temperature of phase transformation, maintain its high specific surface area when suffering high temperatures for a long time, prolongs its lifetime, and reduces the usage of noble metals, resulting in great reduction of cost.

Abstract: The present invention relates to cationic, gel forming, guanidinated polysaccharides of Formula I, their use as absorbent materials, and to processes for producing same: Formula I wherein Z1, Z2, and Z3 are independently selected from the group consisting of hydrogen, C1-C10 alkyl, substituted C1-C10 alkyl, C5-C7 cycloalkyl, and benzyl; and m is an integer ranging from 1 to 2,000,000. The absorbent guanidinated polysaccharides of Formula I have absorbent properties suitable for use in personal care products.