Patents Issued in November 14, 2013
  • Publication number: 20130301349
    Abstract: An integrated circuit including a link or string of semiconductor memory cells, wherein each memory cell includes a floating body region for storing data. The link or string includes at least one contact configured to electrically connect the memory cells to at least one control line, and the number of contacts in the string or link is the same as or less than the number of memory cells in the string or link.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Inventor: Yuniarto Widjaja
  • Publication number: 20130301350
    Abstract: A vertical structure nonvolatile memory device can include a channel layer that extends in a vertical direction on a substrate. A memory cell string includes a plurality of transistors that are disposed on the substrate in the vertical direction along a vertical sidewall of the channel layer. At least one of the plurality of transistors includes at least one recess in a gate of the transistor into which at least one protrusion, which includes the channel layer, extends.
    Type: Application
    Filed: July 11, 2013
    Publication date: November 14, 2013
    Inventors: Byeong-In Choe, Sung-il Chang, Chang-seok Kang, Jin-soo Lim
  • Publication number: 20130301351
    Abstract: In a non-volatile storage system, a programming portion of a program-verify iteration has multiple programming pulses, and storage elements along a word line are selected for programming according to a pattern. Unselected storage elements are grouped to benefit from channel-to-channel capacitive coupling from both primary and secondary neighbor storage elements. The coupling is helpful to boost channel regions of the unselected storage elements to a higher channel potential to prevent program disturb. Each selected storage element has a different relative position within its set. For example, during a first programming pulse, first, second and third storage elements are selected in first, second and third sets, respectively. During a second programming pulse, second, third and first storage elements are selected in the first, second and third sets, respectively. During a third programming pulse, third, first and second storage elements are selected in the first, second and third sets, respectively.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 14, 2013
    Inventors: Deepanshu Dutta, Shinji Sato, Fumiko Yano
  • Publication number: 20130301352
    Abstract: A method of programming a nonvolatile memory device including multi-level cells that store multi-bit data, includes performing a pre-programming operation that programs at least some of the multi-level cells to a plurality of intermediate states which are different from an erased state, and performing a main programming operation that programs the multi-level cells to a plurality of target states corresponding to the multi-bit data. At least some of the intermediate program states have threshold voltage distributions that partially overlap each other.
    Type: Application
    Filed: January 31, 2013
    Publication date: November 14, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: DONG-KYO SHIM, MIN-SEOK KIM, TAE-YOUNG KIM, KI-TAE PARK, JAE-YONG JEONG
  • Publication number: 20130301353
    Abstract: Methods of driving a memory include erasing a plurality of memory cells of a memory device, testing whether the memory cells have been erased, and programming the memory cells without erasing the memory cells again if more than a predetermined percentage of the memory cells, but less than all of the memory cells, were successfully erased.
    Type: Application
    Filed: March 13, 2013
    Publication date: November 14, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Moshe Twitto, Jun-Jin Kong
  • Publication number: 20130301354
    Abstract: A semiconductor memory device includes memory cells and a voltage generating circuit for generating a voltage for memory cells. The first voltage generating circuit includes a first diode connected between first and second nodes, a first transistor connected between the output terminal and a third node and having a gate connected to the second node, a second transistor connected between the third node and a fourth node and having a gate connected to the second node, a third transistor connected between the output terminal and the first node and having a gate connected to the fourth node, a second diode connected between the first and fourth nodes, and a charge pump circuit configured to supply a voltage to the fourth node. The first voltage generating circuit functions to adjust the generated voltage when it overshoots a desired value which may be caused by capacitive coupling with adjacent wirings.
    Type: Application
    Filed: March 4, 2013
    Publication date: November 14, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mizuki KANEKO, Takeshi HIOKA
  • Publication number: 20130301355
    Abstract: An EEPROM memory unit is disclosed. The EEPROM memory unit includes a first memory cell, a second memory cell, and a word line controller. The first memory cell includes a source that is connected to a first bit line of the EEPROM memory unit and a drain that is connected to a source of the word line controller. The word line controller includes a drain that is connected to a source of the second memory cell. The second memory cell includes a drain that is connected to a second bit line of the EEPROM memory unit. An EEPROM memory device is also disclosed.
    Type: Application
    Filed: March 18, 2013
    Publication date: November 14, 2013
    Applicant: Grace Semiconductor Manufacturing Corporation
    Inventor: Guangiun Yang
  • Publication number: 20130301356
    Abstract: A one-time programmable (OTP) memory cell includes two transistors including a dual gate transistor. The dual gate transistor is formed using the same processing operations used to form floating gate transistors in other areas of the semiconductor device. The dual gate transistor includes an upper gate isolated from a floating gate by a floating gate oxide, the combination of which produces an anti-fuse. The nonvolatile memory device may include a plurality of such OTP memory cells and one or more OTP memory cells are selected and programmed by applying a voltage sufficient to blow the anti-fuse by causing the floating gate oxide layer to break down and the upper gate to become shorted to the floating gate.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Inventors: Re-Long CHIU, Shu-Lan Ying, Wen-Szu Chung
  • Publication number: 20130301357
    Abstract: The present disclosure includes methods, devices, modules, and systems for reducing noise in semiconductor devices. One method embodiment includes applying a reset voltage to a control gate of a semiconductor device for a period of time. The method further includes sensing the state of the semiconductor device after applying the reset voltage.
    Type: Application
    Filed: July 16, 2013
    Publication date: November 14, 2013
    Inventors: Vishal Sarin, Frankie Roohpavar, Hoei Jung Sheng
  • Publication number: 20130301358
    Abstract: A system for erasing non-volatile storage system that reduces the voltage across the transistor that interfaces between the sense amplifier and the bit line so that the transistor can be made smaller. Additionally, the use of the lower voltage allows for various components to be positioned closer to each other. The use of smaller components and smaller spaces between components allows the non-volatile storage system to include more memory cells, thereby providing the ability to store more data.
    Type: Application
    Filed: May 3, 2013
    Publication date: November 14, 2013
    Applicant: SANDISK TECHNOLOGIES, INC.
    Inventors: Mohan Vamsi Dunga, Kwang-Ho Kim, Masaaki Higashitani
  • Publication number: 20130301359
    Abstract: For data erase from an electrically erasable and programmable non-volatile memory cell, the following operations are performed: an erase operation to apply an erase pulse voltage to a memory cell for data erase, an erase verify operation to verify whether data erase is completed, and a step-up operation to increase the erase pulse voltage by a certain step-up voltage if data erase is not completed. A control unit controls voltages so that at least a first erase pulse voltage initially generated in the erase operation has a longer rise time than that of a second erase pulse voltage generated subsequent to the first erase pulse voltage.
    Type: Application
    Filed: July 15, 2013
    Publication date: November 14, 2013
    Inventors: Yasuhiro SHIINO, Daisuke KOUNO, Shigefumi IRIEDA, Kenri NAKAI, Eietsu TAKAHASHI
  • Publication number: 20130301360
    Abstract: A method for data storage includes storing data in a target analog memory cell, which is one of a group of analog memory cells that are connected in series with one another, by writing a storage value into the target memory cell. The storage value written into the target memory cell is verified while biasing the other memory cells in the group with respective first pass voltages. After writing and verifying the storage value, the storage value is read from the target memory cell while biasing the other memory cells in the group with respective second pass voltages, wherein at least one of the second pass voltages applied to one of the other memory cells in the group is lower than a respective first pass voltage applied to the one of the other memory cells. The data is reconstructed responsively to the read storage value.
    Type: Application
    Filed: July 16, 2013
    Publication date: November 14, 2013
    Inventors: Shai Winter, Ofir Shalvi
  • Publication number: 20130301361
    Abstract: Devices and circuits for row driver in a memory device. The proposed row driver circuit architectures may reduce size of the row driver circuitry and enhance the row driver circuit's reliability. Specifically, the proposed embodiments of the row driver may reduce the required sizing of the boosting capacitor or alternatively eliminate the boosting capacitor entirely. Further, the embodiments of the row driver may reduce the risk of charge-leakage on K-nodes, enhancing the row driver's reliability in driving the x-path of the memory array.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Applicant: Elpida Memory, Inc.
    Inventors: Chiara Missiroli, Diego Della Mina
  • Publication number: 20130301362
    Abstract: A pulse-based memory read-out device, including: a pulse generator at a first end of a bit line and a detector at a second end of the bit line. The pulse generator is configured to send an electrical pulse along the bit line from the first end of the bit line. The detector is configured to: detect the electrical pulse at the second end; and output a digital signal representing a current state of a selected memory cell in the bit line, wherein the digital signal is based on an amplitude of the electrical pulse at the second end.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Applicant: NXP B.V.
    Inventor: Harold Gerardus Pieter Hendrikus Benten
  • Publication number: 20130301363
    Abstract: Upon programming a semiconductor memory device including a first and a second n-wells, a first and a second p-channel memory transistors respectively formed in the first and the second n-wells, and a bit line connected to a drain of the first p-channel transistor and a drain of the second p-channel memory transistor, a first voltage is applied to the first bit line, a second voltage is applied to the first n-well, and a third voltage lower than the second voltage is applied to the second n-well.
    Type: Application
    Filed: February 26, 2013
    Publication date: November 14, 2013
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Hiroyuki Ogawa
  • Publication number: 20130301364
    Abstract: A single-ended sense amplifier circuit of the invention comprises first and second MOS transistors and first and second precharge circuits. The first MOS transistor drives the bit line to a predetermined voltage and switches connection between the bit line and a sense node and the second MOS transistor whose gate is connected to the sense node amplifies the signal via the first MOS transistor. The first precharge circuit precharges the bit line to a first potential and the second precharge circuit precharges the sense node to a second potential. Before sensing operation, the bit line is driven to the predetermined voltage when the above gate voltage is controlled to decrease. The predetermined voltage is appropriately set so that a required voltage difference at the sense node between high and low levels can be obtained near a changing point between charge transfer/distributing modes.
    Type: Application
    Filed: November 1, 2012
    Publication date: November 14, 2013
    Inventor: ELPIDA MEMORY, INC.
  • Publication number: 20130301365
    Abstract: A memory includes a data pin, an address pin, and a reference voltage generation circuit. The reference voltage generation circuit includes a first reference voltage generation circuit and a second reference voltage generation circuit. The first reference voltage generation circuit is electronically connected to the data pin, and supplies a reliable first reference voltage to the data pin. The second reference voltage generation circuit is electronically connected to the address pin, and supplies a reliable second reference voltage to the address pin.
    Type: Application
    Filed: November 18, 2012
    Publication date: November 14, 2013
    Inventors: Bo TIAN, Kang WU
  • Publication number: 20130301366
    Abstract: A semiconductor memory device of the present invention includes a memory cell array with cell strings having word lines stacked on a substrate and a vertical channel layer formed through the word lines, a peripheral circuit configured to select one of the word lines and perform a program operation on the selected word line, and a control circuit configured to control the peripheral circuit to perform the program operation by applying a program voltage to a word line selected for the program operation, applying a ground voltage to a word line of which a program operation has been completed and applying a pass voltage to the other word lines.
    Type: Application
    Filed: August 31, 2012
    Publication date: November 14, 2013
    Applicant: SK HYNIX INC.
    Inventor: Hwang HUH
  • Publication number: 20130301367
    Abstract: An object is to provide a semiconductor device with a novel structure, which can hold stored data even when power is not supplied and which has an unlimited number of write cycles. The semiconductor device is formed using a memory cell including a wide band gap semiconductor such as an oxide semiconductor. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference potential for reading data from the memory cell. When the wide band gap semiconductor which allows a sufficient reduction in off-state current of a transistor included in the memory cell is used, a semiconductor device which can hold data for a long period can be provided.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Inventors: Shuhei Nagatsuka, Takanori Matsuzaki, Hiroki Inoue, Kiyoshi Kato
  • Publication number: 20130301368
    Abstract: The disclosed embodiments related to a clocked memory system which performs a calibration operation at a full-rate frequency to determine a full-rate calibration state that specifies a delay between a clock signal and a corresponding data signal in the clocked memory system. Next, the clocked memory system uses the full-rate calibration state to calculate a sub-rate calibration state, which is associated with a sub-rate frequency (e.g., ½, ¼ or ? of the full-rate frequency). The system then uses this sub-rate calibration state when the clocked memory system is operating at the sub-rate frequency. This calculation of the sub-rate state calibration states eliminates the need to perform an additional time-consuming calibration operation for each sub-rate.
    Type: Application
    Filed: May 3, 2012
    Publication date: November 14, 2013
    Applicant: RAMBUS INC.
    Inventors: Akash Bansal, Yohan U. Frans, Kishore V. Kasamsetty, Todd Bystrom, Simon Li, Arun Vaidyanath
  • Publication number: 20130301369
    Abstract: A method of self-testing and self-repairing a random access memory (RAM) is includes collecting failure data of the RAM with redundant rows and columns, wherein the failure data of all failed cells of the RAM are stored in two failure bit map (FBM) data structures. The method further includes performing obvious repair of failed cells during the collecting of the failure data and analyzing the failure data in the two FBM data structure to determine repair methods. The method further includes repairing failed cells of the RAM by using the redundant rows and columns.
    Type: Application
    Filed: July 15, 2013
    Publication date: November 14, 2013
    Inventors: Volodymyr SHVYDUN, Saman M. I. ADHAM
  • Publication number: 20130301370
    Abstract: A device includes first memory blocks each including a first local bit line, first memory cells connected to the first local bit line and a first hierarchy switch connected between a first global bit line and the first local bit line, a dummy global bit line connected to the second node of a first sense amplifier, a dummy block including a dummy local bit line, dummy memory cells connected to the dummy local bit line and a dummy hierarchy switch connected between the dummy global bit line and the dummy local bit line, and a control circuit supplied with address information and configured to respond to the address information designating any one of the first memory blocks to turn ON each of the dummy hierarchy switch of the dummy block and the first hierarchy switch of one of the first memory blocks designated by the address information.
    Type: Application
    Filed: July 5, 2013
    Publication date: November 14, 2013
    Inventor: Seiji NARUI
  • Publication number: 20130301371
    Abstract: A dynamic random access memory (DRAM) with multiple thermal sensors disposed therein and a control method for the DRAM. A DRAM in accordance with an exemplary embodiment of the invention provides multi-zone temperature detection. The DRAM comprises a plurality of banks, a plurality of thermal sensors and a control unit. The thermal sensors are disposed between the banks. The control unit controls the thermal sensors to obtain sensed temperatures, and sets a self-refresh cycle for all of the banks based on the highest one of the sensed temperatures.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventor: Chih-Jen Chen
  • Publication number: 20130301372
    Abstract: A power management method includes receiving a first command with first address indicating a first high power operation that is immediately executed in a first memory die, after receipt of the first command, receiving a second command with a second address indicating a second high power operation, such that an immediate execution of the second high power operation would overlap the first high power operation, and delaying execution of second high power operation through a first waiting period that ends upon completion of the first high power operation, while applying a reference voltage to a second word line of the second memory die indicated by the second address.
    Type: Application
    Filed: February 21, 2013
    Publication date: November 14, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: SANG-SOO PARK, BONG-SOON LIM, HYUK-JUN YOO
  • Publication number: 20130301373
    Abstract: A power supply voltage for a memory chip is compared with a plurality of threshold voltages that correspond to voltages below which classes of memory operations can no longer be guaranteed. When the power supply voltage drops below a threshold voltage, appropriate action is taken, which may include generating an indicator such as a flag, proceeding with the operations in some modified manner, or disabling operations that are no longer guaranteed, either permanently or until power is restored, or until some other appropriate time.
    Type: Application
    Filed: May 14, 2012
    Publication date: November 14, 2013
    Inventor: Eugene Jinglun Tam
  • Publication number: 20130301374
    Abstract: A word line driver including a control switch configured to receive a control signal, where the control switch is between a first node configured to receive an operating voltage signal and a second node configured to determine an output of the word line driver. The word line driver further includes a cross-coupled amplifier electrically connected to the second node. The word line driver further includes at least one inverter electrically connected to the cross-coupled amplifier. A semiconductor device including the word line driver and a memory array including at least one electronic fuse.
    Type: Application
    Filed: May 8, 2012
    Publication date: November 14, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Li LIAO, Sung-Chieh LIN, Kuoyuan (Peter) HSU
  • Publication number: 20130301375
    Abstract: A method for operating an apparatus with at least one rotating shaft, the at least one rotating shaft comprising functional elements which act on material to be processed in the apparatus, the apparatus comprising a filling orifice and an outlet orifice with an adjustable lower edge, and material being conveyed continuously through the apparatus from the filling orifice to the outlet orifice, said method comprising the following steps: a) measuring load data for the at least one rotating shaft in order to determine shaft load, b) lowering the lower edge of the outlet orifice and/or reducing the quantity of material supplied if the shaft load exceeds a specified maximum load, or displacing the lower edge of the outlet orifice upwards and/or increasing the quantity of material supplied if the shaft load is less than a specified shaft load.
    Type: Application
    Filed: May 6, 2013
    Publication date: November 14, 2013
    Inventors: Oskar Stephan, Monte Peterson
  • Publication number: 20130301376
    Abstract: A device for portioning and kneading dough is provided, comprising a chamber drum incrementally rotatable about a drive shaft by a main drive provided at the circumferential sections thereof with accommodation chambers, wherein in each accommodation chamber there may be slid one or a plurality of weighing stamps in the radial direction of the chamber drum by motion-according coupling with a control device. At least one circumferential section of the chamber drum, which has at least one accommodation chamber, may be removed and re-attached in the axial direction together with the weighing stamp situated in the accommodation chamber. Each weighing chamber is motion-accordingly coupled with the control device by a lever shaft, which is provided at one of its lever shaft ends with a cam roller housed in a cam-like curved compulsory guiding of a control device.
    Type: Application
    Filed: April 13, 2011
    Publication date: November 14, 2013
    Applicant: Konig Maschinen Gesellschaft M.B.H.
    Inventors: Robert Sauseng, Zlatko Bajrektarevic
  • Publication number: 20130301377
    Abstract: An apparatus is disclosed. The apparatus includes a bubble implosion reactor cavitation device. The bubble implosion reactor cavitation device includes a tube-shaped cylindrical body including an upstream, a distal end surface and a downstream, proximal end surface. The tube-shaped cylindrical body defines an axial passage that extends through the tube-shaped cylindrical body between the upstream, distal end surface and the downstream, proximal end surface. The apparatus also includes a bubble generator subassembly connected to the tube-shaped cylindrical body. The bubble generator subassembly is at least partially disposed within the axial passage defined by the tube-shaped cylindrical body. The apparatus also includes a retaining member connected to the tube-shaped cylindrical body for retaining the bubble generator subassembly within the axial passage defined by the tube-shaped cylindrical body.
    Type: Application
    Filed: April 8, 2013
    Publication date: November 14, 2013
    Applicant: Caisson Technology Group LLC
    Inventor: Alexander E. Kravtsov
  • Publication number: 20130301378
    Abstract: A liquid condiment dispenser comprises a container closed by a lid and an agitator within the container. The agitator includes an elongate connector portion and an agitator portion. One end of the connector portion is connected to the agitator portion. The connector portion is capable of pivotal movement with respect to the lid. The cross sectional area of the connector portion transverse to its length is substantially less than that of the agitator portion. The agitator portion includes at least one passage extending through it and a weight of relatively dense material, such as metal, embedded within it.
    Type: Application
    Filed: May 2, 2013
    Publication date: November 14, 2013
    Inventor: Lars JUNKER
  • Publication number: 20130301379
    Abstract: A layer multiplier (100) is disclosed. It comprises an inlet (102) for a flow of multilayered flowable material, a distribution manifold (104) into which the inlet debouches, a number>2 of separate splitting channels (106) extending from the distribution manifold, a recombination manifold (108) into which the splitting channels debouch, an outlet in one end of the recombination manifold, and the distribution manifold is arranged in an opposing relationship with the recombination manifold.
    Type: Application
    Filed: January 11, 2012
    Publication date: November 14, 2013
    Applicant: Tetra Laval Holdings & Finance S.A.
    Inventors: Peter Neerincx, Sven Peelen
  • Publication number: 20130301380
    Abstract: A real-time imaging method that provides ultrasonic imaging and optoacoustic imaging coregistered through application of the same hand-held probe to generate and detect ultrasonic and optoacoustic signals. These signals are digitized, processed and used to reconstruct anatomical maps superimposed with maps of two functional parameters of blood hemoglobin index and blood oxygenation index. The blood hemoglobin index represents blood hemoglobin concentration changes in the areas of diagnostic interest relative to the background blood concentration. The blood oxygenation index represents blood oxygenation changes in the areas of diagnostic interest relative to the background level of blood oxygenation. These coregistered maps can be used to noninvasively differentiate malignant tumors from benign lumps and cysts.
    Type: Application
    Filed: November 2, 2012
    Publication date: November 14, 2013
    Inventors: Alexander A. Oraevsky, Sergey A. Ermilov, Adre Conjusteau, Peter Brecht, Vyacheslav Nadvoretskly, Richard Su, Donald G. Herzog, Bryan Clingman, Jason Zalev
  • Publication number: 20130301381
    Abstract: A volume image generating method including transmitting an ultrasonic signal to a target body divided into a plurality of regions and generating a first sub-volume image corresponding to a first region from among the plurality of regions of the target body, based on a response signal reflected from the target body; generating a second sub-volume image corresponding to a second region contacting the first region from among the plurality of regions; connecting the second sub-volume image to the first sub-volume image according to a location relationship between the first region and the second region of the target body; and re-generating the second sub-volume image based on a concordance rate between sectional images of the first and second sub-volume images that contact each other, and connecting the re-generated second sub-volume image to the first sub-volume image.
    Type: Application
    Filed: May 13, 2013
    Publication date: November 14, 2013
    Applicant: SAMSUNG MEDISON CO., LTD.
    Inventors: Joo-Hyun SONG, Jin-Yong LEE
  • Publication number: 20130301382
    Abstract: A method of high-resolution ultrasound imaging, in which transducers are made to emit ultrasound waves in a field of observations containing micro bubbles, by making the micro bubbles burst one by one in tandem with the emissions of ultrasound waves. At each shot j of an ultrasound wave, raw reverberated signals Sj(i,t) picked up by each transducer i are recorded, and then differential signals Vj(i,t) representative of variations between successive raw signals are determined, a parabolic function Pj(x) is fitted to the differential signals corresponding to each shot j, and then a crest Aj(x0,y0) of this function Pj, corresponding to the position of the micro bubble destroyed between shots j-1 and j, is determined.
    Type: Application
    Filed: November 29, 2011
    Publication date: November 14, 2013
    Inventors: Olivier Couture, Mickael Tanter, Mathias Fink
  • Publication number: 20130301383
    Abstract: The present technology relates generally to portable acoustic holography systems for therapeutic ultrasound sources, and associated devices and methods. In some embodiments, a method of characterizing an ultrasound source by acoustic holography includes the use of a transducer geometry characteristic, a transducer operation characteristic, and a holography system measurement characteristic. A control computer can be instructed to determine holography measurement parameters. Based on the holography measurement parameters, the method can include scanning a target surface to obtain a hologram. Waveform measurements at a plurality of points on the target surface can be captured. Finally, the method can include processing the measurements to reconstruct at least one characteristic of the ultrasound source.
    Type: Application
    Filed: May 14, 2013
    Publication date: November 14, 2013
    Inventors: Oleg A. Sapozhnikov, Michael R. Bailey, Peter J. Kaczkowski, Vera A. Khokhlova, Wayne Kreider
  • Publication number: 20130301384
    Abstract: A method for determining a sail plan for a towed-array marine seismic survey includes: dividing a survey area into a regular grid of tiles; and identifying a subset of the tiles as nodes around which continuously curved sail lines are defined. The nodes define regular pattern further including: a first subpattern of nodes; and a second subpattern of nodes offset from the first subpattern. A method for conducting a towed array marine survey includes: traversing a plurality of continuously curved sail lines across a survey area, each sail line being relative to a node; and acquiring seismic data while traversing the continuously curved sail lines. The set of nodes defining a regular pattern further including: a first subpattern of nodes; and a second subpattern of nodes offset from the first subpattern.
    Type: Application
    Filed: July 16, 2013
    Publication date: November 14, 2013
    Inventors: DAVID IAN HILL, NICOLAE MOLDOVEANU, STEVEN FEALY
  • Publication number: 20130301385
    Abstract: A system comprises towed marine geophysical equipment, adapted for towing through a body of water; and a surface covering, comprising a textural attribute of shark skin, attached to the marine geophysical equipment. A method comprises towing marine geophysical equipment having a surface covering, comprising a textural attribute of shark skin, attached thereto.
    Type: Application
    Filed: July 17, 2013
    Publication date: November 14, 2013
    Inventor: Bruce William Harrick
  • Publication number: 20130301386
    Abstract: Computing device, computer instructions and method for simultaneously denoising and attenuating multiples in seismic data recorded with seismic receivers. The method includes receiving the seismic data, wherein the seismic data includes a pressure P component and a vertical Z component; separating the seismic data into up-going U wave-fields and down-going D wave-fields; calculating an up-down deconvolution R based on the up-going U and the down-going D wave-fields; generating a multiple model M based on the up-down deconvolution R; and adaptively subtracting the multiple model M from the pressure P component to obtain a corrected pressure Pfree component from which simultaneously the noise and the multiples were removed. A multiple is a wave-field that propagates from a source to a receiver and experiences more than one reflection.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 14, 2013
    Applicant: CGGVERITAS SERVICES SA
    Inventor: Sergio GRION
  • Publication number: 20130301387
    Abstract: Method for redatuming seismic data to any arbitrary location in the subsurface in a way that is consistent with the internal scattering in the subsurface. Direct arrival times are estimated from every point to every point on the edges of a virtual box in the subsurface (102). Green's functions are estimated by iterative optimization (103), using the direct arrival times as initial guesses (102), to minimize error in the source field reconstruction, which consists of the multidimensional auto-correlation of the Green's functions. The estimated Green's functions are the used to determine simulated internal multiple reflections (104). The measured data may be corrected by subtracting the simulated internal multiple reflections, or the Green's function may be used to do local imaging or local velocity model building, particularly advantageous in full wavefield inversion (104).
    Type: Application
    Filed: March 25, 2013
    Publication date: November 14, 2013
    Inventor: Gert-Jan A. van Groenestijn
  • Publication number: 20130301388
    Abstract: An apparatus and method for estimating a parameter of interest of an earth formation involving alignment information between receivers and their corresponding oriented transmitters. The method may include generating signals indicative responses to energy transmitted into an earth formation; estimating differences in alignment between transmitters and receivers; using the estimated differences in alignment to compensate for misalignment; and estimating a parameter of interest using the misalignment compensated signals. The apparatus may include a bottom hole assembly with one or more oriented transmitters, one or more oriented receivers, one or more alignment sensors, and at least one processor configured to compensate for misalignment using information about difference in alignment between the at least one oriented transmitter and at least one oriented receiver.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 14, 2013
    Applicant: BAKER HUGHES INCORPORATED
    Inventors: Andreas Hartmann, Christian Fulda, Hans-Martin Maurer
  • Publication number: 20130301389
    Abstract: A method for synchronizing an actuation of a seismic source with at least one of an acquisition and storage of an acoustic wave by a seismic tool having steps of determining at least one of a drilling pause and a seismic measurement, transmitting a trigger signal to a tool controller, actuating the seismic source; receiving the trigger signal and recording seismic waves in a data storage medium.
    Type: Application
    Filed: November 4, 2011
    Publication date: November 14, 2013
    Applicant: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventors: Jeff Alford, Andy Hawthorn
  • Publication number: 20130301390
    Abstract: A method includes energizing an ultrasound driver to emit ultrasonic energy in a space, sensing ultrasonic energy within the space, determining an occupancy condition of the space in response to sensing ultrasonic energy reflected from the ultrasound driver, and determining the occupancy condition of the space in response to sensing ultrasonic energy in the space that was not emitted by the ultrasound driver.
    Type: Application
    Filed: July 16, 2013
    Publication date: November 14, 2013
    Inventor: Robert L. Hick
  • Publication number: 20130301391
    Abstract: A system for small space positioning comprises a transmitting element at a fixed and known location, which transmitting a modulated continuous wave, for example an ultrasonic wave, having a continuous carrier signal part and a base-band signal modulated thereon. The transmitting element transmits the modulated continuous wave over a range in which an object to be positioned may appear. A receiving element receives signals transmitted by the transmitting device and reflected by the object, and a position detection element determines a position of the object from analysis of both the carrier signal part and the base-band signal received from the reflected signal.
    Type: Application
    Filed: November 16, 2011
    Publication date: November 14, 2013
    Applicant: QUALCOMM Incorporated
    Inventors: Nathan Altman, Yossef Tsfaty, Meir Agassy
  • Publication number: 20130301392
    Abstract: An apparatus for transmitting audio tokens includes an acoustic transmitter to generate a range of audio frequencies including an infrasonic range, a sonic range, and an ultrasonic range. An audio token generator assembles the audio tokens, which include a timestamp and an identifier, and modulates the audio token in to the range of audio frequencies. A synchronizer determines the timestamp relative to an input audio stream and a mixer mixes the audio stream and the audio token for presentation by the acoustic transmitter. An apparatus for receiving the audio tokens includes an acoustic receiver to receive the range of audio frequencies. An audio token extractor extracts the audio token including the timestamp and the identifier from the range of audio frequencies. An interpreter determines user information responsive to at least one of the timestamp and the identifier and a user interface element present the user information to a user.
    Type: Application
    Filed: May 8, 2013
    Publication date: November 14, 2013
    Inventor: Guochun Zhao
  • Publication number: 20130301393
    Abstract: A marine air gun generates an acoustic signal in water, for example, during a marine seismic survey. The marine air gun includes digital electronic circuitry. The digital electronic circuitry may control an actuator of the marine air gun, digitize and store data from sensors located on or near the marine air gun, send and/or receive digital communications, store and/or output electrical energy, and/or perform other functions. A marine seismic source system that includes multiple air gun clusters may have a separate digital communication link between a command center and each air gun cluster. Each communication link may provide power and digital communication between the command center and one of the air gun clusters.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 14, 2013
    Inventors: William Allen Nance, Daniel Eugene Hobson
  • Publication number: 20130301394
    Abstract: In some implementations, a capacitive micromachined ultrasonic transducer (CMUT) apparatus includes one or more CMUTs or CMUT arrays, an acoustic window, a coupling medium, and a packaging substrate. The acoustic window may have various configurations, such as for reducing acoustic reflectance or increasing mechanical properties. In some examples, at least one of the CMUTs, the acoustic window or the coupling medium may include a focusing capability for focusing acoustic energy to or from the CMUT.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 14, 2013
    Applicant: Kolo Technologies, Inc.
    Inventors: Li Chen, Yongli Huang
  • Publication number: 20130301395
    Abstract: An ultrasound probe includes a thermal drain across which heat is thermally conducted from an ultrasound transducer to an outer polymeric casing wall of the ultrasound probe.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 14, 2013
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Jean Marc Hebrard, Daniel Vignet
  • Publication number: 20130301396
    Abstract: There is provided a housing for a vibration generating apparatus, the housing including: a bracket including a protrusion part protruding from an edge thereof; and a case coupled to the bracket and having an insertion hole into which the protrusion part is inserted when the case is coupled to the bracket.
    Type: Application
    Filed: August 31, 2012
    Publication date: November 14, 2013
    Inventor: Jin Hoon KIM
  • Publication number: 20130301397
    Abstract: An optical disc device includes an optical pickup that causes a laser beam to be incident on an optical disc and detects a reflected beam, an A/D converter that converts into a digital signal a plurality of analog signals obtained from the reflected beam detected by the optical pickup, an error signal generating circuit that generates a servo signal for the optical pickup based on the digital signal converted by the A/D converter, a low-pass filter that removes noise of a specific band included in the servo error signal generated by the error signal generating circuit, a main processor that switches a noise removal band of the low-pass filter based on states of the optical disc, and an actuator that performs servo control for the optical pickup based on the servo error signal from which the noise has been removed by the low-pass filter.
    Type: Application
    Filed: April 12, 2013
    Publication date: November 14, 2013
    Applicant: FUNAI ELECTRIC CO., LTD.
    Inventors: Syunsuke Sehara, Shinya Shimizu
  • Publication number: 20130301398
    Abstract: An optical disk recording method includes the steps of: providing a multi-pulse chain from a recording wave; independently changing the pulse rise timing and pulse fall timing (pulse width) of the first pulse in the multi-pulse chain in accordance with a preceding space length and a recording mark length; changing the pulse rise timing and pulse fall timing (pulse width) in accordance with a following space length and the recording mark length in a predetermined timing or in independence; and in relation to the smallest mark recorded by irradiation with mono pulse, changing the rise timing in accordance with the preceding space length and the recording mark length and the fall timing (pulse width) in accordance with the following space length and recording mark length, compensating various optical disks different in recording material without change of the fundamental waveform.
    Type: Application
    Filed: July 17, 2013
    Publication date: November 14, 2013
    Inventors: Shinji FUJITA, Takeshi MAEDA, Manabu SHIOZAWA, Takahiro KUROKAWA