Abstract: A method and an apparatus for calibrating a low frequency clock are disclosed. The method includes: calculating a frequency of a low frequency clock in a current low frequency clock calibration; and calculating an average value of low frequency clock frequencies in n clock calibrations before the current calibration, where n is greater than 1 and is an integer; judging whether a difference between the frequency of the low frequency clock in the current low frequency clock calibration and the average value is smaller than a preset threshold for the difference; and if the difference between the frequency of the low frequency clock in the current low frequency clock calibration and the average value is smaller than the preset threshold for the difference, calculating the number of sleep cycles according to the calculated and obtained frequency of the low frequency clock in the current low frequency clock calibration.

Abstract: A circuit for skew reduction, includes: first signal lines configured to transmit first signals delayed by first paths respectively; second signal lines configured to transmit second signals delayed by second paths respectively; and a first swap circuit, wherein the first swap circuit is configured to swap and connect the at least one of the first signal lines to the at least one of the second signal lines, when a mutual delay time difference of the second signals in a state where the at least one of the first signal lines is swapped and connected to the at least one of the second signal lines is smaller than a mutual delay time difference of the second signal lines in a state where the first signal lines is connected to the second signal lines without being swapped.

Abstract: Level shifting circuitry is provided for generating an output signal in response to an input signal. The level shifting circuitry includes a pulldown path for pulling the output signal to a lower output voltage level in response to a first transition of the input signal and a pullup path for pulling the output signal to a higher output voltage level in response to a second transition of the input signal. Pullup control circuitry places the pullup path in a non-conductive state in response to the output signal being pulled to the higher output voltage level. A keeper path keeps the output signal at the higher output voltage level while the pullup path is non-conductive until the pulldown path pulls the output signal low. A maximum drive current of the pulldown path is greater than a maximum drive current of the keeper path.

Abstract: According to an exemplary implementation, a switching circuit includes a bipolar junction transistor, a base current supply configured to turn-on the bipolar junction transistor, and a base discharge switch configured to selectively draw current away from a base of the bipolar junction transistor so as to turn-off the bipolar junction transistor. The base discharge switch can further be configured to selectively prevent the base current supply from providing current to the base of the bipolar junction transistor. The base discharge switch may be coupled across the base of the bipolar junction transistor and an emitter of the bipolar junction transistor. The base discharge switch can further be configured to selectively cause the base of the bipolar junction transistor to have a base voltage substantially lower than an emitter voltage of the bipolar junction transistor.

Abstract: A power semiconductor device includes an output transistor, a control circuit connected with a gate of the output transistor, a first discharge route from a first node to a ground terminal, and a second discharge route from the first node to the ground terminal. In a usual turn-off, only the first discharge route is used. When a load abnormality occurs, both of the first and second discharge routes are used. The second discharge route contains a discharge transistor and a countercurrent prevention device. The discharge transistor is connected between the first node and the second node. The countercurrent prevention device prevents a flow of current from the third node to the second node. At least, in an OFF period, the control circuit sets the gate voltage of the discharge transistor to a high level.

Abstract: Some implementations provide a semiconductor package that includes a first die and a second die adjacent to the first die. The second die is capable of heating the first die. The semiconductor package also includes a leakage sensor configured to measure a leakage current of the first die. The semiconductor package also includes a thermal management unit coupled to the leakage sensor. The thermal management unit configured to control a temperature of the first die based, on the leakage current of the first die.

Abstract: Electronic apparatus that can suppress the operating voltage of an incorporated semiconductor integrated circuit to a low voltage is provided. Electronic apparatus 1 includes a power supply circuit 13, a semiconductor integrated circuit 10 that operates by a supply voltage supplied from the power supply circuit 13, and a temperature sensor 11 that measures the temperature of the semiconductor integrated circuit 10. The power supply circuit 13 decreases the supply voltage according to a rise in the measured temperature.

Abstract: A fuse sensing circuit is disclosed. Embodiments include: providing a sense input terminal; providing a sense output terminal; and providing first and second capacitors that are configured to charge and discharge based on the sense input terminal, wherein the first and second capacitors are further configured to discharge current to a fuse unit cell, and the sense output terminal is configured to indicate a fuse state of the fuse unit cell based on the discharging of the first and second capacitors. Embodiments include the indicated fuse state being based on a discharge rate difference between the discharging of the first capacitor and the discharging of the second capacitor.

Abstract: A configurable multistage charge pump including multiple pumpcells, at least one bypass switch and control logic. The pumpcells are coupled together in series including a first pumpcell receiving an input voltage and at least one remaining pumpcell including a last pumpcell which generates an output voltage. Each bypass switch is coupled to selectively provide the input voltage to a pumpcell input of a corresponding one of the remaining pumpcells. The control logic is configured to determine one of multiple voltage ranges of the input voltage, to enable each pumpcell for a first voltage range and to disable and bypass at least one pumpcell for at least one other voltage range. A method of operating a multistage charge pump including detecting an input voltage, selecting a voltage range based on an input voltage, and enabling a number of cascaded pumpcells corresponding to the selected voltage range.

Abstract: The switch circuit comprises a first switch, a second switch, a third switch, a forth switch, a fifth switch, a sixth switch and a seventh switch. The first switch couples the voltage input terminal to one terminal of a flying capacitor. The second switch couples one terminal of the flying capacitor to one terminal of the output capacitor. The third switch couples one terminal of the flying capacitor to a common terminal. The fourth switch couples the other terminal of the flying capacitor to one terminal of the output capacitor. The fifth switch couples one terminal of the output capacitor to a positive voltage output terminal. The sixth switch couples the other terminal of the flying capacitor to the common terminal. The seventh switch couples the other terminal of the flying capacitor to a negative voltage output terminal.

Abstract: An apparatus for transferring charge has a first charge pump path with a plurality of stages having first capacitors, and a second charge pump path, also with a plurality of stage having second capacitors, in parallel with the first charge pump path. The first and second charge pump paths are coupled to share a common output node. The apparatus also has a timing circuit coupled with the first and second charge pump paths. Among other things, the timing circuit is configured to cause at least one of the first capacitors to periodically charge at least one of the second capacitors.

Abstract: An age compensation method and apparatus for an integrated circuit (IC). An IC may be configured to operate at an initial operating voltage at the beginning of its operational life. Various circuits may be used to detect aging of the IC, and indications of aging may be stored to determine the aging of the IC. The information indicative of the determined aging of the IC may be compared to an aging threshold. If the information indicates that the aging is greater than or equal to the determined aging threshold, the operating voltage of the IC may be increased. This process may be repeated over the life of the IC, increasing the operating voltage as the IC ages. Raising the operating voltage in response to aging may compensate for various age related degradation mechanisms that can occur over the operational life of the IC.

Abstract: The present invention is directed to monolithic integrated circuits incorporating an oscillator element that are particularly suited for use in timing applications. The oscillator element includes a resonator element having a piezoelectric material disposed between a pair of electrodes. The oscillator element also includes an acoustic confinement structure that may be disposed on either side of the resonator element. The acoustic confinement element includes alternating sets of low and high acoustic impedance materials. A temperature compensation layer may be disposed between the piezoelectric material and at least one of the electrodes. The oscillator element is monolithically integrated with an integrated circuit element through an interconnection. The oscillator element and the integrated circuit element may be fabricated sequentially or concurrently.

Abstract: A control circuit for a power converter includes a shared pin, a driving circuit, a current source, a sampling circuit, and a signal processing circuit. The shared pin is coupled with an output end of the power converter through a resistor. The driving circuit conducts a switch of the power converter. The current source provides a current to the resistor through the shared pin. The sampling circuit samples the signal on the shared pin for generating a first sampling value and a second sampling value. The signal processing circuit calculates a first difference between the first sampling value and a first reference value, and a second difference between the second sampling value and a second reference value. When the difference between the first difference and the second difference is less than a predetermined value, the signal processing circuit may therefore configure the conduction time or frequency of the switch.

Abstract: Semiconductor devices include a transistor having a gate structure located close to a channel region that comprises a colossal magnetocapacitive material. The gate structure is configured to affect electrical current flow through the channel region between a source and a drain. The colossal magnetocapacitive material optionally may be disposed between two structures, one or both of which may be electrically conductive, magnetic, or both electrically conductive and magnetic. Methods of fabricating semiconductor devices include forming a colossal magnetocapacitive material close to a channel region between a source and a drain of a transistor, and configuring the colossal magnetocapacitive material to exhibit colossal magnetocapacitance for generating an electrical field in the channel region. Methods of affecting current flow through a transistor include causing a colossal magnetocapacitive material to exhibit colossal magnetocapacitance and generate an electrical field in a channel region of a transistor.

Abstract: The invention relates to a switched mode power supply comprising at least one switch and at least one inductor, the at least one switch being arranged to connect one terminal of the at least one inductor to one of a plurality of supply voltages, the other terminal of the at least one inductor providing a supply output, and further comprising a capacitor connected in parallel with the at least one inductor.

Abstract: An antenna drive apparatus applying an antenna drive voltage to an antenna from an H-bridge circuit including four switching elements to drive the antenna, includes: a switching mechanism to switch between a full-bridge state in which a differential voltage between a pulse voltage and a reverse pulse voltage reversed from the pulse voltage is applied to the antenna as the antenna drive voltage, and a half-bridge state in which the pulse voltage or the reverse pulse voltage is applied to the antenna as the antenna drive voltage; and a control mechanism to control the switching mechanism so that the frequency of the full-bridge state per unit time during an initial period of driving of the antenna in a transmission period for transmitting a transmission signal by the antenna becomes higher than that during the subsequent period in the transmission period.

Abstract: Apparatus and methods for amplifier power supply control are provided. In certain implementations, an amplifier includes an input amplification stage and a power supply control block for generating a power high supply and a power low supply for the input amplification stage. The power supply control block receives a reference signal indicative of a common-mode input voltage of the amplifier, and the power supply control block adjusts a voltage level of the power high and power low supplies while maintaining a substantially constant voltage difference between the power high and power low supplies. The power supply control block changes the voltage level of the power high and power low supplies based on the reference signal such that the voltage levels of the power high and power low supplies move in relation to the common-mode input voltage.

Abstract: This disclosure is directed to devices and integrated circuits for instrumentation amplifiers. In one example, an instrumentation amplifier device uses two non-inverted outputs of a first multiple-output transconductance amplifier, and a non-inverted output and an inverted output of a second multiple-output transconductance amplifier. Both multiple-output transconductance amplifiers have a non-inverted output connected to an inverting input, and a non-inverting input connected to a respective input voltage terminal. A first resistor is connected between the inverting inputs of both multiple-output transconductance amplifiers. The outputs of both multiple-output transconductance amplifiers are connected together, connected through a second resistor to ground, and connected to an output voltage terminal. In other examples, two pairs of outputs from triple-output transconductance amplifiers are connected to provide two voltage output terminals, and may also be connected to buffers or a differential amplifier.

Abstract: Biasing methods and devices for amplifiers are described. The described methods generate bias voltages proportional to the amplifier output voltage to control stress voltages across transistors used within the amplifier.

Abstract: A circuit includes a first amplifier and a second amplifier, wherein first amplifier is configured to receive an input current at a first input of the first amplifier, and an output of the first op-mp is configured to drive a first input of the second amplifier. The circuit further includes a pull-up current source selectively coupled to the first input of the second amplifier, and a pull-down current source selectively coupled to the first input of the second amplifier. If the absolute value of the input current is larger than a predefined threshold current: i) the pull-up current source is configured to drive current into the first input of the second amplifier for a first polarity of the input current, and ii) the pull-down current source is configured to sink current from the first input of the second amplifier for a second polarity of the input current.

Abstract: An amplifier includes a transformer and a first stage gain circuit. The transformer includes a primary coil and a secondary coil. The primary coil is utilized for receiving an input signal. The first stage gain circuit has a first input port, which is coupled to the primary coil. The first stage gain circuit is utilized for gaining the input signal so as to generate a first output.

Abstract: An amplification circuit, which may be in a receive path of a communication device, includes an amplifier including at least a first amplification device and a switchable attenuation circuit. The switchable attenuation circuit includes one or more switches and a plurality of attenuation devices and is operable to provide different levels of attenuation to an input signal prior to input to the amplifier depending on the status of the one or more switches. The attenuation devices may be capacitors, wherein the capacitors may be arranged to form a capacitive divider with a level of attenuation dependent on the status of the switches. The switchable attenuation circuit may be a switched capacitive attenuation ladder of n stages, n being any integer, each ladder stage including a capacitive divider. The amplification circuit may also include a switch, which when closed provides an unattenuated path for the input signal to the amplifier input.

Abstract: A single semiconductor device package that reduces electromagnetic coupling between elements of a semiconductor device embodied within the package is provided. For a dual-path amplifier, such as a Doherty power amplifier, an isolation feature that separates carrier amplifier elements from peaking amplifier elements is included within the semiconductor device package. The isolation feature can take the form of a structure that is constructed of a conductive material coupled to ground and which separates the elements of the amplifier. The isolation feature can be included in a variety of semiconductor packages, including air cavity packages and overmolded packages. Through the use of the isolation feature provided by embodiments of the present invention a significant improvement in signal isolation between amplifier elements is realized, thereby improving performance of the dual-path amplifier.

Abstract: A power amplifier includes an amplifying element, a bias circuit, a common power supply terminal, and a resistor or an inductor. The bias circuit is connected to the amplifying element and supplies a bias voltage to an input terminal of the amplifying element. The bias circuit and an output bias terminal of the amplifying element are connected to the common power supply terminal. The resistor or the inductor is connected in series between the bias circuit and the common power supply terminal.

Abstract: An error detection system employs a chain of delay elements connected in an open loop configuration. To determine whether the oscillator is operating within a specified set of parameters, the error detection system applies a start pulse to an input of the open-loop chain of delay elements. The error detection system compares the resulting output signal with the output of the oscillator. If the oscillator has locked onto a harmonic of the intended output frequency, the comparison of the output signals will indicate an error.

Abstract: A ring oscillator includes a plurality of stages of delay cells coupled in serial. At least one delay cell includes a first inverter. The first inverter includes an input node receiving an input signal, a first transistor coupled to a first supply voltage and the input node, a second transistor coupled to a second supply voltage and the input node, an output node coupled to the first transistor and the second transistor and outputting an output signal, and at least one resistive device coupled to the capacitor, the first transistor, and the second transistor.

Abstract: A resonator element includes a base section, at least one pair of vibrating arms protruding from the base section, a support arm protruding from the base section, and a first through hole provided to the support arm, and penetrating the support arm in a thickness direction, and is fixed to an object via an adhesive entering the first through hole.

Abstract: A method includes providing an oscillator having a field effect transistor connected with a resonant circuit. The field effect transistor has a gate electrode coupled to a source of gate voltage, a source electrode, a drain electrode and a graphene channel disposed between the source electrode and the drain electrode and electrically connected thereto. The method further includes biasing the graphene channel via the gate electrode into a negative differential resistance region of operation to cause the oscillator to generate a frequency signal having a resonant frequency f0. There can be an additional step of varying the gate voltage so as to bias the graphene channel into the negative differential resistance region of operation and out of the negative differential resistance region of operation so as to turn on the frequency signal and to turn off the frequency signal, respectively.

Abstract: Provided is an oscillator including a piezoelectric vibrator (10), a vibration member (20) that constrains the piezoelectric vibrator (10) on one surface thereof, an elastic member (40) that is provided on one surface of the vibration member (20) or the other surface opposite to one surface and provided so as to be located between edges of the piezoelectric vibrator (10) and the vibration member (20) when seen in a plan view, a fixing member (42) that is provided on one surface or the other surface of the vibration member (20) and provided so as to be located between the piezoelectric vibrator (10) and the elastic member (40) when seen in a plan view, and a supporting member (30) that supports the vibration member (20) through the elastic member (40) and the fixing member (42).

Abstract: An electric transformer device (balun) is formed on a support plate having a first base face and an opposite second base face. The balun includes a first port (40) connectable to an electrical line for a differential signal and a second port connectable to an electrical line for a single-ended signal. A first printed conductive track is associated to the first base face of the support plate for connecting the first port to the second port. A printed conductive path is associated to the second base face of the support plate for connecting the first port to the second port. The printed conductive path is formed of a symmetric second and third printed conductive tracks.

Abstract: A thin film balun that can be made smaller and thinner while maintaining required balun characteristics is provided. A thin film balun 1 includes: an unbalanced transmission line UL including a first coil portion C1 and a second coil portion C2; a balanced transmission line BL including a third coil portion C3 and a fourth coil portion C4 that are positioned facing and magnetically coupled to the first coil portion C1 and the second coil portion C2 respectively; an unbalanced terminal UT connected to the first coil portion C1; a ground terminal G connected to the second coil portion C2 via a C component D; and an electrode D2 connected to the ground terminal G and facing a part of the second coil portion C2. The C component D is formed by the electrode D2 and the part D1 of the second coil portion C2.

Abstract: A nanoparticle-enhanced liquid crystal phase shifter is provided including a first substrate layer, a plurality of electrodes attached to the substrate layer, a ground plane layer attached to a second substrate layer, and a liquid crystal layer between the ground plane layer and the first substrate layer, including a suspension of a liquid crystal material and highly polarizable nanoparticles having specific shape and size characteristics.

Abstract: An exemplary embodiment of the present disclosure illustrates a signal transmission cell having a first through third conductors, a capacitor and an inductor. The first and third conductors form a first transmission circuit, and the second and the third conductors form a second transmission circuit. Signals which are respectively conveyed on the first transmission circuit and the second transmission circuit have the same magnitude, but have the opposite phases to each other, so as to form a pair of differential transmission lines. A first end of the inductor is electrically connected to the third conductor, and a second end of the inductor is electrically connected to a ground voltage. A first end of the capacitor is electrically connected to the first end of the inductor, and a second end of the capacitor is electrically connected to the second end the inductor.

Abstract: An embodiment of the present invention provides a method of applying patterned metallization to a ceramic block comprising applying a photodefinable ink to said ceramic block; drying said ink; exposing said photodefinable ink to UV radiation through a predefined mask according to the thickness of the film to form a pattern; developing said pattern in a developer solution thereby forming a patterned ceramic block; and rinsing, drying and firing said patterned ceramic block.

Abstract: A microwave resonator with impedance jump, comprises at least one line of high characteristic impedance of a determined length and one line of low characteristic impedance, at least the line of high characteristic impedance comprising a first line cut, a first link wire of a first determined impedance ensuring an electrical link for the passage of the signal from one side to the other of the first line cut. A method for producing a microwave resonator comprising an adjustment step is also provided.

Abstract: The utility model discloses a mini high-power magnetic latching relay, comprising a magnetic circuit, a contact part and a thrust disk; the magnetic circuit comprises a coil former, a coil, a magnetic enclosure, an iron core and a yoke; the magnetic enclosure comprises an alnico and an armature, characterized in that the coil former comprises a hollowed cylindrical shaft, a 1st mounting base and a 2nd mounting base; the 1st and 2nd mounting bases are horizontally arranged and integrated on the end of the cylindrical shaft; the magnetic enclosure is mounted on the thrust disk as installed on the 1st mounting base for coordinated sliding; whereas the contact part is mounted inside the 2nd mounting base for connection with the thrust disk; the utility model is characterized in that the magnetic enclosure and the contact part are on the same end of the coil former, which can reserve more expansion space for the coil, and thus improve loading capacity of the magnetic latching relay.

Abstract: A method and apparatus for controlling operation of a safety switch assembly having a number of fixed and movable contacts, a control mechanism that alters the conducting state of the contacts, and a magnetisable member that extends between alternate portions of the safety switch assembly. The safety switch assembly includes a magnetically operable electrical switch that is positioned proximate the magnetisable material such that changes in the magnetic condition of the magnetisable material alter the conducting state of the magnetically operable electrical switch.

Abstract: The present invention provides an electromagnetic relay, comprising a contact switching unit having a contact group which includes a pair of contacts in order to touch and separate; an electromagnet block which drives the contact switching unit to open and close the contacts; and an arc-extinguishing member having a connection member and permanent magnets, wherein the connection member is formed by connecting, via a middle part, opposing walls arranged in a direction perpendicular to the touch/separation direction of the contacts and permanent magnets are disposed on the opposing sections of the opposing walls.

Abstract: A nanomagnet having widely tunable anisotropy is disclosed. The disclosed nanomagnet is a magnetic particle with a convex shape having a first magnetically easy axis. The convex shape is modified to include at least one concavity to urge a second magnetically easy axis to form substantially offset from the first magnetically easy axis. In at least one embodiment, the convex shape is also modified to include at least one concavity to urge a second magnetically easy axis to form with a magnetic strength substantially different from the first magnetically easy axis.

Abstract: According to an embodiment, a transformer is provided that includes a first conductive coil wound about a first coil axis and a second conductive coil wound about a second coil axis. The second conductive coil is disposed proximate to the first conductive coil and the second coil axis is substantially parallel to the first coil axis. A closed-loop conductive winding is disposed proximate to the first conductive coil and the second conductive coil. The closed-loop conductive winding is wound about a loop axis at least one time where the loop axis is substantially parallel to the first coil axis and the second coil axis.

Abstract: A coil system for a burner management system and coil housing is provided having recessed terminals and a housing lid to cover the terminal recesses for reducing exposure of coil system terminals to air and unwanted contacts.

Abstract: A transformer assembly is provided that includes a housing, transformer oil disposed within the housing, a plurality of coils of electrically conductive wire, and aliphatic polyamide insulation material operable to insulate the coils disposed within the oil. The plurality of electrically conductive coils is disposed in the housing and in contact with the transformer oil. The aliphatic polyamide insulation material includes stabilizing compounds and nano-fillers. The stabilizing compounds provide thermal and chemical stability for the insulation material.

Abstract: A linear electromagnetic device, such as an inductor, transformer or the similar device, may include a core in which a magnetic flux is generable. The device may also include an opening through the core. The device may additionally include a primary conductor received in the opening and extending through the core. The primary conductor may include a substantially square or rectangular cross-section. An electrical current flowing through the primary conductor generates a magnetic field about the primary conductor, wherein substantially the entire magnetic field is absorbed by the core to generate the magnetic flux in the core.

Abstract: There is provided a power inductor including: a main body; and first and second external electrodes formed on both end portions of the main body, wherein the main body includes: upper and lower cover layers; at least one coil support layer having a through hole formed in a center thereof, at least one first recess portion formed in both lateral surfaces thereof and a plurality of second recess portions formed in respective corners thereof, and disposed between the upper and lower cover layers; and first and second coil layers formed on both surfaces of the coil support layer and having respective one ends thereof connected to the first and second external electrodes.

Abstract: There is provided a multi-layered chip device, including: a multi-layered body in which a plurality of inner magnetic layers are stacked; an inner electrode layer formed within the multi-layered body; an outer magnetic layer stacked on at least one of an upper surface and a lower surface of the multi-layered body; and external electrodes formed on outside of the multi-layered body and the outer magnetic layer and electrically connected to the inner electrode layer, wherein a length of the outer magnetic layer is shorter than the inner magnetic layer.

Abstract: A piezoelectric multi-layer component includes a piezoelectric main body, which has an inlet area and an outlet area. In the outlet area or in the inlet area at least two adjacent layers are polarized antiparallel to each other and at least two adjacent layers are polarized parallel to each other.

Abstract: A liquid food of beverage preparation machine that includes an electric supply circuit connectable to an electric power source; a heater powered by the electric supply circuit; and a thermal fuse device in thermal communication with the heater and associated with the electric supply circuit, the fuse device being arranged to interrupt the electric supply circuit from the power source when the heater exceeds a temperature limit. The thermal fuse device is reversible and includes a switch for automatically interrupting the electric supply circuit when the heater exceeds the temperature limit, the switch being operable by a user to close the electric supply circuit when the heater has a temperature that has returned below the temperature limit.

Abstract: Disclosed herein is a shift register in which leakage of charges from a voltage at a set node is prevented to stabilize an output from a stage. The shift register includes a plurality of stages for sequentially outputting scan pulses. Each stage includes a node controller for controlling signal states of a set node and a reset node, and an output unit supplied with any one of a plurality of clock pulses having different phases. The output unit outputs the supplied clock pulse as a scan pulse through an output terminal thereof according to the signal states of the set node and reset node. The node controller includes a first discharging switching device which is turned on or off in response to a scan pulse from a downstream stage. The first discharging switching device is connected between any one of a plurality of clock transfer lines and the set node.

Abstract: A fusible link mounting structure, comprising a three-series fusible link formed by providing three pieces of fuse elements in series within a single common housing, a cavity having a mounting space formed according to a size of the common housing for the three-series fusible link, a plurality of tabs projected from a bottom of the cavity into the mounting space, and a monopole fusible link formed by providing a piece of fuse element in a single monopole housing, wherein a total length of the mounting space is set to be shorter than a sum of lengths of three-pieces of the monopole housings, and the tabs are arranged corresponding to positions of fuse terminals provided in the three-series fusible link, and also arranged at such positions that a plurality of the terminals do not interfere with the monopole housing, when the monopole fusible link is mounted in the cavity.