Abstract: Computer-implemented methods for allowing users to specify interactive graphical designs are provided. The graphical designs can comprise multiple dimension versions—such as a tablet dimension version or a phone dimension version. Some of the methods involve an inheritance structure that defines a first dimension version of the design as a child of a second dimension version of the design. Specifications for properties of widgets in the graphical design are applied to the design in accordance with the inheritance specification. Some of the methods involve an inheritance characterization that determines how properties of a widget are affected by the inheritance structure across different dimension versions. Some of the methods involve an existence property for the widgets.

Abstract: A graph including a hub corresponding to a selected or primary item or keyword and a plurality of nodes corresponding to related or secondary items or keywords may be used to express the relationships between items or keywords. Optionally, the graph may include a plurality of tethers extending between the hub and each of the nodes. When used in Internet-based commerce, the relationship graph may recommend related secondary items to a customer who is searching for a primary item, and may further express the degree of relationship between the primary item and each of the secondary items. When the customer selects a node corresponding to a secondary item, a new set of nodes corresponding to tertiary items related to the selected secondary item may be displayed. In this manner, the relationships between the primary item and more distant tertiary items may also be represented to the customer.

Abstract: A computer based method visually highlights achievements of sports teams or players in displays of statistical data, such as statistical tables, that represent the performance of sports teams or players. The achievements to be highlighted may include multiple-game streaks and single-game achievements. Multiple-game streaks occur when a team or player meets a performance objective in multiple consecutive games. Such streaks are highlighted in displays of statistical data by visually emphasizing the data values that form the streak. Visual emphasis is achieved by, for example, displaying a visual indicator, such as a line, adjacent to the data values. A single-game achievement is highlighted by visually emphasizing the data value that represents the achievement, so that users can quickly identify single-game achievements in statistical tables. Details about the streak or achievement may be displayed when the user selects or passes a mouse pointer over one of the data values or over the visual indicator.

Abstract: Methods and systems are provided for decluttering icons on a map graphically presented on a display. In one implementation, a method is provided for decluttering icons representing points-of-interest on a map, wherein the method includes determining whether icons in a map view are overlapping and grouping the icons which are determined to overlap into at least one icon group. The method may also include repositioning the icons in each icon group into a decluttered icon patterns, wherein repositioning includes repositioning the icons at a predetermined distance from a common focal point. In addition, the method may include adjusting the repositioned icons to a different position in the map view when the repositioned icons overlap. Additionally, or alternatively, the method may include repositioning an icon in at least one decluttered icon pattern to a new position in the map view based on input from a user.

Abstract: A first desktop icon is displayed on a computer desktop. The icon is configured to enable execution of a first application. Based on an evaluation of business rules, the first icon is changed to a second icon. The second icon is configured to execute a second application.

Abstract: System and method for improving data input by using word frequency to text predict input. Other systems and methods include analyzing words already contained in a document (e.g. spell checking and OCR) and using word frequency to create a proxy system to reduce the space required to store data, allowing for more efficient usage of storage and enhancing the embedded content of matrix codes. The system displays the most common words in a language based upon the previously entered or displayed word(s), or the previously entered or displayed character or characters. Words with the most common frequency of use with the prior word(s) are displayed in a table to enable the user to quickly select one of the displayed words for rapid data entry. The input device can be a touch-sensitive display or non-touch sensitive type device.

Abstract: An information-processing apparatus which can display search conditions of search folders in an easy-to-see state in a list display of files/folders is provided. The information-processing apparatus has a file system that searches a file/folder which matches a search condition, and can generate and manage a search folder used to store meta data of files/folders obtained by that search, and includes a function of displaying a list of meta data of files/folders. This information-processing apparatus checks if a folder to be displayed in the list is a search folder. As a result of checking, if the folder to be displayed in the list is a search folder, the apparatus displays search conditions in fields of meta data items for which the search conditions of the search folder are set, in place of, for example, meta data.

Abstract: A scroll display control device is provided, which is capable of scroll-displaying a text corresponding to a picture in such manner that the text can be easily understood. The scroll display control device scroll-displays, in synchronism with reproduction of the picture correlated to text information (TI), the corresponding text information (TI) on a text display screen (TW). A scroll speed calculation unit (102) dynamically calculates a text scroll speed (v) on the basis of a time length of a picture section presently under reproduction, a text quantity of the corresponding text section and text display setting information. A picture text control unit (104) scroll-displays text of the text section at a predetermined reference position of the text display screen (TW) according to the scroll speed (v). By displaying preceding and succeeding texts with respect to the text corresponding to the picture section presently under reproduction, it is possible to read back and pre-read.

Abstract: Displaying overlapping windows from a client device. Windows are displayed at a client device with a first window overlapping a second window on a single display. The first window is a current window. The current window is based on front to back ordering of windows displayed at the client device. Pixels in a region of the first window are captured and sent to a display server. At the display server, the first window is displayed on a first display region. The second window becomes the current window, resulting in capturing and sending pixels in a region of the second window to the display server. At the display server, the second window is displayed on a second display region. At the display server, the first and second windows are displayed in a non-overlapping fashion by displaying the first window and the second window on separate display regions.

Abstract: A portable electronic device, computer program product, and method of presenting image information on a display with combined cropping and rotation selection and auto-resizing of cropped portion of the displayed image. A processor accepts a selection of a portion of a displayed image by creating and displaying a selection rectangle frame over the displayed image based on detecting a first user gesture in connection with the displayed image. The processor determines a user request for rotation of the displayed selection rectangle frame based on detecting a second user gesture. The processor then rotates the selection rectangle frame on the displayed image and resizes the selection rectangle frame while maintaining it within the outer boundaries of the displayed image and while contemporaneously expanding the selection rectangle frame up to an original size of the selection rectangle frame created and displayed over the displayed image.

Abstract: To effectively arouse a user's interest in new content and service, or content and service not used on a daily basis. Images of a plurality of display elements associated with respective content sets and/or service are shown; one or more display elements are selected, based on a designated position designated by a user; and content and/or a service associated with the selected display element is presented. In the above, presentation of the content and/or service is made in a different manner according to information about the provider thereof or the user.

Abstract: A method and apparatus for rendering data on a display is provided. A configurable number of dimensions are rendered on the display in a manner that depicts a sequential relationship between the configurable number of dimensions. Each rendered dimension on the display depicts one or more dimension instances. For the rendered dimension having the lowest sequential position in the sequential relationship between the configurable number of dimensions (hereafter the “lowest sequential dimension”), a determination is made as to whether hierarchical data is associated with a particular dimension instance of the lowest sequential dimension, and if so, at least a top level node of a tree of nodes is rendered in association with the particular dimension instance of the lowest sequential dimension on the display. Each node of the tree of nodes may, but need not, comprise a row of data.

Abstract: Techniques to present hierarchical information as orthographic projections are described. An apparatus may comprise an orthographic projection application arranged to manage a three dimensional orthographic projection of hierarchical information. The orthographic projection application may comprise a hierarchical information component operative to receive hierarchical information representing multiple nodes at different hierarchical levels, and parse the hierarchical information into a tree data structure, an orthographic generator component operative to generate a graphical tile for each node, arrange graphical tiles for each hierarchical level into graphical layers, and arrange the graphical layers in a vertical stack, and an orthographic presentation component operative to present a three dimensional orthographic projection of the hierarchical information with the stack of graphical layers each having multiple graphical tiles. Other embodiments are described and claimed.

Abstract: An apparatus, method and computer program product are provided for providing a cursor for indicating context data in a mapping application. An electronic device may display a map to a user via a mapping application having a cursor. A user may provide input selecting a type of context data to be represented by the cursor. The cursor may be positioned at a location on the map, and the electronic device may obtain context data based on the user input relating to the position and area proximate the position of the cursor on the map. The electronic device may then update a representation of the cursor using visual and other indicia to reflect the context data.

Abstract: The present invention aims at proposing a library creation method and a pattern shape estimation method in which it is possible, when estimating a shape based on comparison between an actual waveform and a library, to appropriately estimate the shape. As an illustrative embodiment to achieve the object, there are proposed a method of selecting a pattern by referring to a library, a method of creating a library by use of pattern cross-sectional shapes calculated through an exposure process simulation in advance, and a method for selecting a pattern shape stored in the library.

Abstract: Disclosed is a system, method, and computer-readable medium for designing a circuit and/or IC chip to be provided using an optical shrink technology node. Initial design data may be provided in a first technology node and through the use of embedding scaling factors in one or more EDA tools of the design flow, a design (e.g., mask data) can be generated for the circuit in an optical shrink technology node. Examples of EDA tools in which embedded scaling factors may be provided are simulation models and extraction tools including LPE decks and RC extraction technology files.

Abstract: Disclosed are a method, apparatus, and computer program product to implement routing for double patterning lithography. A three-phase routing scheme is employed, comprising a global router, a C-router, and a detail router. The C-router provides double patterning color seeding for routing tracks in the electronic design. The detail router employs space-tiles to perform double-patterning based routing for wires in the electronic design.

Abstract: Techniques for determining and a computing device configured to determine a quantum Karnaugh map through decomposing a quantum circuit into a multiple number of sub-circuits are provided. Also, techniques for obtaining and a computing device configured to obtain a quantum circuit which includes the minimum number of gates among possible quantum circuits corresponding to a quantum Karnaugh map are also provided.

Abstract: Software for designing and testing types of nanoelectronic circuits and larger scale electronics renderings is described. The software designs circuits comprising only a chain/leapfrog topology. The chain/leapfrog topology permits a wide range of circuits and circuit modules to be implemented on a common shared carbon nanotube, graphene nanoribbon, or strips of other types of semiconducting material, for example as rendered in traditional printed electronics and nanoscale printed electronics or as employing semiconducting polymers. In one approach a chain/leapfrog topology circuit design software tool accesses information in a library of chain/leapfrog circuits data, and creates descriptive data pertaining to a number of approaches to rendering electronics components using a library of component data. The chain/leapfrog circuits data library includes designs for a number of different types of chain/leapfrog circuit modules.

Abstract: A method of utilizing high level synthesis to automatically configure control logic of a hardware design for a pipelined parallel stream processor includes obtaining a scheduled graph representing a processing operation in the time domain as a function of clock cycles. The graph comprises a data path to be implemented in hardware as part of said stream processor, an input, an output, and parallel branches to enable data values to be streamed therethrough from the input to the output as a function of increasing clock cycle. The data path is partitioned to divide it into a plurality of discrete regions. Discrete control logic elements are assigned to each region using high level synthesis. The graph and assigned control logic is used to define a hardware design for the pipelined parallel stream processor.

Abstract: A verification support program that causes a computer to execute identifying from a finite state machine model related to a circuit-under-test, an input count of transitions to a transition-end state and an output count of transitions from the transition-end state; determining the transition-end state to be a record/restore subject, if the identified output transition is greater than the identified input transition count; embedding record-instruction information causing the record/restore subject to be recorded to a database, if a first element causing transition to the record/restore subject is included in a first test scenario that is in a test scenario group related to the circuit-under-test; and embedding restore-instruction information causing the record-restore subject to be restored from the database, if a second element causing transition to the record-restore subject is included in a series of elements making up a second test scenario that is in the test scenario group.

Abstract: A first signal trace is received including signal values satisfying a target event. A first trace signature is generated describing a portion of the first signal trace that causes the target event to occur. A second signal trace is generated that includes signal values satisfying the target event. A second trace signature is generated describing a portion of the second signal trace that causes the target event to occur. Differential signal events are determined that differentiate the first trace signature from the second trace signature. The differential signal events are events from the first signal trace that cause the target event to occur, but do not appear in the second trace signature. The process can be repeated to receive a plurality of signal traces, and to generate a plurality of signal traces. The differential signal events are indexed in a datastore in association with the signal traces.

Abstract: An information processing apparatus which includes a storage unit having stored a design data denoting layout and connection of a circuit, and a timing constraint data including a clock skew value denoting a delay difference allowed for a clock inputted to a pair of elements; a data read-out unit for reading out the design data and the timing constraint data; a clock skew value acquisition unit for acquiring the clock skew value set in correspondence with the pair of elements in layout in the circuit denoted by the design data from the timing constraint data; and a slack calculation unit for calculating a delay time between the pair of elements on the basis of the design data, and calculating a slack value indicating whether or not the pair of elements meets a predetermined design requirement by utilizing the acquired clock skew value and the calculated delay time with respect to the pair of elements.

Abstract: A functional timing analysis method, executed in a computing device, comprises: step A: obtaining a circuit; step B: selecting a target delay time from a delay time set for a node in the circuit for verifying whether the target delay time is attainable by some input assignment; step C: generating a timed characteristic function associated with the selected target delay time for the node recursively from the timed characteristic functions associated with the corresponding delay times for its fanin nodes is generated as a target formula; step D: recursively translating the timed characteristic function into timed characteristic function clauses of the target formula by using an implication operator; step E: checking whether the target formula is satisfied by using a Boolean satisfiability solver; and step F: if the target formula is satisfied, the selected target delay time is attainable by some input assignment to the circuit.

Abstract: A floor planning tool is provided that performs the functions that are typically performed by floor planning tools, but in addition, determines the supply of routing resources and the demand on routing resources for all routing channels while applying variable routing rules and static timing estimations to arrive at a preliminary routed floor plan. This drastically reduces the number of iterations that subsequently will need to be performed by the floor planning tool and by routing and static timing analysis tools to arrive at a final routed floor plan.

Abstract: A method for designing a system on a target device includes assigning resources on the target device to static logic modules and partial reconfigurable (PR) modules in the system. The instances of one of the PR modules are placed and routed in parallel utilizing resources from those that are assigned. Other embodiments are also disclosed.

Abstract: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

Abstract: Within a system comprising a plurality of processors and a memory, a method of determining routing information for a circuit design for implementation within a programmable integrated circuit can include determining that nets of the circuit design comprise overlap and unrouting nets comprising overlap. A congestion picture can be determined that comprises costs of routing resources for the integrated circuit wherein the cost of a routing resource comprises a measure of historical congestion and a measure of current congestion, and wherein unrouted nets do not contribute to the measures of current congestion in the congestion picture. The method further can include concurrently routing a plurality of the unrouted nets via the plurality of processors executing in parallel according to the congestion picture and storing routing information for nets of the circuit design in the memory.

Abstract: A method and apparatus for controlling the frequency of a clock signal using a clock-gating circuit is disclosed. In one embodiment, a root clock signal and an enable signal are provided to a clock-gating circuit. The clock-gating circuit is configured to provide an operational clock signal (based on the root clock signal) when the enable signal is asserted. The operational clock signal is inhibited when the enable signal is de-asserted. The frequency of the operational clock signal can be output at a reduced frequency (relative to the root clock signal) by asserting the enable signal for one of every N clock cycles. Furthermore, the frequency of the operational clock signal can be dynamically changed by changing the rate of asserting the enable signal relative to the root clock signal, without suspending operation of a functional unit receiving the operational clock signal.

Abstract: A system for optimizing the number of dies that can be fabricated on a wafer uses a die number optimization (DNO) routine to determine a maximum number of dies for a target die area (TDA), and generate an initial result list of die shapes that have the maximum number of dies for the TDA. Optionally, a die size optimization (DSO) routine can be executed to determine a list of die shapes having a maximum die area corresponding to the maximum number of dies, a first list of optimized die shapes having a maximum area utilization (AU) for a decreased TDA, and/or a second list of optimized die shapes having a minimum AU for an increased TDA. A candidate list (CL) of the various die shapes can be generated, and entries from the CL automatically selected and/or displayed to indicate proposed wafer layouts.

Abstract: A method of generating resistance-capacitance (RC) technology files is disclosed. The method comprises receiving a plurality of metal schemes from an IC foundry and dividing the plurality of metal schemes into one or more modular RC groups. The method further comprises identifying a modular RC structure; calculating capacitance values of the modular RC structure by means of a field solver; calculating an equivalent dielectric constant and an equivalent height of the RC structure based upon a variety of interconnect layers not having interconnects; calculating an equivalent dielectric constant and an equivalent height for each of the plurality of metal schemes; and deriving capacitance values of each of the plurality of metal schemes from the capacitance values of the modular RC structure.

Abstract: Methods and systems for viewing and debugging HDL designs having SystemVerilog interface constructs are provided. An HDL design code is received, wherein the design code comprises a first module, a second module and a SystemVerilog interface construct. A first object corresponding to the first module, a second object corresponding to the second module and an interface object corresponding to the interface construct are displayed in a schematic view. The interface object is disposed between the first and second objects, and a shape of the interface object is different from that of the first and second objects. The interface signals from the first object to the second object and the interface signals from the second object to the first object pass through the interface object.

Abstract: Various embodiments provide a mechanism to allow end users to install web applications and websites onto their desktop. In accordance with one or more embodiments, client-side code can be utilized to allow developers associated with a website to define boundaries associated with user interaction, and have those boundaries enforced by a run-time engine. In at least some embodiments, developers can provide, through JavaScript code and/or HTML markup, various configurations for the creation of a start menu shortcut, navigation, and so-called jumplist integration.

Abstract: A method and system for throttling a volume of request messages to a service application stored within a service provider (SP) computer system through an open application programming interface (API) platform is provided. The SP computer system is in communication with a memory device. The method includes storing a throttling profile for a developer application within the memory device wherein the throttling profile includes at least a throttling amount threshold and a throttling time period, receiving at the API platform a request message initiated by the developer application wherein the request message is included within a volume of request messages initiated by the developer application, identifying the request message as being associated with the developer application, retrieving the throttling profile for the developer application, and validating the volume of request messages as complying with the throttling profile.

Abstract: The apparatus of the present invention includes a block diagram dividing unit that divides a block diagram into a plurality of pieces at a branch point, connects a branch point block element to one end of a data line which has been connected to the branch point at each divided piece and thereby generates a plurality of block diagram pieces, a program instruction generator that generates program instructions for performing processing on each block diagram piece, an execution sequence determining unit that determines an execution sequence of generated program instructions, a structural information generator that generates structural information of each of the block diagram pieces and a program generator that arranges the program instructions according to the execution sequence, writes structural information of each block diagram piece into a comment line of each of the program instructions corresponding to each of the block diagram pieces and thereby generates a program.

Abstract: Systems, computer-readable media, and methods are disclosed for generating compiled scripts from scripts that include at least one scripting-language instruction. The least one scripting-language instruction may include a script extension to specify a computational model of the application and/or a method extension to specify a function of the computational model. The script extension may be identified within the at least one scripting-language instruction and an identifier for the computational model specified by the script extension may be determined. A compiled script may be generated that includes scripting-language code for replacing the script extension by an access of the computational model identified by the identifier. The application may be executed by locating a compiled script for the application based on an identifier assigned to the compiled script, injecting the compiled script into the application, and executing the injected script in the application.

Abstract: Methods and arrangements for employing telephonic voice commands in programming. A voice application is accessed and a program template is customized via selecting components from at least one palette. A program is created from the customized program template, and the created program is deployed and executed.

Abstract: Applications can be localized by a localization expert to allow them to be used by a broader customer base. The localization can be conducted by a localization expert who is provided with a resource file containing localizable components. The resource file can be generated by providing a developer with one or more text strings based on the development code of the application and receiving the localizable components which are selected from with the text strings based on the development code.

Abstract: A conflict resolution system allows an end user to export customizations to an application program so that the customizations can be imported by another end user. The conflict resolution system may export a customization by outputting metadata describing the customization. When the customization is a custom property, the metadata may include the name of the entity with which the property is associated, the name of the property, the type of the property, a globally unique identifier for the property, the location on the user interface for the input field for the custom property, and so on. End users may want to share not only their customizations but also the underlying data associated with a customization. When a conflict occurs during import of a customization alone without the data, then the conflict resolution system resolves the conflict in favor of the imported property.

Abstract: In an aspect there is provided a method. The method may include defining an application to include at least one component, the at least one component including at least one parameter; executing the application, wherein the at least one parameter receives a value to enable the application to produce data, wherein the at least one parameter is received from at least one of another component, a user interface, or another program; and providing the produced data to a user interface. Related apparatus, systems, techniques, and articles are also described.

Abstract: Techniques for integrating software applications include identifying an enterprise application executable in a first computing environment, where the enterprise application is compatible with a first version of a network application executable in a second computing environment so that a first set of functionality of the first version of the network application is exposed through the enterprise application. The features include identifying a second version of the network application executable in the second computing environment. The second version of the network application includes a second set of functionality at least partially distinct from the first set of functionality. The features include delivering an integration component from the second computing system to the first computing system.

Abstract: In a distributed system that includes a debug server and debug clients coupled for data communications through a data communications network, where the debug server includes a debug administrator, a message router, a back-end debugger, and a debuggee, collaborative software debugging includes receiving application-level messages, including receiving, from a requesting debug client, a request to establish a dynamic breakpoint at location in source code; routing the application-level messages among the debug clients, the debug administrator, and the back-end debugger, including providing distributed control of the back-end debugger, sending to the debug administrator an instruction to register the dynamic breakpoint, and sending to the back-end debugger a command to establish the dynamic breakpoint; establishing the dynamic breakpoint; registering the requesting debug client's dynamic breakpoint; and returning, by the debug server to the debug clients in response to the application-level messages routed to the

Abstract: Methods and systems for monitoring test steps to determine whether the test steps are executable in a test environment are disclosed. The test environment tests various resources, such as programs, data and functions in the electronic devices. The test environment provides a user interface that enables users to edit a sequence of test steps executed in the test environment. The test environment may provide visual representations of the test steps in the sequence of test steps. When the users select a test step in the sequence of test steps, the selected test step is monitored to inform the users whether the selected test step is executable in the test environment. The properties of the selected test step may also be provided and, if the selected test step is not executable in the test environment, users may be informed of the properties that should be specified to make the selected test step executable in the test environment.

Abstract: The present disclosure relates to a method for avoiding deadends in a constrained simulation. The method may include analyzing a first deadend during a simulation and a first constraint of the simulation. The method may further include determining if the first constraint causes the first deadend. If the first constraint causes the first deadend, the method may also include defining a first lookahead constraint corresponding to the first constraint. The method may additionally include rerunning a first previous cycle in the simulation while adding the first lookahead constraint to the simulation.

Abstract: Architecture employs an iterative process that incrementally discovers inter-component interactions and explores local state spaces within each component. Thus, the architecture lazily constructs the behavior of the environment of a component in the target software system, and integrates the construction of the inter-component interactions with the model checking process itself, and hence, does not need to eagerly construct the interface process. Component-based state space reduction is applied during the exploration of the whole system. The architecture decomposes a target software system into a set of loosely coupled components where interactions between the components tend to be significantly simpler than interactions within each component. An iterative algorithm facilitates the component-based state space reduction, which is exponential, on the real large-scale software systems.

Abstract: Performing data flow analysis of a computer software application, including, for a data flow analysis type, identifying within a computer software application code base a plurality of seeds relating to the data flow analysis type, for each of the plurality of seeds, defining a portion of the computer software application code base to a predefined depth of calls backward from the seed and to a predefined depth of calls forward from the seed, thereby resulting in a plurality of bounded portions of the computer software application code base, detecting a change in the computer software application code base, and performing, on any of the bounded portions affected by the change, a data flow analysis relating to the data flow analysis type.

Abstract: A working set profiler can monitor an execution of a program or can monitor a user-specified portion of a program to identify methods executed within the monitored execution and associate memory page accesses with each of the identified methods. Memory page accesses are categorized as shared or exclusive, where a shared page is a page that is accessed by more than one method and where an exclusive page is a page that is accessed by only one method in the monitored portion of the program. A call tree can be constructed and augmented with the collected information regarding memory page accesses. Further, for shared pages, the name of the method with which a particular method shares the page access can be collected. The augmented call tree information can be analyzed and prioritized to identify methods whose elimination would reduce program latency.

Abstract: A compiler includes a register allocator for allocating registers for instructions in a program to be compiled, and a code generator for generating object code based on the register allocation results performed by the register allocator. The register allocator allocates logical registers for instructions in the program to be compiled. The register allocation further allocates, to physical registers, the logical registers that are allocated to the instructions of the program, so that the physical registers that are live at a procedure call in the program to be compiled are allocated from the bottom of the register stack.

Abstract: A technique includes providing first objects that are associated with an application session and in a processor-based system, identifying second objects in another application session corresponding to the first objects based at least in part on a comparison of the second objects to matching rules associated with the first objects.

Abstract: Described is a technology by which a series of loop nests corresponding to source code are detected by a compiler, with the series of loop nests tiled together, (thereby increasing the ratio of cache hits to misses in a multi-processor environment). The compiler transforms the series of loop nests into a plurality of tile loops within a controller loop, including using dependency analysis to determine which results from a tile loop need to be pre-computed before another tile loop. For dependency analysis, the compiler may use a directed acyclic graph as a high-level intermediate representation, and split the graph into sub-graphs each representing an array. The compiler uses descriptors processed from the graph to determine the controller loop and the tile loops within that controller loop.