Patents Issued in July 1, 2014
  • Patent number: 8765471
    Abstract: The use of a neutral protease (NP) together with a collagenase consists in that a neutral protease which is not contained in a collagenase enzyme preparation and which is not produced by a recombinant production is mixed before the beginning of a tissue dissociation with a collagenase or a collagenase enzyme preparation with an individual dosage of the quantitative proportions of neutral protease and collagenase for improving the isolation results with respect to yield, viability and integrity of the cells.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: July 1, 2014
    Assignee: Nordmark Arzneimittel GmbH & Co. KG
    Inventors: Manfred Kurfuerst, Christian Raemsch, Nicole Raemsch-Guenther, Olaf Friedrich, Silke Huettler, Daniel Brandhorst, Thierry Berney, Pascal Bucher, Heide Brandhorst
  • Patent number: 8765472
    Abstract: The present invention relates to methods and devices to obtain multicellular arrangements in stable, stationary and reproducible spatial configuration, and optionally with controlled internal cell organization, methods for preparing such devices, methods for studying the cells' shapes, the cells' architectures, the cells' mechanical equilibrium, the cell-cell interaction, the cell movement and migration, the cell differentiation, the global internal cells' organizations, the cells' polarities and division, and/or any function of cells, methods for screening compounds of interest which enhance or inhibit specific cell functions.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: July 1, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventor: Manuel Thery
  • Patent number: 8765473
    Abstract: A basement membrane having a barrier function is formed by culturing alveolar epithelial cells or vascular endothelial cells on a fibrous collagen matrix coated with a polymer having a sugar chain that can localize a receptor that has an activity to accumulate a basement membrane component on the basal surface of the cells having an ability to form a basement membrane. A reconstructed artificial tissue is obtained by seeding and culturing desired homogeneous or heterogeneous cells on the basement membrane specimen constructed by the following process: (i) the cells having an ability to form a basement membrane adhered onto a support structure through a basement membrane are treated with a surface active agent; (ii) the lipid component of cells is lysed; (iii) the mixture of an alkaline solution and a protease inhibitor is used to lyse the protein remained on the surface of the basement membrane of the cells.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: July 1, 2014
    Assignees: Japan Science and Technology Agency, National Institute for Environmental Studies
    Inventor: Katsumi Mochitate
  • Patent number: 8765474
    Abstract: An automatic analyzer which assures uniformity in mixing effects regardless of sample quantity and test item and thus produces analysis results with high repeatability. The automatic analyzer includes a device for adding a conditioning liquid into a reaction chamber so that the quantity of liquid in the reaction chamber becomes a predetermined quantity prior to being mixed. The conditioning liquid may be a diluent or physiological saline as used for dilution of a sample or any other special liquid that adjusts the properties such as viscosity, surface tension, etc. of liquid to be mixed.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: July 1, 2014
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Katsuhiro Kambara, Shigenori Watari, Hidetoshi Sugiyama
  • Patent number: 8765475
    Abstract: Various embodiments disclose a colorimetric absorbance measurement method and a system for performing the same. The method comprises driving a reaction tray carrying a plurality of reaction cuvettes to rotate at a speed; transferring or rotating filters on a filter wheel to a light path of a light beam, starting from a filter of a first wavelength; and sampling photoelectric data when the light beam has passed through each reaction cuvette in some embodiments. The method ensures consistency in the measurement and synchronization between the calibration and the sample test and reliability of the measurements. Various embodiments simplify data processing and reduce the complexity of the system.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: July 1, 2014
    Assignee: Shenzhen Mindray Bio-Medical Eletronics Co., Ltd.
    Inventors: Lihua Zhou, Zhihong Wang, Yanwen Weng, Feng Li
  • Patent number: 8765476
    Abstract: Automated sample processing systems may include onboard efficient high-speed mixing of at least two components with an automatic vertical force fluidic turbulent component mixer of which a mixed component may be aspirated and high-speed dispensed in a mixing vial. Other aspects may include single sweep applying a multi-treatment cleaning cycle to at least one slide. A multi-treatment cleaning cycle may include a washing treatment and a drying treatment. In yet other aspects the present invention may include an automated recovery sample processing system with the capability of detecting at least one immediate condition of a fortuitously terminated automatic sample processing run and perhaps even an automatic terminated sample processing run reconstruction calculator.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: July 1, 2014
    Assignee: Biocare Medical, LLC
    Inventors: Saradha Avantsa, Ravishankar Melkote, Thomas Maxwell, Geoffrey Cook
  • Patent number: 8765477
    Abstract: A method for measuring the real hot-spot temperature in an electric apparatus containing an oil, such as an electric power transformer. The electric apparatus is operated under predetermined and modifiable operating conditions. This method comprises the use of one or several chemical compounds or tracers present and soluble in the oil. Each tracer may transform, at a given temperature, in order to form a residue, such as a soluble gas. From the presence of the residue in the oil, the operator will be able to determine under which predetermined operating condition the hot-spot has been reached and to deduce the hot-spot for a given condition. Among different used compounds, there are diazoic compounds, carbonyl metals, colorants, pigments, liquid crystals and albumins. The method also allows to check the quality of the apparatus on the market and to estimate its life span.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: July 1, 2014
    Assignee: Hydro-Quebec
    Inventors: Pierre Couture, Michel Duval
  • Patent number: 8765479
    Abstract: The present disclosure provides methods to predict the risk of CHD and/or clinical manifestations of CHD in a subject. In one embodiment, the method involves measuring the levels or concentration of apo A1, a subclass of HDL, HDL3, or a combination of the foregoing. The methods of the present disclosure are particularly useful when the subject has reached target levels of one or more lipoproteins, such as, but not limited to, LDL or HDL or subclass of the foregoing.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: July 1, 2014
    Assignee: Atherotech, Inc.
    Inventor: Krishnaji R. Kulkarni
  • Patent number: 8765480
    Abstract: A method for recovering a metal, capable of recovering a metal easily without requiring the use of an organic medium, is provided. A first complex between a first chelating agent and a metal present in a sample is formed in a first mixture prepared by mixing the first chelating agent and the sample. Then, the first complex is recovered from the first mixture, and a second complex between the metal derived from the first complex and a second chelating agent is formed in a second mixture prepared by mixing the first complex and an aqueous solution of the second chelating agent. The aqueous solution is under the pH conditions where the first chelating agent can be insoluble in the aqueous solution. Then, a liquid fraction containing the second complex is recovered from the second mixture. Thus, the metal can be recovered.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: July 1, 2014
    Assignee: ARKRAY, Inc.
    Inventor: Yuka Shimomura
  • Patent number: 8765481
    Abstract: A method of detecting a peroxidic explosive includes providing a sample which may comprise the peroxidic explosive. A mixture comprising at least one ionic liquid and at least one volatile organic solvent is provided. The sample is taken up in the mixture so as to provide a sample for detection. The sample for detection is analytically detected so as to determine whether it includes the peroxidic explosive.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: July 1, 2014
    Assignee: Rheinische Friedrich-Wilhelms-Universitaet Bonn
    Inventors: Siegfried Waldvogel, Carsten Siering, Daniel Lubczyk
  • Patent number: 8765482
    Abstract: A test strip with a sample chamber is secured to a meter. The sample chamber in the portion of the test strip that extends out of the meter is illuminated by transmitting light from a light source inside the meter internally through the test strip towards the sample chamber. By way of analogy, the test strip acts in a fashion similar to a fiber optic cable or optical wave guide by transmitting the light from the meter to the remotely located sample chamber that extends outside the meter. The user is then able to easily see the sample chamber of the test strip in dark conditions so that the user is able to readily align the sample chamber with the drop of fluid on the skin as well as view the sample chamber in order to ensure proper filling. The light also illuminates a test strip slot into which the test strip is inserted.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: July 1, 2014
    Assignee: Roche Diagnostics Operations, Inc.
    Inventors: Abner D. Joseph, Brian A. Heald
  • Patent number: 8765483
    Abstract: Provided herein are explosives detection substrates which include an electrospun (electro)sprayed and/or dry spun aromatic polymer, such as polystyrene, and a small molecule fluorophore. Methods for detecting an explosive material using such substrates are also provided.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: July 1, 2014
    Assignee: University of Connecticut
    Inventors: Yu Lei, Ying Wang
  • Patent number: 8765484
    Abstract: The invention concerns a particle having a code embedded in its physical structure by refractive index changes between different regions of the particle. In preferred embodiments, a thin film possesses porosity that varies in a manner to produce a code detectable in the reflectivity spectrum.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: July 1, 2014
    Assignee: The Regents of the University of California
    Inventors: Michael J. Sailor, Thomas Schmedake, Frederique Cunin, Jamie Link
  • Patent number: 8765485
    Abstract: Various aspects of the present invention relates to the control and manipulation of fluidic species, for example, in microfluidic systems. In one aspect, the invention relates to systems and methods for making droplets of fluid surrounded by a liquid, using, for example, electric fields, mechanical alterations, the addition of an intervening fluid, etc. The invention also relates to systems and methods for fusing droplets according to another aspect of the invention, for example, through charge and/or dipole interactions. In some cases, the fusion of the droplets may initiate or determine a reaction. In still another aspect, the invention relates to systems and methods for sorting droplets, e.g., by causing droplets to move to certain regions within a fluidic system. Examples include using electrical interactions (e.g., charges, dipoles, etc.) or mechanical systems (e.g., fluid displacement) to sort the droplets.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: July 1, 2014
    Assignee: President and Fellows of Harvard College
    Inventors: Darren Roy Link, David A. Weitz, Galder Cristobal-Azkarate, Zhengdong Cheng, Keunho Ahn
  • Patent number: 8765486
    Abstract: A fluidic device for conveying liquid to a well of a microplate. The device includes a support structure configured to be mounted along the microplate. The device also includes a microfluidic tube coupled to the support structure. The tube has an inlet, an outlet, and an open-sided channel that extends longitudinally therebetween. The tube has a cross-section that includes an interior contour with a gap therein. The gap extends at least partially along a length of the tube. The tube is configured to convey liquid to the well of the microplate when the tube is held in a dispensing orientation.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: July 1, 2014
    Assignee: Illumina Corporation
    Inventor: Chad F. DeRosier
  • Patent number: 8765487
    Abstract: A method is taught for the accurate determination of the premature rupture of membranes (PROM), defined as spontaneous rupture of membranes before the onset of uterine contractions. More specifically, a lateral flow assay strip tests for at least two antigens to greatly limit or eliminate the possibility of false negatives. A built in timer in the cassette holding the lateral flow assay further increases the accuracy of the test. A collection buffer vial with self-contained shipping and dropper caps and built in stand is also taught.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: July 1, 2014
    Assignee: Clinical Innovations
    Inventors: William Dean Wallace, Glen Ford
  • Patent number: 8765488
    Abstract: Sensing compositions, sensing element, sensing systems and sensing devices for the detection and/or quantitation of one or more analytes, Compositions comprising carbon nanotubes in which the carbon nanotubes retain their ability to luminesce and in which that luminescence is rendered selectively sensitive to the presence of an analyte. Compositions comprising individually dispersed carbon nanotubes, which are electronically isolated from other carbon nanotubes, yet which are associated with chemical selective species, such as polymers, particularly biological polymers, for example proteins, which can interact selectively with, or more specifically selectivity bind to, an analyte of interest. Chemically selective species bind, preferably non-covalently, to the carbon nanotube and function to provide for analyte selectivity. Chemically selective species include polymers to which one or more chemically selective groups are covalently attached.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: July 1, 2014
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Michael S. Strano, Seunghyun Baik, Paul Barone
  • Patent number: 8765489
    Abstract: A method for fabricating a semiconductor device includes forming a magnetic tunnel junction (MTJ) element on a substrate, forming a first capping layer along the shape of the MTJ element, forming an insulating layer on the first capping layer, forming a trench exposing a portion of the first capping layer above the MTJ element by selectively etching the insulating layer, forming a second capping layer on sidewalls of the trench, removing the exposed portion of the first capping layer using the second capping layer as an etching mask to expose an upper surface of the MTJ element, and forming a conductive layer in the trench, wherein the conductive layer contacts the upper surface of the MTJ element.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: July 1, 2014
    Assignee: SK Hynix Inc.
    Inventors: Jung Woo Park, Gil Jae Park, Ki Seon Park
  • Patent number: 8765490
    Abstract: The present disclosure describes a semiconductor MRAM device and a manufacturing method. The device reduces magnetic field induction “interference” (disturbance) phenomenon between adjacent magnetic tunnel junctions when data is written and read. This semiconductor MRAM device comprises a magnetic tunnel junction unit and a magnetic shielding material layer covering the sidewalls of the magnetic tunnel junction unit. The method for manufacturing a semiconductor device comprises: forming a magnetic tunnel junction unit, depositing an isolation dielectric layer to cover the top and the sidewall of the magnetic tunnel junction unit, and depositing a magnetic shielding material layer on the isolation dielectric layer.
    Type: Grant
    Filed: October 17, 2012
    Date of Patent: July 1, 2014
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Gavin Zeng
  • Patent number: 8765491
    Abstract: A method of forming a semiconductor device includes forming a spacer layer over a plurality of transistor gate structures, the transistor gate structures being formed over both active and shallow trench isolation (STI) regions of a substrate. The spacer layer is subjected to a directional etch so as to form sidewall spacers adjacent the plurality of transistor gate structures, and a horizontal fill portion of the spacer layer remains in one more recesses present in the STI regions so as to substantially planarize the STI region prior to subsequent material deposition thereon.
    Type: Grant
    Filed: October 28, 2010
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ming Cai, Xi Li, Frank D. Tamweber, Jr.
  • Patent number: 8765492
    Abstract: This method of manufacturing a silicon wafer has a step of preparing a wafer, in which a surface of the silicon wafer is surface-treated, a step of setting stress, in which the stress S (MPa) subjected on the wafer is set, a step of inspecting, in which a defect on a surface of the wafer is inspected, and a step of determining, in which the wafer is evaluated if the wafer satisfies a criterion. In this method, it is possible to manufacture a wafer with cracking resistance even if it is subjected to a millisecond annealing by the FLA annealing treatment.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: July 1, 2014
    Assignee: Sumco Corporation
    Inventors: Toshiaki Ono, Takayuki Kihara, Yumi Hoshino
  • Patent number: 8765493
    Abstract: Methods of characterizing semiconductor light-emitting devices (LEDs) based on product wafer characteristics are disclosed. The methods include measuring at least one product wafer characteristic, such curvature or device layer stress. The method also includes establishing a relationship between the at least one characteristic and the emission wavelengths of the LED dies formed from the product wafer. The relationship allows for predicting the emission wavelength of LED structures formed in the device layer of similarly formed product wafers. This in turn can be used to characterize the product wafers and in particular the LED structures formed thereon, and to perform process control in high-volume LED manufacturing.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: July 1, 2014
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, David Owen
  • Patent number: 8765494
    Abstract: An organic EL device (OELD) having a defective portion is irradiated with a laser beam; first luminance of light emitted from the OELD is measured after the OELD is irradiated with the laser beam, while supplying, to the OELD, a first amount of current with which the OELD in a normal state would emit light having luminance corresponding to a first grayscale level smaller than a reference level; the OELD is re-irradiated with the laser beam when the first luminance is smaller than a threshold; and second luminance of light emitted from the OELD is measured when the first luminance is greater than or equal to the threshold, while supplying, to the OELD, a second amount of current with which the OELD in the normal state would emit light having luminance corresponding to a second grayscale level greater than or equal to the reference level.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: July 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Tomomi Hiraoka, Yasuo Segawa
  • Patent number: 8765495
    Abstract: A method of forming a pattern of doped region includes the following steps. At first, a device layout pattern including a gate layout pattern and a doped region layout pattern is provided to a computer system. Subsequently, the device layout pattern is split into a plurality of sub regions, and the sub regions have different pattern densities of the gate layout pattern. Then, at least an optical proximity correction (OPC) calculation is respectively performed on the doped region layout pattern in each of the sub regions to respectively form a corrected sub doped region layout pattern in each of the sub regions. Afterwards, the corrected sub doped region layout patterns are combined to form a corrected doped region layout pattern, and the corrected doped region layout pattern is outputted onto a mask through the computer system.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: July 1, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Yi-Hsiu Lee, Guo-Xin Hu, Qiao-Yuan Liu, Yen-Sheng Wang
  • Patent number: 8765496
    Abstract: Methods and systems for measuring a characteristic of a substrate or preparing a substrate for analysis are provided. One method for measuring a characteristic of a substrate includes removing a portion of a feature on the substrate using an electron beam to expose a cross-sectional profile of a remaining portion of the feature. The feature may be a photoresist feature. The method also includes measuring a characteristic of the cross-sectional profile. A method for preparing a substrate for analysis includes removing a portion of a material on the substrate proximate to a defect using chemical etching in combination with an electron beam. The defect may be a subsurface defect or a partially subsurface defect. Another method for preparing a substrate for analysis includes removing a portion of a material on a substrate proximate to a defect using chemical etching in combination with an electron beam and a light beam.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: July 1, 2014
    Assignee: KLA-Tencor Technologies Corp.
    Inventors: Mehran Nasser-Ghodsi, Mark Borowicz, Dave Bakker, Mehdi Vaez-Iravani, Prashant Aji, Rudy Garcia, Tzu Chin Chuang
  • Patent number: 8765497
    Abstract: A method includes placing a plurality of bottom units onto a jig, wherein the plurality of bottom units is not sawed apart and forms an integrated component. Each of the plurality of bottom units includes a package substrate and a die bonded to the package substrate. A plurality of upper component stacks is placed onto the plurality of bottom units, wherein solder balls are located between the plurality of upper component and the plurality of bottom units. A reflow is performed to join the plurality of upper component stacks with respective ones of the plurality of bottom units through the solder balls.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: July 1, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Juin Liu, Chita Chuang, Ching-Wen Hsiao, Chen-Shien Chen, Chen-Cheng Kuo, Chih-Hua Chen
  • Patent number: 8765498
    Abstract: A method of manufacturing a liquid discharge head substrate, includes forming an etching mask layer having an opening in a shape corresponding to a plurality of second portions on a second plane of the substrate, forming a recess to be a first portion by etching the substrate through the opening of the etching mask layer from a second plane side of the substrate, and forming the plurality of second portions by etching a portion from a bottom of a first portion to a first plane using the etching mask layer as a mask from the second plane side of the substrate to form a liquid supply port passing through the substrate.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: July 1, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masataka Kato
  • Patent number: 8765499
    Abstract: A method for manufacturing an LED package includes following steps. A plate is provided. The plate defines a plurality of the through holes extending from an upper surface to a bottom surface of the plate. A blue film is attached to the bottom surface of the plate and covers openings of the through holes. The blue film and an inner wall of the plate defining the through hole cooperatively define a groove. Glue doped with phosphor particle is injected into the groove. The phosphor particles are condensed to a bottom surface of the glue adjacent to the blue film. The LED chips are embedded in the grooves and positioned at upper ends of the grooves. Finally, the blue film is removed and the plate is severed to obtain a plurality of individual LED packages each including a corresponding LED chip.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: July 1, 2014
    Assignee: Advanced Optoelectronic Technology, Inc.
    Inventor: Hou-Te Lin
  • Patent number: 8765500
    Abstract: The present disclosure involves a method of packaging a light-emitting diode (LED). According to the method, a group of metal pads and a group of LEDs are provided. The group of LEDs is attached to the group of metal pads, for example through a bonding process. After the LEDs are attached to the metal pads, each LED is spaced apart from adjacent LEDs. Also according to the method, a phosphor film is coated around the group of LEDs collectively. The phosphor film is coated on top and side surfaces of each LED and between adjacent LEDs. A dicing process is then performed to slice through portions of the phosphor film located between adjacent LEDs. The dicing process divides the group of LEDs into a plurality of individual phosphor-coated LEDs.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: July 1, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chi-Xiang Tseng, Hsiao-Wen Lee, Min-Sheng Wu, Tien-Ming Lin
  • Patent number: 8765501
    Abstract: Methods of epitaxy of gallium nitride, and other such related films, and light emitting diodes on patterned sapphire substrates, and other such related substrates, are described.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: July 1, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Jie Su, Tuoh-Bin Ng, Olga Kryliouk, Sang Won Kang, Jie Cui
  • Patent number: 8765502
    Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector device and a CMOS device may include depositing a dielectric stack over the photodetector device such that the dielectric stack encapsulates the photodetector. An opening is etched into the dielectric stack down to an upper surface of a region of an active area of the photodetector. A first metal layer is deposited directly onto the upper surface of the region of the active area via the opening such that the first metal layer may cover the region of the active area. Within the same mask level, a plurality of contacts including a second metal layer are located on the first metal layer and on the CMOS device. The first metal layer isolates the active area from the occurrence of metal intermixing between the second metal layer and the active area of the photodetector.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Solomon Assefa, Jeffrey P. Gambino, Steven M. Shank
  • Patent number: 8765503
    Abstract: Forming an adhesive layer on a part of a surface of the flexible substrate; forming a magnetic material layer on the surface of the flexible substrate in a part other than the part on which the adhesive layer is formed; temporarily holding, using magnetic force, the flexible substrate on which the adhesive layer and the magnetic material layer are formed, above an inflexible substrate having magnetic property; fixing the flexible substrate with the inflexible substrate via the adhesive layer; forming a layer composing an organic EL unit on the flexible substrate temporarily held using the magnetic force and fixed via the adhesive layer; removing the part in which the flexible substrate and the inflexible substrate are fixed via the adhesive layer; separating the flexible substrate from the inflexible substrate; and separating the magnetic material layer from the flexible substrate separated from the inflexible substrate are included.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: July 1, 2014
    Assignee: Panasonic Corporation
    Inventors: Kouhei Koresawa, Yuji Tanaka, Takashi Ohta
  • Patent number: 8765504
    Abstract: A method of separating semiconductor device structures comprises steps of providing a substrate having a first surface and a second surface opposite to the first surface; forming a plurality of semiconductor epitaxial stacks on the first surface; forming a patterned resist layer covering the semiconductor epitaxial stacks and exposing part of the first surface, or covering the second surface corresponding to the semiconductor epitaxial stacks; performing a physical etching process to directly server the substrate apart from an area of the first surface or the second surface not covered by the patterned resist layer; and separating the semiconductor epitaxial stacks to form a plurality of semiconductor device structures.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: July 1, 2014
    Assignee: EPISTAR Corporation
    Inventors: Shih-I Chen, Ching-Pei Lin, Tzu-Chieh Hsu, Chia-Liang Hsu
  • Patent number: 8765505
    Abstract: The present invention relates to a multi-luminous element and a method for manufacturing the same. The present invention provides the multi-luminous element comprising: a buffer layer disposed on a substrate; a first type semiconductor layer disposed on the buffer layer; a first active layer which is disposed on the first type semiconductor layer and is patterned to expose a part of the first type semiconductor layer; a second active layer disposed on the first type semiconductor layer which is exposed by the first active layer; and a second type semiconductor layer disposed on the first active layer and the second active layer, the first and second active layers being repeatedly disposed in the horizontal direction, and the method for manufacturing the same.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: July 1, 2014
    Assignee: Korea Photonics Technology Institute
    Inventors: Seong Ran Jeon, Jae Bum Kim, Seung Jae Lee
  • Patent number: 8765506
    Abstract: A manufacturing method of a light emitting device is provided. A first electrode is formed on a substrate. The first electrode includes a patterned conductive layer, and the patterned conductive layer includes an alloy containing a first metal and a second metal. An annealing process is performed on the first electrode, so as to form a passivation layer at least on a side surface of the first electrode. The passivation layer includes a compound of the second metal. A light emitting layer is formed on the first electrode. A second electrode is formed on the light emitting layer.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: July 1, 2014
    Assignee: Au Optronics Corporation
    Inventors: Chao-Shun Yang, Chen-Ming Hu
  • Patent number: 8765507
    Abstract: A method for manufacturing a Group III nitride semiconductor of the present invention includes a sputtering step of forming a single-crystalline Group III nitride semiconductor on a substrate by a reactive sputtering method in a chamber in which a substrate and a Ga element-containing target are disposed, wherein said sputtering step includes respective substeps of: a first sputtering step of performing a film formation of the Group III nitride semiconductor while setting the temperature of the substrate to a temperature T1; and a second sputtering step of continuing the film formation of the Group III nitride semiconductor while lowering the temperature of the substrate to a temperature T2 which is lower than the temperature T1.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: July 1, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yasunori Yokoyama, Hisayuki Miki
  • Patent number: 8765508
    Abstract: Methods of fabricating semiconductor devices or structures include bonding a layer of semiconductor material to another material at a temperature, and subsequently changing the temperature of the layer of semiconductor material. The another material may be selected to exhibit a coefficient of thermal expansion such that, as the temperature of the layer of semiconductor material is changed, a controlled and/or selected lattice parameter is imparted to or retained in the layer of semiconductor material. In some embodiments, the layer of semiconductor material may comprise a III-V type semiconductor material, such as, for example, indium gallium nitride. Novel intermediate structures are formed during such methods. Engineered substrates include a layer of semiconductor material having an average lattice parameter at room temperature proximate an average lattice parameter of the layer of semiconductor material previously attained at an elevated temperature.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: July 1, 2014
    Assignee: Soitec
    Inventor: Chantal Arena
  • Patent number: 8765509
    Abstract: A method for producing a Group III nitride semiconductor light-emitting device includes an n-type layer, a light-emitting layer, and a p-type layer, each of the layers being formed of Group III nitride semiconductor, being sequentially deposited via a buffer layer on a textured sapphire substrate. A buried layer is formed of Group III nitride semiconductor on the buffer layer, at a temperature lower by 20° C. to 80° C. than the temperature of 1000° C. to 1200° C. when the n-type layer is deposited on the buried layer. The texture provided on the sapphire substrate may have a depth of 1 ?m to 2 ?m and a side surface inclined by 40° to 80°. A preventing layer may be formed of GaN at 600° C. to 1050° C. so as to cover the entire top surface of the buffer layer.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 1, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Daisuke Shinoda, Shugo Nitta, Yoshiki Saito
  • Patent number: 8765510
    Abstract: A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials.
    Type: Grant
    Filed: October 12, 2012
    Date of Patent: July 1, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 8765511
    Abstract: A method for manufacturing a semiconductor device including at least one of the following steps: (1) Forming a lower electrode pattern on/over a substrate. (2) Forming a first interlayer insulating layer on the lower electrode pattern. (3) Forming an upper electrode pattern on the first interlayer insulating layer. (4) Forming a passivation layer on a side of the upper electrode pattern. (5) Forming a second interlayer insulating layer on the upper electrode pattern. (6) Etching the second interlayer insulating layer to form a cavity which exposes the passivation layer. (7) Forming a contact ball in the cavity.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: July 1, 2014
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Chung Kyung Jung, Sung Wook Joo
  • Patent number: 8765512
    Abstract: This invention discloses and claims a cost-effective, wafer-level package process for microelectromechanical devices (MEMS). Specifically, the movable part of MEMS device is encapsulated and protected while in wafer form so that commodity, lead-frame packaging can be used. An overcoat polymer, such as, epoxycyclohexyl polyhedral oligomeric silsesquioxanes (EPOSS) has been used as a mask material to pattern the sacrificial polymer as well as overcoat the air-cavity. The resulting air-cavities are clean, debris-free, and robust. The cavities have substantial strength to withstand molding pressures during lead-frame packaging of the MEMS devices. A wide range of cavities from 20 ?m×400 ?m to 300 ?m×400 ?m have been fabricated and shown to be mechanically stable. These could potentially house MEMS devices over a wide range of sizes. The strength of the cavities has been investigated using nano-indentation and modeled using analytical and finite element techniques.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: July 1, 2014
    Assignee: Georgia Tech Research Corporation
    Inventors: Paul A Kohl, Rajarshi Saha, Nathan Fritz
  • Patent number: 8765513
    Abstract: Provided are a solar cell and a method of manufacturing the same. The method includes: preparing a bottom substrate including sequentially stacked first and second portions, each of the first and second portions including a plurality of grains, wherein the maximum grain size of the second portion is less than the minimum grains size of the first portion; exposing the first portion of the bottom substrate by removing the second portion of the bottom substrate; and forming a photovoltaic conversion layer on the first portion of the bottom substrate.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: July 1, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Hogyeong Yun
  • Patent number: 8765514
    Abstract: A center region of conductive material/s may be disposed or “sandwiched” between transition regions of relatively lower conductivity materials to provide substantially low defect density interfaces for the sandwiched material. The center region and surrounding transition regions may in turn be disposed or sandwiched between dielectric insulative material to form a sandwiched and transitioned device structure. The center region of such a sandwiched structure may be implemented, for example, as a device layer such as conductive microbolometer layer for a microbolometer detector structure.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: July 1, 2014
    Assignee: L-3 Communications Corp.
    Inventors: Athanasios J. Syllaios, Michael F. Taylor, Sameer K. Ajmera
  • Patent number: 8765515
    Abstract: A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: July 1, 2014
    Assignee: Sony Corporation
    Inventor: Yuko Ohgishi
  • Patent number: 8765516
    Abstract: A reusable substrate and method for forming single crystal silicon solar cells are described. A method of forming a photovoltaic cell includes forming an intermediate layer on a monocrystalline silicon substrate, forming a monocrystalline silicon layer on the intermediate layer, and forming electrical features in the monocrystalline silicon layer. The method further includes forming openings in the monocrystalline silicon layer, and detaching the monocrystalline silicon layer from the substrate by selectively etching the intermediate layer through the openings.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Edward J. Nowak, Jed H. Rankin
  • Patent number: 8765517
    Abstract: A method of fabricating an image sensor device includes forming an insulating layer on a substrate including a photodiode therein, and forming a wiring structure on the insulating layer. The wiring structure includes at least one wiring layer and at least one insulating interlayer. A cavity is formed extending into the wiring structure over the photodiode to expose a surface of the at least one insulating interlayer. The surface of the at least one insulating interlayer exposed by the cavity is modified to define a hydrophobic surface. Related systems and devices are also discussed.
    Type: Grant
    Filed: July 6, 2011
    Date of Patent: July 1, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yu-jin Ahn, Min-young Jung
  • Patent number: 8765518
    Abstract: Improved chalcogenide solutions are provided. In one aspect, a method of forming an aqueous selenium-containing solution is provided. The method includes the following step. Water, ammonium hydroxide, elemental selenium, and elemental aluminum are contacted under conditions sufficient to form the aqueous selenium-containing solution. The conditions may include sonication for a period of time of from about 1 minute to about 10 minutes and/or stirring for a period of time of from about 10 minutes to about 72 hours at a temperature of from about 20° C. to about 25° C. A method of fabricating a photovoltaic device is also provided.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventor: Teodor K. Todorov
  • Patent number: 8765519
    Abstract: A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: July 1, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Eugene P. Marsh, Timothy A. Quick, Stefan Uhlenbrock
  • Patent number: 8765520
    Abstract: A photovoltaic electrode is made by the following steps: (a) depositing on a substrate a dispersion comprising powdered semiconductor particles in a dispersion medium; (b) removing the majority of the dispersion medium to leave the powdered semiconductor particles in a deposition layer on the substrate; (c) creating a plasma using microwave energy excitation; (d) exposing the deposition layer to said microwave-excited plasma for a sufficient time to sinter the nanoparticles thereby adhering them to the substrate; and (e) absorbing a dye into said sintered deposition layer. The electrode thus obtained exhibits improved performance relative to conventional sintered electrodes.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: July 1, 2014
    Assignees: National University of Ireland, University College Dublin
    Inventors: Denis Dowling, Mohamed Awais
  • Patent number: 8765521
    Abstract: According to example embodiments, a variable resistance memory device include an ohmic pattern on a substrate; a first electrode pattern including a first portion that has a plate shape and contacts a top surface of the ohmic pattern and a second portion that extends from one end of the first portion to a top; a variable resistance pattern electrically connected to the first electrode pattern; and a second electrode pattern electrically connected to the variable resistance pattern, wherein one end of the ohmic pattern and the other end of the first portion are disposed on the same plane.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: July 1, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung Jin Kang, Youngnam Hwang