Abstract: A nitride semiconductor layer formed from a nitride semiconductor is provided on at least one surface side of a semiconductor substrate. Impurity regions (a source region, a drain region, and the like) are provided on one surface side in the nitride semiconductor layer and contain an impurity of a first conductivity type. In addition, amorphous regions (a first amorphous region and a second amorphous region) are a part of the impurity regions and are located in a surface layer of the impurity regions. In addition, metallic layers (a source electrode and a drain electrode) come into contact with the amorphous regions (the first amorphous region and the second amorphous region).

Abstract: The leakage current generated in a pn junction region between a gate and a source is reduced in a junction FET using a silicon carbide substrate. In a trench junction FET using a silicon carbide substrate, nitrogen is introduced into a sidewall and a bottom surface of a trench, thereby forming an n type layer and an n+ type layer on a surface of the trench. In this manner, the pn junction region corresponding to the junction region between a p+ type gate region and an n+ type source region is exposed on a main surface of a semiconductor substrate instead of on the damaged sidewall of the trench, and also the exposed region thereof is narrowed. Accordingly, the leakage current in the pn junction region can be reduced.

Abstract: First, second, fourth, and fifth impurity regions have a first conductivity type, and a third impurity region has a second conductivity type. The first to third impurity regions reach a first layer having the first conductivity type. The fourth and fifth impurity regions are provided on a second layer. First to fifth electrodes are provided on the first to fifth impurity regions, respectively. Electrical connection is established between the first and fifth electrodes, and between the third and fourth electrodes. A sixth electrode is provided on a gate insulating film covering a portion between the fourth and fifth impurity regions.

Abstract: A SiC-based trench-type Schottky device is disclosed. The device includes: a SiC substrate having first and second surfaces; a first contact metal formed on the second surface and configured for forming an ohmic contact on the substrate; a drift layer formed on the first surface and including a cell region and a termination region enclosing the cell region; a plurality of first trenches with a first depth formed in the cell region; a plurality of second trenches with a second depth less than the first depth; a plurality of mesas formed in the substrate, each defined between neighboring ones of the trenches; an insulating layer formed on sidewalls and bottoms of the trenches; and a second contact metal formed on the mesas and the insulating layer, extending from the cell region to the termination region, and configured for forming a Schottky contact on the mesas of the substrate.

Abstract: This substrate (11) for a device (50) that collects or emits radiation comprises a transparent polymer layer (1) and a barrier layer (2) on at least one face (1A) of the polymer layer. The barrier layer (2) consists of an antireflection multilayer of at least two thin transparent layers (21, 22, 23, 24) having both alternately lower and higher refractive indices and alternately lower and higher densities, wherein each thin layer (21, 22, 23, 24) of the constituent multilayer of the barrier layer (2) is an oxide, nitride or oxynitride layer.

Abstract: A light emitting diode chip includes a substrate, an epitaxial layer, two inclined plane units, and two electrode units. The substrate has top and bottom surfaces. The epitaxial layer is disposed on the top surface of the substrate. Each of the inclined plane units is inclined downwardly and outwardly from the epitaxial layer toward the bottom surface of the substrate, and includes an inclined sidewall formed on the epitaxial layer, and a substrate inclined wall formed on the substrate. Each of the electrode units includes an electrode disposed on the epitaxial layer, and a conductive portion extending from the electrode to the substrate inclined wall along corresponding one of the inclined plane units.

Abstract: An organic light emitting display is disclosed. In one aspect, the display includes a substrate, thin film transistors disposed on the substrate, first, second, and third pixel definition layers disposed on the thin film transistors, respectively having openings, and respectively having first, second, and third heights different from each other, and first, second, and third organic light emitting devices disposed in the openings of the first, second, and third pixel definition layers and connected to the thin film transistors, respectively. The first, second, and third pixel definition layers are spaced apart from each other, the first, second, and third organic light emitting devices have different thicknesses from each other, and the first, second, and third organic light emitting devices have thicknesses respectively corresponding to the first, second, and third heights of the first, second, and third pixel definition layers.

Abstract: The invention relates to a light-emitting arrangement, having:—at least one light-emitting diode chip (1),—a multi-layer board (17) having a base (5) of a thermally well conducting material, in particular of metal, and—an electrical insulating and thermally conducting connection layer (2) between the emission surface of the light-diode chip (1) and the board (17).

Abstract: The optoelectronics chip-to-chip interconnect system includes at least one packaged chip connected on the printed-circuit-hoard (PCB) with at least one other packaged chip, opticalelectrical (O-E) conversion means, and waveguide-board. Single to multiple chips can be interconnected using this technique. Packaged chip includes semiconductor die and package based on ball-grid array or chipscale-package. O-E board includes optoelectronics and multiple electrical contacts on both board sides. Waveguide board includes electrodes transferring signals from O-E board to PCB, and the flex optical waveguide, stackable onto the PCB, to guide optical signals chip-to-chip. Electrodes can be connected to the PCB instead of on waveguide hoard. The chip-to-chip interconnection system is pin-free, compatible with the PCB.

Abstract: A display includes: a light-emitting element formed by laminating a first electrode layer, an organic layer including a light-emitting layer and a second electrode layer in order on a base; and an auxiliary wiring layer being arranged so as to surround the organic layer and being electrically connected to the second electrode layer, in which the auxiliary wiring layer includes a two-layer configuration including a first conductive layer and a second conductive layer, the first conductive layer has lower contact resistance to the second electrode layer than that of the second conductive layer, the two-layer configuration in the auxiliary wiring layer is formed so that an end surface of the second conductive layer is recessed inward from an end surface of the first conductive layer, thereby a part of a top surface of the first conductive layer is in contact with the second electrode layer.

Abstract: An organic opto-electric device has a layer stack with a base electrode, an organic layer assembly, a cover electrode and a contact layer. The organic layer assembly is arranged between the base electrode and the cover electrode and the cover electrode is arranged between the organic layer assembly and the contact layer. The cover electrode and the base electrode are structured to form several laterally adjacent optically active areas and the base electrode, the organic layer assembly, the cover electrode and the contact layer are interconnected by vias such that at least two optically active areas are connected in series so that a current flow through the at least two optically active areas passes in a direction between the base electrode and a cover electrode. The current flow between the at least two optically active areas passes through the contact layer, wherein the contact layer contacts the base electrode above one of the vias laterally in the interior of the two optically active areas.

Abstract: The present invention relates to a light emitting device, a light emitting device package, and a lighting device with the same. The light emitting device includes a light emitting structure including a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer, a second electrode layer formed on an underside of the light emitting structure connected to the second conductive type semiconductor layer electrically, a first electrode layer in contact with the first conductive type semiconductor layer passed through the second conductive type semiconductor layer and the active layer, and an insulating layer formed between the second electrode layer and the first electrode layer, between the second conductive type semiconductor layer and the first electrode layer, and between the active layer and the first electrode layer.

Abstract: A display panel includes a substrate, a plurality of bottom electrodes, an isolation layer, a plurality of light emitting layers, a top electrode, and at least one first auxiliary electrode. The bottom electrodes and the isolation layer are disposed on the substrate. The isolation layer has a plurality of pixel region openings and at least one buffer region. Each of the pixel region openings respectively exposes the corresponding bottom electrode. The buffer region is disposed between two adjacent pixel region openings. The light emitting layers are respectively disposed on the corresponding bottom electrodes. The top electrode covers the light emitting layers, the isolation layer, and the buffer region. The first auxiliary electrode is disposed in the buffer region.

Abstract: Disclosed is a light emitting device including: a light emitting structure including a plurality of light emitting regions including a first semiconductor layer, an active layer and a second semiconductor layer; a first electrode unit disposed on the first semiconductor layer in one of the light emitting regions; a second electrode unit disposed on the second semiconductor layer in another of the light emitting regions; an intermediate pad disposed on the second semiconductor layer in at least still another of the light emitting regions; and at least one connection electrode to sequentially connect the light emitting regions in series, wherein the light emitting regions connected in series are divided into 1st to ith light emitting region groups and areas of light emitting regions that belong to different groups are different (where 1<i?j, each of i and j is a natural number, and j is a last light emitting region group).

Abstract: A mask assembly includes a frame forming an opening, and a plurality of unit masks which form a plurality of deposition openings, the longitudinal ends of the unit masks being fixed to the frame. At least two adjacent ones of the plurality of unit masks have deposition recesses formed on both sides facing each other. The width of the deposition recesses along a width direction of the unit masks is equal to or greater than the width of the deposition openings along the width direction of the unit masks.

Abstract: The present invention relates to efficient organic light emitting devices (OLEDs). The devices employ three emissive sub-elements, typically emitting red, green and blue, to sufficiently cover the visible spectrum. Thus, the devices may be white-emitting OLEDs, or WOLEDs. Each sub-element comprises at least one organic layer which is an emissive layer—i.e., the layer is capable of emitting light when a voltage is applied across the stacked device. The sub-elements are vertically stacked and are separated by charge generating layers. The charge-generating layers are layers that inject charge carriers into the adjacent layer(s) but do not have a direct external connection.

Abstract: Provided are a method of manufacturing an organic light emitting display device and an organic light emitting display device manufactured by the method. The method includes calculating a peak-luminance current density for each of a red sub-pixel, a blue sub-pixel, a green sub-pixel, and a white sub-pixel, calculating an average use current density for each of the red sub-pixel, blue sub-pixel, green sub-pixel, and white sub-pixel; determining a size of each sub-pixel with the peak-luminance current density and the average use current density, and forming the sub-pixels with the determined sizes of the respective sub-pixels. The present invention sets the size of each sub-pixel in consideration of a peak-luminance current density and an average use current density, thus easily achieving the peak luminance and enhancing the color-coordinate life.

Abstract: A light-emitting device includes a first cladding layer, a light-emitting layer, a second cladding layer, an epitaxial structure including an indium-containing oxide, and an electrode unit for supplying external electricity, The electrode unit includes a first electrode disposed to be electrically connected to the first cladding layer, and a second electrode disposed above the epitaxial structure to be electrically connected to the second cladding layer through the epitaxial structure such that the external electricity is permitted to be transmitted to the light-emitting layer through the first and second electrodes. A method for manufacturing the light-emitting device is also disclosed.

Abstract: A semiconductor light-emitting device has a first principal surface, a second principal surface formed on a side opposite to the first principal surface, and a light-emitting layer. A p-electrode on the second principal surface is in the region of the light-emitting layer and surrounds an n-electrode. An insulating layer on the side of the semiconductor layer surrounds the p- and the n-electrodes. A p-metal pillar creates an electrical connection for the p-electrode, and an n-metal pillar creates an electrical connection for the n-electrode. A resin layer surrounds the end portions of the p- and the n-metal pillars, and also covers the side surface of the semiconductor layer, the second principal surface, the p-electrode, the n-electrode, the insulating layer, the p-metal pillar and the n-metal pillar.

Abstract: A semiconductor device includes a first light emitting chip, the first light emitting chip having a first semiconductor layer, a second semiconductor layer, and a first active layer disposed therebetween, a second light emitting chip disposed on the first light emitting chip, the second light emitting chip having a third semiconductor layer, a fourth semiconductor layer, and a second active layer disposed therebetween, and a conductive layer disposed between the first semiconductor layer and the fourth semiconductor layer, the first semiconductor layer and the fourth semiconductor layer having different conductivity types.

Abstract: A gallium nitride (GaN) based light emitting diode (LED), wherein light is extracted through a nitrogen face (N-face) of the LED and a surface of the N-face is roughened into one or more hexagonal shaped cones. The roughened surface reduces light reflections occurring repeatedly inside the LED, and thus extracts more light out of the LED. The surface of the N-face is roughened by an anisotropic etching, which may comprise a dry etching or a photo-enhanced chemical (PEC) etching.

Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, first and second electrodes, a high resistance layer and a transparent conductive layer. The stacked structural body includes first and second semiconductor layers and a light emitting layer. The first semiconductor layer is disposed between the first electrode and the second semiconductor layer. The second semiconductor layer is disposed between the second electrode and the first semiconductor layer. The second electrode has reflectivity with respect to luminescent light. The high resistance layer is in contact with the second semiconductor layer between the second semiconductor layer and the second electrode and includes a portion overlapping with the first electrode. The transparent conductive layer is in contact with the second semiconductor layer between the second semiconductor layer and the second electrode.

Abstract: A light emitting packaged diode ids disclosed that includes a light emitting diode mounted in a reflective package in which the surfaces adjacent the diode are near Lambertian reflectors. An encapsulant in the package is bordered by the Lambertian reflectors and a phosphor in the encapsulant converts frequencies emitted by the LED chip and, together with the frequencies emitted by the LED chip, produces white light. A substantially flat meniscus formed by the encapsulant defines the emitting surface of the packaged diode.

Abstract: An electro-optic device includes a light-emitting element disposed above a substrate, an optically transparent sealing film covering the light-emitting element, and a color filter disposed on the sealing film so as to adjoin the sealing film. The sealing film includes a thin portion overlapping at least part of the light-emitting element, and a thick portion surrounding the thin portion. The thin portion and the thick portion form a recess in the sealing film. The color filter fills the recess.

Abstract: Disclosed is a light emitting device including a light emitting structure including a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, a first electrode disposed on the first conductive semiconductor layer, a reflective electrode disposed on the second conductive semiconductor layer, a channel layer disposed on the light emitting structure and surrounds the reflective electrode, and a support substrate connected to the channel layer through an adhesive layer.

Abstract: A light extracting member for an organic electroluminescent element, to be provided on a side for extracting light emitted by the organic electroluminescent element, wherein a light extracting surface of the member has a concave-convex structure which is configured such that when comparing an intensity of light that enters the member and is output from the light extracting surface with an intensity of light that is output from a flat light extracting surface of a virtual member, a frontal intensity and an integrated intensity of the former are each greater by a factor of 1.3 or more.

Abstract: A light emitting device is disclosed. The light emitting device includes an electrode, which includes a reflective electrode layer disposed over a second semiconductor layer and a bonding electrode layer disposed in at least a partial region of an outer side surface of the reflective electrode layer while coming into contact with the second semiconductor layer. Thus, it may be possible to enhance bonding reliability between the electrode and the semiconductor layer.

Abstract: A light-emitting diode (LED) with a mirror protection layer includes sequentially stacked an N-type electrode, an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a metal mirror layer, a protection layer, a buffer layer, a binding layer, a permanent substrate, and a P-type electrode. The protection layer is made of metal oxide, and has a hollow frame for covering or supporting edges of the metal mirror layer.

Abstract: A package structure of semiconductor light emitting element is provided. The package structure of semiconductor light emitting element includes a substrate, a light emitting element and a transparent conductive board. A first electrode and a second electrode are disposed on the substrate. The light emitting element is disposed on the substrate and between the first electrode and the second electrode. A first bonding pad and a second bonding pad are disposed on the light emitting element. The transparent conductive board has a first surface and a second surface opposite to the first surface. The second surface of the transparent conductive board is located over the light emitting element for electrically connecting the first electrode and the first bonding pad and electrically connecting the second electrode and the second bonding pad.

Abstract: A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate and a light extraction surface. The first electrode layer is provided on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, first conductive type semiconductor layer, and second conductive type semiconductor layer, and has a forward tapered shape of a width which gradually narrows in order of the second conductive type semiconductor layer, the light emitting layer and the first conductive type semiconductor layer.

Abstract: A light emitting device and a method for manufacturing the light emitting device are disclosed. In one example, the light emitting device includes a transparent substrate, partially transparent an anode layer or layer assembly arranged on said substrate, a light emitting layer arranged on said anode layer, and a transparent cathode layer arranged on said light emitting layer, wherein said anode layer or layer assembly includes a first surface facing said transparent substrate and a second surface facing said light emitting layer and is positioned opposite to said first surface, said first surface includes a transparent conductive material, said second surface includes first and second domains, said first domains are conductive and non-transparent, said second domains are transparent and electrically isolating, and said first domains are in direct contact with said light emitting layer and are arranged to allow electrical contact between said first surface and said light emitting layer.

Abstract: A light emitting diode device includes an epitaxial substrate, at least one passivation structure, at least one void, a semiconductor layer, a first type doping semiconductor layer, a light-emitting layer and a second type doping semiconductor layer. The passivation structure is disposed on the epitaxial substrate and has an outer surface. The void is located at the passivation structure and at least covering 50% of the outer surface of the passivation structure. The semiconductor layer is disposed on the epitaxial substrate and encapsulating the passivation structure and the void. The first type doping semiconductor layer is disposed on the semiconductor layer. The light-emitting layer is disposed on the first type doping semiconductor layer. The second type doping semiconductor layer is disposed on the light emitting layer.

Abstract: Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, a second conductive semiconductor layer under the active layer, a second electrode layer under the second conductive semiconductor layer; and an insulating layer on an outer peripheral surface of at least two layers of the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer.

Abstract: A system and method for manufacturing an LED is provided. A preferred embodiment includes a substrate with a distributed Bragg reflector formed over the substrate. A photonic crystal layer is formed over the distributed Bragg reflector to collimate the light that impinges upon the distributed Bragg reflector, thereby increasing the efficiency of the distributed Bragg reflector. A first contact layer, an active layer, and a second contact layer are preferably either formed over the photonic crystal layer or alternatively attached to the photonic crystal layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes, a first semiconductor layer, a second semiconductor layer, a first electrode, a second electrode, a first interconnection, and a second interconnection. The first semiconductor layer has a first major surface, a second major surface provided on an opposite side to the first major surface, a protrusion selectively provided on the second major surface, and a trench formed from the second major surface to the first major surface. The second semiconductor layer is stacked on the protrusion of the first semiconductor layer and includes a light emitting layer. The first electrode is provided on the second major surface of the first semiconductor layer and a side surface of the trench. The second electrode is provided on a surface of the second semiconductor layer on an opposite side to the first semiconductor layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, a light emitting layer, a p-side electrode and an n-side electrode. The p-type semiconductor layer includes a nitride semiconductor and has a first major surface. The n-type semiconductor layer includes a nitride semiconductor and has a second major surface. The light emitting layer is provided between the n-type semiconductor layer and the p-type semiconductor layer. The p-side electrode contacts a part of the p-type semiconductor layer on the first major surface. The n-side electrode contacts a part of the n-type semiconductor layer on the second major surface. The n-side electrode is provided outside and around the p-side electrode in a plan view along a direction from the p-type semiconductor layer to the n-type semiconductor layer.

Abstract: A light-emitting device includes a light-emitting element and a support substrate. The light-emitting element has an insulating layer and first and second vertical conductors passing through the insulating layer. The support substrate has a substrate part and first and second through electrodes and is disposed on the insulating layer. The first through electrode passes through the substrate part with one end connected to an opposing end of the first vertical conductor, while the second through electrode passes through the substrate part with one end connected to an opposing end of the second vertical conductor. The opposing ends of the first and second vertical conductors are projected from a surface of the insulating layer and connected to the ends of the first and second through electrode inside the support substrate.

Abstract: A mounting board including a pair of patterned electrodes, a lower surface and an upper surface opposed thereto on which a substrate of an electronic component is to be mounted, a pass-through hole penetrating through the upper surface and the lower surface, and a peripheral side surface that defines the pass-through hole. The pass-through hole includes a plurality of penetrating grooves that are cut into the mounting board and penetrate through the upper and lower surfaces. The plurality of penetrating grooves electrically split the pair of patterned electrodes. The pair of patterned electrodes is partly positioned inside the peripheral side surface, and a connection portion connecting the at least one pair of patterned electrodes and at least one pair of patterned electrodes provided on the upper surface of the substrate of the electronic component is to be disposed inside the peripheral side surface that defines the pass-through hole.

Abstract: An object is to provide a light-emitting device having a structure in which an external connection portion can easily be connected and a method for manufacturing the light-emitting device. A light-emitting device includes a lower support 110, a base insulating film 112 over the lower support 110 which has a through-hole 130, a light-emitting element 127 over the base insulating film 112, and an upper support 122 over the light-emitting element 127. An electrode 131 is provided in the through-hole 130, and the external connection terminal 132 electrically connected to the electrode 131 is provided below the base insulating film 112. The external connection terminal 132 is electrically connected to the external connection portion 133 and functions as a terminal that inputs a signal or a power supply into the light-emitting device. This light-emitting device has a structure in which an external connection portion can easily be connected.

Abstract: Disclosed are a quantum dot-block copolymer hybrid, methods of fabricating and dispersing the same, a light emitting device including the same, and a fabrication method thereof. The quantum dot-block copolymer hybrid includes; a quantum dot, and a block copolymer surrounding the quantum dot, wherein the block copolymer has a functional group comprising sulfur (S) and forms a chemical bond with the quantum dot.

Abstract: Provided is a semiconductor device. The semiconductor device comprises a support substrate; a bonding layer on the support substrate; and a plurality of semiconductor layers on the bonding layer, wherein the bonding layer includes a first bonding layer between the support substrate and the plurality of semiconductor layers and a second bonding layer between the first bonding layer and the plurality of semiconductor layers, wherein an at least one of the first and second bonding layers includes a multi layers, wherein the first and second bonding layers include a same material from each other, wherein the first and second bonding layers includes a different material from the plurality of semiconductor layers.

Abstract: Provided is a semiconductor device in which on-resistance is largely reduced based on a new principle of operation. In the semiconductor device, if an embedded electrode is at negative potential, a depletion layer is formed from a trench to a neighboring trench so that a channel is turned off. If the embedded electrode is at a positive potential, the depletion layer is not formed in every region between the neighboring trenches so that the channel is turned on.

Abstract: The objective is to improve capabilities such as high-speed switching of a compound semiconductor device. Provided is a semiconductor wafer comprising a silicon wafer; an insulating film that is formed on the silicon wafer and that has an open portion reaching the silicon wafer; a Ge crystal formed in the open portion; a seed compound semiconductor crystal that is grown with the Ge crystal as a nucleus and that protrudes beyond a surface of the insulating film; and a laterally grown compound semiconductor layer that is laterally grown on the insulating film with a specified surface of the seed compound semiconductor crystal as a seed surface.

Abstract: A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then deposited on the fin structure to form a salicide layer. After depositing the metal layer, the metal layer is removed but no RTP is performed before the metal layer is removed. Then a RTP is performed after the metal layer is removed.

Abstract: Memory devices are shown that include a body region and a connecting region that is formed from a semiconductor with a lower band gap than the body region. Connecting region configurations can provide increased gate induced drain leakage during an erase operation. Configurations shown can provide a reliable bias to a body region for memory operations such as erasing, and containment of charge in the body region during a boost operation.

Abstract: A method of fabricating a GaN HEMT includes growing a first epitaxial layer on a substrate, growing a second epitaxial layer on the first epitaxial layer, growing a third epitaxial layer on the second epitaxial layer, depositing a first dielectric film on the third epitaxial layer, using dielectric films to form a first sidewall dielectric spacer, forming a sidewall gate adjacent the first sidewall dielectric spacer. The sidewall gate may be made to be less than 50 nm in length.

Abstract: In a layout structure of a standard cell including off transistors 126, 127 unnecessary for logic operation of a circuit, dummy via contacts 116, 117 are disposed on impurity diffusion regions 103, 106 of the off transistors 126, 127, respectively. Dummy metal interconnects 122, 123 are connected to the dummy via contacts 116, 117, respectively. Thus, variations in the density of via contacts, which are one of causes lowering the production yield of semiconductor integrated circuits, is reduced, improving manufacturing defects of the via contacts.

Abstract: An organic light emitting display apparatus and method of manufacturing the organic light emitting display apparatus including a lower substrate having power lines in a non-display region that is outside a display region whereon an image is realized; and a functional layer formed between the power lines and an encapsulation substrate.

Abstract: An integrated circuit (IC) chip includes a first memory cell array block having a first metal layer containing at least two power lines, and a second memory cell array block containing at least two power lines independent of each other, wherein all the power lines on the first metal layer serving the first memory cell array block do not extend into the second memory cell array block, and all the power lines on the first metal layer serving the second memory cell array block do not extend into the first memory cell array block.

Abstract: A semiconductor device includes: an n?-type base layer; a p-type base layer formed in a part of a front surface portion of the n?-type base layer; an n+-type source layer formed in a part of a front surface portion of the p-type base layer; a gate insulating film formed on the front surface of the p-type base layer between the n+-type source layer and the n?-type base layer; a gate electrode that faces the p-type base layer through the gate insulating film; a p-type column layer formed continuously from the p-type base layer in the n?-type base layer; a p+-type collector layer formed in a part of a rear surface portion of the n?-type base layer; a source electrode electrically connected to the n+-type source layer; and a drain electrode electrically connected to the n?-type base layer and to the p+-type collector layer.