Abstract: A linear voltage stabilizing circuit includes a main stabilizing unit, a first resistor, a second resistor, and a sub-stabilizing unit. The main stabilizing unit includes a first transistor connected between a signal input terminal and a signal output terminal, and a first comparator controlling the first transistor. The first and the second resistor are connected between the signal input terminal and ground. The voltage between the first resistor and the second resistor is equal to a first reference voltage. The sub-stabilizing unit includes a third resistor, a fourth resistor, a second transistor connected between the signal input terminal and the first transistor, and a second comparator. The third and fourth resistor are connected between the second comparator and ground. The node of the third and fourth resistor is connected to the node between the first and the second resistor. The second comparator controls the second transistor turn on or off.

Abstract: A device includes an over-temperature protection circuit configured to protect against over-temperature. The over-temperature protection circuit is coupled to receive a signal representative of temperature at the temperature sensor. The over-temperature protection circuit is coupled to adjust a temperature at which over-temperature protection is triggered based at least in part on a rate of change of the temperature at the temperature sensor.

Abstract: A semiconductor device includes a semiconductor element; a body bias controller configured to generate a standby mode body bias control signal in a standby mode; and a body bias voltage generator configured to receive the standby mode body bias control signal from the body bias controller, generate a standby mode body bias voltage, and apply the standby mode body bias voltage to a body of the semiconductor element. The semiconductor device is capable of retaining data stored in a semiconductor element and blocking leakage current in the standby mode by controlling a body bias voltage, thereby increasing the integration degree of the semiconductor device.

Abstract: A charge pump circuit which steps down an input voltage inputted from an input terminal and outputs it as a step-down output voltage from a step-down output terminal, and steps up the input voltage and outputs it as a step-up output voltage from a step-up output terminal, includes: a voltage conversion circuit having a flying capacitor, a step-down output capacitor, a step-up output capacitor, and a plurality of switches, wherein the flying capacitor, the step-down output capacitor, the step-up output capacitor, and the switches are connected, and the voltage conversion circuit is capable of switching connection states by switching each on/off state of the switches; an output voltage detection circuit unit which makes a comparison of a voltage between the step-down output voltage and a first predetermined voltage, and makes a comparison of a voltage between the step-up output voltage and a second predetermined voltage, and produces and outputs each signal indicating each result of the comparisons; and a contr

Abstract: A power generation block configured to generate internal power by a charge pump circuit and a power supply control block configured to control the power generation block are provided. First and second power supply interconnects individually separated from an external power supply interconnect are connected to the power generation block and the power supply control block, respectively. At least any one of the power supply interconnects is provided with a filter section configured to remove noise propagating through the power supply interconnect.

Abstract: A constant voltage constant current generation circuit includes a first transistor, a first resistor connected between the first terminal and a second potential, a first diode connected in series with the first resistor, and a first operational amplifier which outputs a first control signal to a control terminal of the first transistor. The constant voltage constant current generation circuit includes a current output circuit which outputs a constant current from a current output terminal according to the first control signal, a second transistor through which a second current flows, the second current obtained by mirroring a first current flowing through the first transistor, a second resistor connected between the voltage output terminal and the second potential.

Abstract: A semiconductor integrated circuit includes a logic circuit having a plurality of operation modes, a power source circuit that generates a power source voltage to be supplied to the logic circuit, a power source wiring that couples the power source circuit and the logic circuit, and a charge control block that holds charges for controlling the voltage of the power source wiring. The power source circuit generates a first power source voltage for causing the logic circuit to operate in a computing mode and a second power source voltage for causing the logic circuit to operate in a sleep mode. The charge control block includes a capacitor, a first switch, and a voltage supply unit that supplies the second power source voltage or a third power source voltage lower than the second power source voltage, to the capacitor.

Abstract: The invention relates to a two stage class AB operational amplifier for driving a load, comprising at least an input stage comprising differential input terminals and an output terminal to provide a driving signal. In addition, the operational amplifier comprises an output stage comprising a first and second input terminals operatively associated to the input stage to be driven on the basis of said driving signal and a driving circuit operatively interposed between said input stage and the output stage. The operational amplifier is characterized in that the driving circuit comprises a first portion comprising at least one resistor operatively connected between a first reference potential via a first circuitry block comprising a PMOS transistor and a second reference potential via a second circuitry block comprising a NMOS transistor.

Abstract: Embodiments of a capacitance sensing system including an integrating amplifier and methods for operating the same to provide a higher slew rate and bandwidth are described. In one embodiment, the integrating amplifier comprises an input stage including an inverting input coupled to an electrode of a capacitor to sense a capacitance and a non-inverting input coupled to a reference potential, and an output stage including a compensating capacitor coupled to an output. The compensating capacitor comprises two smaller capacitors coupled in parallel and a switching element configured to open when the integrating amplifier is operated in a RESET mode decoupling one of the two smaller capacitors from the output to decrease capacitance of the compensating capacitor.

Abstract: A programmable gain amplifier (“PGA”) may include a differential amplifier, a pair of input capacitors, a pair of feedback capacitors provided in feedback configuration about the amplifier, a first chop circuit, provided at an input of the PGA and an output of the PGA and a second chop circuit provided at an output of the PGA. The PGA also may include circuit systems to sample voltages across the input capacitors in a sampling phase. The sampled voltages may correspond to a difference between a common mode voltage of input signals to the PGA and a common mode voltage of the differential amplifier. The sampled voltage, thus, defines a common mode voltage at the amplifier's inputs during other phases of operation, when the chop circuits are operational.

Abstract: A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed as an active filter. In order to prevent an oscillatory state of the driver circuit at an unwanted frequency, it is proposed that an internal state variable of the feedforward filter be monitored and that the feedforward filter be reset if the value of the monitored internal state variable is outside a predefined range.

Abstract: The amplifying circuit includes: an input transistor having a gate electrode connected to a signal input terminal inputting a wireless signal, a drain electrode connected to a power supply terminal, and a source electrode connected to a ground terminal; a first switch installed between the signal input terminal and the gate electrode; and a second switch installed between the power supply terminal and the drain electrode, wherein the input transistor has a predetermined bias voltage applied to the gate electrode thereof to simultaneously turn the first and second switches on during reception of the wireless signal and simultaneously turn the first and second switches off while applying the predetermined bias voltage to the gate electrode during transmission of the wireless signal.

Abstract: A circuit for self-calibrating a gain control system samples the output of a digital amplifier coupled in series with one or more analog amplifiers to correct errors in a discrete stepped gain control. A digital gain control circuit controls both the digital amplifier and at least one analog amplifier to produce a smooth linear and continuous gain, wherein perturbations in the digital control of gain are smoothed by a signal applied to gain control circuit by a gain step correction circuit.

Abstract: Apparatus and methods for buffer linearization are provided. In certain implementations, an amplifier includes a buffer circuit and a gain circuit. The buffer circuit includes a buffer transistor pair used to buffer a differential input signal to generate a differential buffered signal. Additionally, the gain circuit includes a gain transistor pair configured to amplify the buffered differential signal to generate an amplified differential signal. The buffer circuit can include a linearization transistor pair configured to decrease the buffer circuit's output impedance and to provide feedback that reduces changes in the voltage of the differential buffered signal in response to displacement currents associated with the CJC or CGD capacitances of the gain transistor pair.

Abstract: An amplifier for an integrated circuit has a plurality of ratioed current mirrors connected to each other in a stacked configuration. Each ratio mirror has at least two resistors and at least two bipolar transistors connected to each other via said at least two resistors. Each amplifying transistor, contains a capacitor, and potentially and inductor, to internally match the transistors that make up the amplifying stack. DC, harmonic and s-parameter simulations are performed to provide an optimal impedance for each of the stacked transistors to maximize the RF power output of each stacked layer and the amplifier.

Abstract: This disclosure relates to radio frequency (RF) amplification devices and methods for amplifying an RF input signal. To set the quiescent operating level of the RF output signal, a bias signal to be applied to the RF input signal is received prior to amplifying the RF input signal. The bias signal is amplified to generate the RF output signal at the quiescent operating level and a feedback signal is received that is indicative of the quiescent operating level of the RF output signal. Prior to amplifying the RF input signal, the bias signal level of the bias signal is adjusted such that the quiescent operating level is set to a reference signal level based on the feedback signal level. This allows for adjustments to be made to the quiescent operating level and maintain the quiescent operating level at a desired value.

Abstract: A radio frequency (RF) power amplifier is disclosed. The power amplifier includes an output stage circuit, an exponential type bias circuit and a voltage-current transformation circuit. The output stage circuit receives a first system voltage and outputs an output current. The exponential type bias circuit receives a bias current, wherein a relationship between the bias current and output current is exponential, and when the bias current is zero current, and the output current is zero current. The voltage-current transformation circuit transforms the first system voltage into a second current so that the bias current is in proportion to the first system voltage, and thus the relationship between the output current and the first system voltage is exponential. The bias current is equal to times of the sum of the first current and the second current.

Abstract: Frequency synthesizers for use with oscillators that generate an arbitrary frequency are described, as well as related devices and methods. Divider information can be generated or otherwise accessed for use in configuring a phase lock loop device that is adapted for coupling with the oscillator, where the phase lock loop device can include a plurality of integer dividers without utilizing a fractional divider, where the divider information can include frequency deviations corresponding to groups of integer divider settings for the phase lock loop device, and where each deviation of the frequency deviations can be based on a frequency differential between a standard operating frequency and an output frequency for the phase lock loop utilizing one group of integer divider settings from the groups of integer divider settings.

Abstract: Tunable injection locked (IL) dividers having enhanced locking range, good phase noise performance, and low power consumption are disclosed. In an exemplary design, an apparatus (e.g., a wireless device) includes an oscillator and at least one IL divider. The oscillator provides an oscillator signal at a first frequency. The at least one IL divider receives the oscillator signal and provides an output signal at a second frequency, which is related to the first frequency by an overall divider ratio for the IL divider(s). Each IL divider may be calibrated based on a target frequency of that IL divider. Each IL divider may be calibrated (e.g., by tuning at least one adjustable capacitor) to obtain an oscillation frequency within a predetermined tolerance of the target frequency of that IL divider. The oscillator may be calibrated based on a target oscillation frequency of the oscillator.

Abstract: Disclosed is a digitally controlled oscillator which includes a ring oscillator; and a variable resistance bank connected between one power node of the ring oscillator and a power supply terminal and having the resistance value varied according to the number of active bits of a control code. The frequency of an clock signal output by the ring oscillator is changed non-linearly according to the resistance value of the variable resistance bank. The frequency of the output clock signal is changed stepwise linearly according to the number of active bits of the control code.

Abstract: A Force-Mode Distributed Wave Oscillator (FMDWO) that provides accurate multiple phases of an oscillation, a Force Mode Distributed Wave Antenna as a radiating element, a Force-Mode Distributed Oscillator Amplifier (FMDOA) and an array of amplifiers capable of operating as a beam forming phased-array antenna driver. Two distinct force mode mechanisms, one delay-based and the other geometry-based, utilizing inverter amplifiers, inject an oscillation on independent conductor loops or rings via transmission lines forming a differential transmission medium for the oscillation wave. Once the oscillation wave is initiated through the forcing mechanisms, the oscillations continue uninterrupted independent of any external triggering.

Abstract: A piezoelectric resonating element includes a piezoelectric substrate having a rectangular vibrating portion and a thick-walled portion, excitation electrodes and, and lead electrodes. The thick-walled portion includes a fourth thick-walled portion, a third thick-walled portion, a first thick-walled portion, and a second thick-walled portion. The third thick-walled portion includes a third slope portion and a third thick-walled body, and at least one slit is formed in the third thick-walled portion.

Abstract: An integrated circuit (IC) for compensating for a package inductance is disclosed. A first ground pad is directly connected to an on-chip ground node. A second IC ground pad is connected to the on-chip ground node via a tunable capacitor circuit, where the capacitance of the tunable capacitor circuit resonates with the package inductance at the operating frequency of the IC.

Abstract: Embodiments of the present invention provide a capacitive coupler packaging structure including a substrate with at least one capacitor and a receiver formed thereon, wherein the at least one capacitor at least includes a first electrode layer, a second electrode layer and a capacitor dielectric layer therebetween, and the first electrode layer is electrically connected to the receiver via a solder ball. The capacitive coupler packaging structure also includes a transmitter electrically connecting to the capacitor.

Abstract: A balun includes a first conductor winding having a first figure eight shape and a second conductor winding have a second figure eight shape. The first figure eight shape includes a first loop and a second loop. The second figure eight shape includes a third loop and a fourth loop. The first loop and the second loop are not concentric. The third loop and the fourth loop are not concentric.

Abstract: In a directional coupler, a laminated body includes a plurality of insulator layers that are laminated to one another. A main line and a sub-line are embedded in the laminated body, include spiral-shaped portions including central axes parallel or substantially parallel to a z-axis direction, and are electromagnetically coupled to each other. The main line and the sub-line have the same or substantially the same shape and are provided within regions coinciding or substantially coinciding with each other in a y-axis direction.

Abstract: A reconfigurable Wilkinson power divider, methods of manufacture and design structures are provided. The structure includes a first port, and a first arm and a second arm connected to the first port. The first arm and the second arm each include one or more tunable t-line circuits. The structure also includes a second port and a third port connected to the first port via the first arm and second arm, respectively.

Abstract: A combiner includes N coaxial cables each configured to connect to a respective output of N radio frequency power amplifiers, where N is an integer greater than one. Each of the N coaxial cables is configured to receive an amplified radio frequency signal from a respective one of the N radio frequency power amplifiers. A board includes capacitances and is configured to connect to each of the N coaxial cables and combine the radio frequency signals. The N coaxial cables and the capacitances provide N inductance and capacitance combinations. A connector is configured to connect an output of the board to a load.

Abstract: A surface acoustic wave filter and a duplexer are provided. In a surface acoustic wave filter, on a piezoelectric substrate, a first IDT electrode composed of an input/output electrode and a first floating electrode, and a second IDT electrode composed of a ground electrode and a second floating electrode are arranged, and are connected in series to each other via the first floating electrode and the second floating electrode to form IDTs. In two serial IDTs arranged next to each other, an electrode finger of the input/output electrode in the first IDT electrode of one serial IDT is arranged next to an electrode finger of the ground electrode in the second IDT electrode of the other serial IDT.

Abstract: A branching filter includes a ladder-type elastic wave filter unit connected between an antenna terminal and a transmission signal terminal and a longitudinally coupled resonator-type elastic wave filter unit connected between an antenna terminal and first and second balanced reception signal terminals while maintaining the isolation characteristics between the transmission signal terminal and the first and second reception signal terminals. In a duplexer, a transmission signal propagation direction is perpendicular or substantially perpendicular to each of a first reception signal propagation direction and a second reception signal propagation direction.

Abstract: A semiconductor device has a substrate and band-pass filter formed over the substrate. The band-pass filter includes a first conductive trace wound to exhibit inductive properties with a first end coupled to a first terminal of the semiconductor device and second end coupled to a second terminal of the semiconductor device, and first capacitor coupled between the first and second ends of the first conductive trace. A second conductive trace is wound to exhibit inductive properties with a first end coupled to a third terminal of the semiconductor device and second end coupled to a fourth terminal of the semiconductor device. The second conductive trace has a different size and shape as the first conductive trace. A second capacitor is coupled between the first and second ends of the second conductive trace. A third conductive trace is wound around the first and second conductive traces to exhibit inductive properties.

Abstract: In one aspect of the invention, an acoustic wave device includes a substrate, an acoustic isolator formed in or on the substrate, a bottom electrode formed on the acoustic isolator, a piezoelectric layer formed on the bottom electrode, a top electrode formed on the piezoelectric layer, and boundary means such as a gasket surrounding one of the first and second electrodes whose perimeter is aligned inside the perimeter of the acoustic isolator. The gasket has a lateral side having a wall profile, a curve profile, a multi-step profile, a gradually variable profile, or a combination of them.

Abstract: An AC contactor with a mechanical short circuit self-locking function includes an AC contactor body. The AC contactor body includes a shell body, wherein a mechanical short circuit self-locking unit is provided therein. The mechanical short circuit self-locking unit includes a short circuit detecting and triggering device for generating a triggering action when a fault of short circuit occurs; and a self-locking acting device for generating a self-locking action after receiving the triggering action, so as to disable the AC contactor to automatically reset after the fault of short circuit is removed.

Abstract: Vertical integrated MEMS switches, design structures and methods of fabricating such vertical switches is provided herein. The method of manufacturing a MEMS switch, includes forming at least two vertically extending vias in a wafer and filling the at least two vertically extending vias with a metal to form at least two vertically extending wires. The method further includes opening a void in the wafer from a bottom side such that at least one of the vertically extending wires is moveable within the void.

Abstract: A medium or high voltage switch has a switching assembly actuated by two drives. Each drive includes a plunger arranged between two Thomson coils. The coils as well as the plunger are rectangular for reducing the weight and therefore inertia of the drive and thus to increase drive speed.

Abstract: The invention relates to a hydraulic transmission valve with a magnetizable housing which is integrally configured in one piece with a pole core cone. The transmission valve according to the invention facilitates comfortably coupling in particular startup clutches, shifting clutches or synchronization clutches in a friction locking manner. Still using a transmission valve of this type is facilitated for fewer to no transmission oil changes. Furthermore a transmission valve of this type can also be used in countries with inferior transmission oil quality. The housing includes a connection. The connection defines an anchor stroke and a concentric arrangement between the pole core cone and a pole tube. Thus, the pole tube is fixated the magnetizable pole flange. An anchor that is exclusively supported in the pole tube is magnetically separated from the pole tube through a separation layer with a thickness of 0.01 mm to 0.06 mm.

Abstract: A spherical magnet is formed as a hollow sphere having a fluid tight outer surface of a first magnetic pole and an inner surface having a second magnetic pole that is magnetically opposite the first pole. A plurality of individual thin flexible rectangular plate magnets are arranged as a continuous outer layer of the spherical magnet. Each individual plate magnet has four sides, an inner magnetic portion and an outer non-magnetic portion that extends around all four sides of the magnetic portion. Each inner magnetic portion includes a first face disposed on the outer surface and having the first pole and a second face opposite the first face, disposed on the inner surface and having the second pole.

Abstract: A multi-coil choke for an AC power conditioner includes a magnetic core having first, second and third parallel legs. A first coil wrapped around the first leg terminates in first and second leads at respective ends. A second coil wrapped around the second leg terminates in first and second leads at respective ends. A third coil wrapped around the third leg terminates in first and second leads at respective ends. A fourth coil is formed from a proximal portion of the second lead of said first coil. The fourth coil is wrapped around a distal portion of the second lead of the third coil. A fifth coil is formed from a proximal portion of the second lead of the third coil. The fifth coil is wrapped around a distal portion of the second lead of the first coil. AC power conditioners using one or more such chokes are also disclosed.

Abstract: An electronic component to be embedded in a substrate is configured so that planar coils protected by insulators are sandwiched be a pair of magnetic layers. Ports, or openings or absent parts are provided at predetermined positions of one or both of the magnetic layers, and the predetermined positions correspond to the positions opposite to terminal electrodes of the planar coils. Accordingly, a contribution to reduction of the size and weight of electronic equipment can be made.

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a substrate that spans in an X-direction and a Y-direction that is orthogonal to the X-direction. The semiconductor device includes an interconnect structure formed over the substrate in a Z-direction that is orthogonal to both the X-direction and the Y-direction. The interconnect structure includes a plurality of metal lines interconnected together in the Z-direction by a plurality of vias. The interconnect structure contains a transformer device that includes a primary coil and a secondary coil. The primary coil and the secondary coil are each wound at least partially in the Z-direction.

Abstract: A method for manufacturing a module including a planar coil, and a module including a planar coil, reduce manufacturing cost and also are able to handle a large current. The method for manufacturing the module including the planar coil includes the steps of providing a second resin layer including a magnetic filler on a first resin layer with a built-in chip-type electronic component; providing a planar coil on the second resin layer; and providing a third resin layer including a non-magnetic property so as to coat the planar coil.

Abstract: A coil device 10 comprises a first bobbin 40 having a first bobbin plate 42 provided with a first hollow cylinder 44 on which a primary coil 20 is wound at the outer periphery, and a second bobbin 50 mounted on the first bobbin 40 and having a second bobbin plate 52 provided with a second hollow cylinder 54 on which a secondary coil 30 is wound at the outer periphery. A winding center C1 of the primary coil 20 and a winding center C2 of the secondary coil 30 displace with a predetermined displacement (Lx) along a predetermined reference direction X.

Abstract: An identity of a person proximate to a display device is determined by an identity profile controller. The identity profile controller determines whether a configured viewing profile exists for the person. Upon determining that the configured viewing profile exists for the person, the identity profile controller instructs a bezel display controller to display a profile identifier associated with the configured viewing profile via a two-dimensional light-emitting diode (LED) array located within a bezel of the display device outside of the display area of the display. The identity profile controller automatically adjusts display device settings for the display device based upon the configured viewing profile. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: A method and system for fingerprinting a content item is described, the content item including a set of content item elements E, providing information uniquely associated with a single user including a string of bits S0, parsing S0 into a plurality of substrings which are functions of S0, providing a matrix of content item replacement elements, each row of which includes, for each member of E, an array of content item replacement elements for Ei, uniquely associating each substring of S0 so that for every substring there exists a corresponding element of E, for every substring, replacing at least one instance of the corresponding element E in the content item with one substitute matrix element for the corresponding substring, and outputting a replacement content item including the result of the replacing, the substitute matrix elements being chosen according to at least one similarity criterion.

Abstract: A system for using a watermark embedded in an audio signal to remotely control a device. Various devices such as toys, computers, and appliances, equipped with an appropriate detector, detect the hidden signals, which can trigger an action, or change a state of the device. The watermarks can be used with a “time gate” device, where detection of the watermark opens a time interval within which a user is allowed to perform an action, such as pressing a button, typing in an answer, turning a key in a lock, etc.

Abstract: A wireless device access system employs short-range wireless communication to require the proximity of a user device to a structure prior to communicating an unlock request. The access system authenticates the unlock request and the proximity of the user to the structure prior to transmitting an unlock command to the structure. Additionally, the wireless device may require the proximity of a user token prior to operation and/or the access system may include an override within the structure blocking any unlock command.

Abstract: The invention discloses devices and methods for analyzing inbound and outbound ships for illegal or dangerous cargo or persons. An arch is generally placed several kilometers from shore, the arch including a plurality of distinct analytical and diagnostic equipment. A ship passing through the arch is analyzed by photographic, thermal and other means for presence of explosives, nuclear, chemical, or biological agents, terrorists, contraband, illegal passengers and/or other potential threats. Results from scanning are sent to appropriate security officials as are data of ships that attempt to circumvent the security arch.

Abstract: An novel impedance sensor for use together with a switch is provided having a plurality of substantially parallel drive lines configured to transmit a signal into a surface of a proximally located object, and also a plurality of substantially parallel pickup lines oriented substantially perpendicular to the drive lines and separated from the pickup lines by a dielectric to form intrinsic electrode pairs that are impedance sensitive at each of the drive and pickup crossover locations.

Abstract: A system and method are provided for reading and identifying molded products based on detecting intentionally introduced defects in the molded products that were included to identify and authenticate the molded products, or to confirm compatibility of the molded products in devices in which the molded products are installed for use. Process conditions in the fabrication or formation of melt processed parts are modified to deliberately introduce surface, detectable defects into the melt processed parts. A Quality Review (QR) code that specifies a compilation of at least some of the actual defects that are present in the molded part is provided, potentially encrypted, for comparison purposes.

Abstract: Methods and devices for enabling a user to obtain item information relating to an item (10), the item having associated therewith an item identification means (12) and an RFID response means (14) arranged to provide a predetermined response on being subjected to a currently applicable trigger signal; the method comprising steps of: establishing from the item identification means (12) item identification information; using the item identification information to determine from an item information source (30) a currently applicable trigger signal for the RFID response means (14); subjecting the RFID response means (14) to the currently applicable trigger signal; receiving a predetermined response from the RFID response means (14); and using the predetermined response to obtain item information from the item information source (30); wherein the RFID response means (14) is arranged to generate a new currently applicable trigger signal and a new predetermined response associated therewith following subjecting of th