Patents Issued in January 20, 2015
-
Patent number: 8936994Abstract: A method of processing substrates in a lithography system unit, the lithography system unit comprising at least two substrate preparation units, a load lock unit comprising at least first and second substrate positions, and a substrate handling robot for transferring substrates between the substrate preparation units and the load lock unit. The method comprises providing a sequence of substrates to be exposed to the robot, including an Nth substrate, an N?1th substrate, and an N+1th substrate; transferring the Nth substrate to a first one of the substrate preparation units; clamping the Nth substrate on a first substrate support structure in the first substrate preparation unit to form a clamped Nth substrate; transferring the clamped Nth substrate from the first substrate preparation unit to an unoccupied one of the first and second positions in the load lock unit; and exposing the clamped Nth substrate in the lithography system unit.Type: GrantFiled: April 30, 2012Date of Patent: January 20, 2015Assignee: Mapper Lithography IP B.V.Inventors: Vincent Sylvester Kuiper, Erwin Slot, Marcel Nicolaas Jacobus Van Kervinck, Guido De Boer, Hendrik Jan De Jong
-
Patent number: 8936995Abstract: Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. The at least one trench includes sidewalls, a bottom surface, a lower portion, and an upper portion. A first liner is disposed over the sidewalls and the bottom surface of the at least one trench. A second liner is disposed over the first liner in the lower portion of the at least one trench. A first insulating material is disposed over the second liner in the lower portion of the at least one trench. A second insulating material is disposed over the first insulating material in the upper portion of the at least one trench. The first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device.Type: GrantFiled: March 1, 2006Date of Patent: January 20, 2015Assignee: Infineon Technologies AGInventors: Armin Tilke, Marcus Culmsee, Chris Stapelmann, Bee Kim Hong, Roland Hampp
-
Patent number: 8936996Abstract: A semiconductor structure is provided that includes a semiconductor oxide layer having features. The semiconductor oxide layer having the features is located between an active semiconductor layer and a handle substrate. The semiconductor structure includes a planarized top surface of the active semiconductor layer such that the semiconductor oxide layer is beneath the planarized top surface. The features within the semiconductor oxide layer are mated with a surface of the active semiconductor layer.Type: GrantFiled: December 2, 2010Date of Patent: January 20, 2015Assignee: International Business Machines CorporationInventors: Ravi M. Todi, Joseph Ervin, Chengwen Pei, Geng Wang
-
Patent number: 8936997Abstract: The invention relates to a composition comprising a binder material and nanoparticles having an average particle size of 100 nm or less having a first refractive index of at least 1.65 in respect of light of a first wavelength, and a second refractive index in the range of 1.60-2.2 in respect of light of a second wavelength, wherein said first refractive index is higher than said second refractive index, and wherein the first and second refractive indices may be tuned by adjusting the volume ratio of the nanoparticles to the binder material. The composition may improve light extraction when used for bonding a ceramic member to an LED, and/or may reduce the amount of light that is directed back towards the LED.Type: GrantFiled: August 9, 2010Date of Patent: January 20, 2015Assignee: Koninklijke Philips N.V.Inventors: Hendrik Johannes Boudewijn Jagt, Christian Kleynen, Joanna Maria Elisabeth Baken
-
Patent number: 8936998Abstract: A device is provided with: a first substrate mainly containing silicon dioxide; a second substrate mainly containing silicon, compound semiconductor, silicon dioxide or fluoride; and a bonding functional intermediate layer arranged between the first substrate and the second substrate. The first substrate is bonded to the second substrate thorough room temperature bonding in which a sputtered first surface of the first substrate is contacted with a sputtered second surface of the second substrate via the bonding functional intermediate layer. Here, the material of the bonding functional intermediate layer is selected from among optically transparent materials which are oxide, fluoride, or nitride, the materials being different from the main component of the first substrate and different from the main component of the second substrate.Type: GrantFiled: March 12, 2013Date of Patent: January 20, 2015Assignees: Mitsubishi Heavy Industries, Ltd., National Institute of Advanced Industrial Science and TechnologyInventors: Jun Utsumi, Takayuki Goto, Kensuke Ide, Hideki Takagi, Masahiro Funayama
-
Patent number: 8936999Abstract: An SOI substrate including a semiconductor layer whose thickness is even is provided. According to a method for manufacturing the SOI substrate, the semiconductor layer is formed over a base substrate. In the method, a first surface of a semiconductor substrate is polished to be planarized; a second surface of the semiconductor substrate which is opposite to the first surface is irradiated with ions, so that an embrittled region is formed in the semiconductor substrate; the second surface is attached to the base substrate, so that the semiconductor substrate is attached to the base substrate; and separation in the embrittled region is performed. The value of 3? (? denotes a standard deviation of thickness of the semiconductor layer) is less than or equal to 1.5 nm.Type: GrantFiled: December 30, 2011Date of Patent: January 20, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Keiichi Sekiguchi, Kazuya Hanaoka, Daigo Ito
-
Patent number: 8937000Abstract: A chemical vapor deposition reactor and method. Reactive gases, such as gases including a Group III metal source and a Group V metal source, are introduced into the chamber (10) of a rotating-disc reactor and directed downwardly onto a wafer carrier (32) and substrates (40) which are maintained at an elevated substrate temperature, typically above about 400° C. and normally about 700-1100° C. to deposit a compound such as a III-V semiconductor. The gases are introduced into the reactor at an inlet temperature desirably above about 75° C. and most preferably about 100°-350° C. The walls of the reactor may be at a temperature close to the inlet temperature. Use of an elevated inlet temperature allows the use of a lower rate of rotation of the wafer carrier, a higher operating pressure, lower flow rate, or some combination of these.Type: GrantFiled: November 6, 2009Date of Patent: January 20, 2015Assignee: Veeco Instruments Inc.Inventors: Alex Gurary, Mikhail Belousov, Bojan Mitrovic
-
Patent number: 8937001Abstract: A technique for forming nanostructures including a definition of a charge pattern on a substrate and introduction of charged molecular scale sized building blocks (MSSBBs) to a region proximate the charge pattern so that the MSSBBs adhere to the charge pattern to form the feature.Type: GrantFiled: January 10, 2012Date of Patent: January 20, 2015Assignee: Massachusetts Institute of TechnologyInventors: Joseph M. Jacobson, David Kong, Vikas Anant, Ashley Salomon, Saul Griffith, Will DelHagen, Vikrant Agnihotri
-
Patent number: 8937002Abstract: The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.Type: GrantFiled: March 31, 2014Date of Patent: January 20, 2015Assignee: Electronics and Telecommunications Research InstituteInventors: Sung Bum Bae, Eun Soo Nam, Jae Kyoung Mun, Sung Bock Kim, Hae Cheon Kim, Chull Won Ju, Sang Choon Ko, Jong-Won Lim, Ho Kyun Ahn, Woo Jin Chang, Young Rak Park
-
Patent number: 8937003Abstract: A technique for ion implanting a target is disclosed. In accordance with one exemplary embodiment, the technique may be realized as a method for ion implanting a target, the method comprising: providing a predetermined amount of processing gas in an arc chamber of an ion source, the processing gas containing implant species and implant species carrier, where the implant species carrier may be one of O and H; providing a predetermined amount of dilutant into the arc chamber, wherein the dilutant may comprise a noble species containing material; and ionizing the processing gas and the dilutant.Type: GrantFiled: September 13, 2012Date of Patent: January 20, 2015Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Alexander S. Perel, Craig R. Chaney, Wayne D. LeBlanc, Robert Lindberg, Antonella Cucchetti, Neil J. Bassom, David Sporleder, James Young
-
Patent number: 8937004Abstract: A plasma processing apparatus comprises a plasma source configured to produce a plasma in a plasma chamber, such that the plasma contains ions for implantation into a workpiece. The apparatus also includes a focusing plate arrangement having an aperture arrangement configured to modify a shape of a plasma sheath of the plasma proximate the focusing plate such that ions exiting an aperture of the aperture arrangement define focused ions. The apparatus further includes a processing chamber containing a workpiece spaced from the focusing plate such that a stationary implant region of the focused ions at the workpiece is substantially narrower that the aperture. The apparatus is configured to create a plurality of patterned areas in the workpiece by scanning the workpiece during ion implantation.Type: GrantFiled: April 19, 2013Date of Patent: January 20, 2015Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Anthony Renau, Ludovic Godet, Timothy J. Miller, Joseph C. Olson, Vikram Singh, James Buonodono, Deepak A. Ramappa, Russell J. Low, Atul Gupta, Kevin M. Daniels
-
Patent number: 8937005Abstract: A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.Type: GrantFiled: October 4, 2013Date of Patent: January 20, 2015Assignee: SuVolta, Inc.Inventors: Lance S. Scudder, Pushkar Ranade, Charles Stager, Urupattur C. Sridharan, Dalong Zhao
-
Patent number: 8937006Abstract: A method of fabricating a semiconductor integrated circuit (IC) is disclosed. The method includes receiving a semiconductor device. The method also includes forming a step-forming-hard-mask (SFHM) on the MG stack in a predetermined area on the semiconductor substrate, performing MG recessing, depositing a MG hard mask over the semiconductor substrate and recessing the MG hard mask to fully remove the MG hard mask from the MG stack in the predetermined area.Type: GrantFiled: July 30, 2012Date of Patent: January 20, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Minchang Liang, Chie-Iuan Lin, Yao-Kwang Wu
-
Patent number: 8937007Abstract: A method of manufacturing a semiconductor device, including: forming a moisture resistant ring surrounding a multilayer interconnection structure in a layered body formed of stacked layers of a plurality of interlayer insulating films lower in dielectric constant than a SiO2 film and including the multilayer interconnection structure; forming a groove in the layered body between the moisture resistant ring and a scribe line, the groove reaching a surface of a semiconductor substrate; forming a film including Si and C as principal components and covering sidewall surfaces and a bottom surface of the groove; and forming a protection film on the film along the sidewall surfaces and the bottom surface of the groove.Type: GrantFiled: February 16, 2012Date of Patent: January 20, 2015Assignee: Fujitsu Semiconductor LimitedInventors: Kenichi Watanabe, Nobuhiro Misawa, Satoshi Otsuka
-
Patent number: 8937008Abstract: A system and process for forming a ball grid array on a substrate includes defining a plurality of openings in a resist layer on the substrate, and forming a plurality of openings in the resist layer, each positioned over a contact pad of the substrate. Flux is then deposited in the openings, and solder balls are positioned in each opening with the flux. Solder bumps are formed by reflowing the solder balls in the respective openings. The resist layer is then removed, leaving an array of solder bumps on the substrate. The flux can be deposited by depositing a layer of flux, then removing the flux, except a portion that remains in each opening. Solder balls can be positioned by moving a ball feeder across the resist layer and dropping a solder ball each time an aperture in the ball feeder aligns with an opening in the resist layer.Type: GrantFiled: December 29, 2011Date of Patent: January 20, 2015Assignee: STMicroelectronics Pte Ltd.Inventor: Yonggang Jin
-
Patent number: 8937009Abstract: Disclosed are a method for metallization during semiconductor wafer processing and the resulting structures. In this method, a passivation layer is patterned with first openings aligned above and extending vertically to metal structures below. A mask layer is formed and patterned with second openings aligned above the first openings, thereby forming two-tier openings extending vertically through the mask layer and passivation layer to the metal structures below. An electrodeposition process forms, in the two-tier openings, both under-bump pad(s) and additional metal feature(s), which are different from the under-bump pad(s) (e.g., a wirebond pad; a final vertical section of a crackstop structure; and/or a probe pad). Each under-bump pad and additional metal feature initially comprises copper with metal cap layers thereon.Type: GrantFiled: April 25, 2013Date of Patent: January 20, 2015Assignee: International Business Machines CorporationInventors: Timothy H. Daubenspeck, Jeffrey P. Gambino, Karen P. McLaughlin, Ekta Misra, Christopher D. Muzzy, Eric D. Perfecto, Wolfgang Sauter
-
Patent number: 8937010Abstract: A method and structure for encoding information on an integrated circuit chip. The method includes selecting a set of chip pads of the integrated circuit chip for encoding the information; encoding the information during a wirebonding process, the wirebonding process comprising forming ball bonds on chip pads of the integrated circuit chip and wedge bonds on leadframe fingers adjacent to one or more edges of the integrated circuit chip, the ball bonds and the wedge bonds connected by respective and integral wires; and wherein the information is encoded by varying one or more wirebonding parameters on each chip pad of the set of chip pads, the wirebonding parameters selected from the group consisting of the location of a ball bond, the diameter of a ball bond, both the location and diameter of a ball bond, the location of a wedge bond and combinations thereof.Type: GrantFiled: February 27, 2013Date of Patent: January 20, 2015Assignee: International Business Machines CorporationInventors: William E. Bentley, Jr., Nathanial W. Bowe, Alfred J. Brignull, Mark A. DiRocco, Thomas C. Rudick
-
Patent number: 8937011Abstract: Techniques disclosed herein may achieve crack free filling of structures. A flowable film may substantially fill gaps in a structure and extend over a base in an open area adjacent to the structure. The top surface of the flowable film in the open area may slope down and may be lower than top surfaces of the structure. A capping layer having compressive stress may be formed over the flowable film. The bottom surface of the capping layer in the open area adjacent to the structure is lower than the top surfaces of the lines and may be formed on the downward slope of the flowable film. The flowable film is cured after forming the capping layer, which increases tensile stress of the flowable film. The compressive stress of the capping layer counteracts the tensile stress of the flowable film, which may prevent a crack from forming in the base.Type: GrantFiled: January 15, 2013Date of Patent: January 20, 2015Assignee: SanDisk 3D LLCInventors: Hiroaki Iuchi, Hitomi Fujimoto, Chao Feng Yeh
-
Patent number: 8937012Abstract: Provided is a production method for a semiconductor device comprising a metal silicide layer. According to one embodiment of the present invention, the production method for a semiconductor device comprises the steps of: forming an insulating layer on a substrate, on which a polysilicon pattern has been formed, in such a way that the polysilicon pattern is exposed; forming a silicon seed layer on the exposed polysilicon pattern that has been selectively exposed with respect to the insulating layer; forming a metal layer on the substrate on which the silicon seed layer has been formed; and forming a metal silicide layer by carrying out a heat treatment on the substrate on which the metal layer has been formed.Type: GrantFiled: August 30, 2011Date of Patent: January 20, 2015Assignee: Eugene Technology Co., Ltd.Inventors: Hai Won Kim, Sang Ho Woo, Sung Kil Cho, Gil Sun Jang
-
Patent number: 8937013Abstract: A method for easily forming a region with conductivity and high wettability without a step for removing a photocatalytic reaction layer, which is formed over a conductive layer, is proposed. The photocatalytic reaction layer is formed over a photocatalytic conductive layer, and the photocatalytic conductive layer is irradiated with ultraviolet light to form a region with conductivity and higher wettability than the photocatalytic reaction layer on a surface of the photocatalytic conductive layer which is irradiated with ultraviolet light. Note that for the photocatalytic conductive layer, a layer having a photocatalytic property of which resistivity is lower than or equal to 1×10?2 ? cm can be used.Type: GrantFiled: October 12, 2007Date of Patent: January 20, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Masafumi Morisue
-
Patent number: 8937014Abstract: A liquid treatment apparatus of continuously performing a plating process on multiple substrates includes a temperature controlling container for accommodating a plating liquid; a temperature controller for controlling a temperature of the plating liquid in the temperature controlling container; a holding unit for holding the substrates one by one at a preset position; a nozzle having a supply hole through which the temperature-controlled plating liquid in the temperature controlling container is discharged to a processing surface of the substrate; a pushing unit for pushing the temperature-controlled plating liquid in the temperature controlling container toward the supply hole of the nozzle; and a supply control unit for controlling a timing when the plating liquid is pushed by the pushing unit. The temperature controller controls the temperature of the plating liquid in the temperature controlling container based on the timing when the plating liquid is pushed by the pushing unit.Type: GrantFiled: August 31, 2011Date of Patent: January 20, 2015Assignee: Tokyo Electron LimitedInventors: Takashi Tanaka, Yusuke Saito, Mitsuaki Iwashita
-
Patent number: 8937015Abstract: The present invention relates to a method for forming a via in a substrate which includes the flowing steps of: (a) providing a substrate having a first surface and a second surface; (b) forming an accommodating groove and a plurality of pillars on the first surface of the substrate, the accommodating groove having a side wall and a bottom wall, the pillars remaining on the bottom wall of the accommodating groove; (c) forming a first insulating material in the accommodating groove and between the pillars; (d) removing the pillars so as to form a plurality of grooves in the first insulating material; and (e) forming a first conductive metal in the grooves. As a result, thicker insulating material can be formed in the via, and the thickness of the insulating material in the via is even.Type: GrantFiled: April 12, 2011Date of Patent: January 20, 2015Assignee: Advanced Semiconductor Engineering, Inc.Inventors: Meng-Jen Wang, Chung-Hsi Wu
-
Patent number: 8937016Abstract: A method of producing a patterned inorganic thin film element includes providing a substrate having a patterned thin layer of polymeric inhibitor on the surface. The substrate and the patterned thin layer of polymeric inhibitor are exposed to a highly reactive oxygen process. An inorganic thin film layer is deposited on the substrate in areas without inhibitor using an atomic layer deposition process.Type: GrantFiled: June 21, 2013Date of Patent: January 20, 2015Assignee: Eastman Kodak CompanyInventors: Carolyn R. Ellinger, Shelby F. Nelson, Kurt D. Sieber
-
Patent number: 8937017Abstract: Embodiments of the invention relate to a substrate etching method and apparatus. In one embodiment, a method for etching a substrate in a plasma etch reactor is provided that include flowing a backside process gas between a substrate and a substrate support assembly, and cyclically etching a layer on the substrate.Type: GrantFiled: January 29, 2010Date of Patent: January 20, 2015Assignee: Applied Materials, Inc.Inventors: Alan Cheshire, Stanley Detmar
-
Patent number: 8937018Abstract: A method of forming a pattern on a substrate includes forming spaced, upwardly-open, cylinder-like structures projecting longitudinally outward of a base. Photoresist is formed elevationally over and laterally inward of the cylinder-like structures. The photoresist is patterned to form interstitial spaces into the photoresist laterally outward of the cylinder-like structures. The interstitial spaces are individually surrounded by at least three of the cylinder-like structures. The patterned photoresist is used as an etch mask while etching interstitial openings into the base and while the photoresist is laterally inward of the cylinder-like structures. Other aspects are disclosed.Type: GrantFiled: March 6, 2013Date of Patent: January 20, 2015Assignee: Micron Technology, Inc.Inventors: Vishal Sipani, Anton J. deVillers, Ranjan Khurana
-
Patent number: 8937019Abstract: Techniques for forming a three dimensional (3D) feature on a substrate are disclosed. In one exemplary embodiment, the technique may be realized as a method comprising: forming a resist structure on the substrate, the resist structure having a first resist portion with a first thickness, a second resist portion with a second thickness, and a third resist portion with a third thickness, where the first thickness may be less than the second thickness, and where the second thickness may be less than the third thickness; implanting charged particles into the substrate through the first and second resist portions and forming an implanted region in the substrate; and etching the substrate to form the 3D feature on the substrate.Type: GrantFiled: April 2, 2013Date of Patent: January 20, 2015Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Jonathan G. England, Patrick M. Martin, David Cox
-
Patent number: 8937020Abstract: One object is to provide a deposition technique for forming an oxide semiconductor film. By forming an oxide semiconductor film using a sputtering target including a sintered body of a metal oxide whose concentration of hydrogen contained is low, for example, lower than 1×1016 atoms/cm3, the oxide semiconductor film contains a small amount of impurities such as a compound containing hydrogen typified by H2O or a hydrogen atom. In addition, this oxide semiconductor film is used as an active layer of a transistor.Type: GrantFiled: June 20, 2013Date of Patent: January 20, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Keiji Sato
-
Patent number: 8937021Abstract: In some embodiments, methods for forming a three dimensional NAND structure include providing to a process chamber a substrate having alternating nitride layers and oxide layers or alternating polycrystalline silicon consisting layers and oxide layers formed atop the substrate and a photoresist layer formed atop the alternating layers; etching the photoresist layer to expose at least a portion of the alternating layers; providing a process gas comprising sulfur hexafluoride and oxygen to the process chamber; providing RF power of about 4 kW to about 6 kW to a first inductive RF coil and a second inductive RF coil disposed proximate the process chamber to ignite the process gas to form a plasma, wherein a current flowing through the first inductive RF coil is out of phase with RF current flowing through the second inductive RF coil; and etching through a desired number of the alternating layers to form a feature.Type: GrantFiled: June 17, 2014Date of Patent: January 20, 2015Assignee: Applied Materials, Inc.Inventors: Han Soo Cho, Sang Wook Kim, Joo Won Han, Kee Young Cho, Anisul H. Khan
-
Patent number: 8937022Abstract: A method of manufacturing a semiconductor device includes: housing a substrate into a processing chamber; and forming a metal nitride film on the substrate by supplying a source gas containing a metal element, a nitrogen-containing gas and a hydrogen-containing gas into the processing chamber; wherein in forming the metal nitride film, the source gas and the nitrogen-containing gas are intermittently supplied into the processing chamber, or the source gas and the nitrogen-containing gas are intermittently and alternately supplied into the processing chamber, or the source gas is intermittently supplied into the processing chamber in a state that supply of the nitrogen-containing gas into the processing chamber is continued, and the hydrogen-containing gas is supplied into the processing chamber during at least supply of the nitrogen-containing gas into the processing chamber.Type: GrantFiled: November 29, 2011Date of Patent: January 20, 2015Assignee: Hitachi Kokusai Electric Inc.Inventor: Arito Ogawa
-
Patent number: 8937023Abstract: A method includes forming an insulating film over a substrate by introducing a cyclic siloxane compound having a cyclic siloxane as a skeleton and having at least one volatile hydrocarbon group bonded to a side chain, and a silicon-containing compound into a plasma, and converting the insulating film to a porous insulating film by adding energy to the insulating film. The silicon-containing compound is decomposed using less energy as compared with the skeleton of the cyclic siloxane compound, the volatile hydrocarbon group, and the bond between the cyclic siloxane compound and the volatile hydrocarbon group.Type: GrantFiled: February 1, 2012Date of Patent: January 20, 2015Assignee: Renesas Electronics CorporationInventors: Fuminori Ito, Yoshihiro Hayashi
-
Patent number: 8937024Abstract: A process for producing at least one photonic component (32, 33, 35, 39, 41), includes inserting the photonic component (32, 33, 35, 39, 41) into a surface layer (12) of a semiconductor wafer and/or within a semiconductor wafer, especially of a semiconductor chip (11, 31, 34, 38, 40) for the simpler and more cost-effective production with the most desired possible three-dimensional structures. At least one laser beam (22) is coupled into the material of the surface layer (12) and/or of the semiconductor wafer, in which the laser beam (22) is focused at a predetermined depth in the material. At least one property of the material and/or the material structure is changed in the area of focus (23, 36).Type: GrantFiled: September 20, 2012Date of Patent: January 20, 2015Assignee: BIAS Bremer Institut für angewandte Strahltechnik GmbHInventors: Ralf Bergmann, Mike Bülters, Vijay Vittal Parsi Sreenivas
-
Patent number: 8937025Abstract: One-part binder compositions are described that may include a protein and a crosslinking combination. The crosslinking combination may include at least a first crosslinking compound and a second crosslinking compound. The first and second crosslinking compounds are individually crosslinkable with each other and with the protein. Examples of the protein include soy protein. Fiber products and methods of making the fiber products are also described. The fiber products may include organic fibers, inorganic fibers, or both, in a cured thermoset binder based on solutions of the one-part binder compositions.Type: GrantFiled: November 15, 2011Date of Patent: January 20, 2015Assignee: Johns ManvilleInventors: Mingfu Zhang, Jawed Asrar, Zhihua Guo
-
Patent number: 8937026Abstract: Novel glass compositions and method for producing a glass/metal join, in which the novel glass comprises: Oxide (%) B2O3 ??8-13.5 Al2O3 5-9 Na2O 3-9 K2O 0-5 CaO 2-4 MgO 0-4 ZnO 0-4 SiO2 Up to 100 depending on the necessary requirements, owing to the significance thereof the thermal expansion coefficient, such that this thermal expansion coefficient is adjusted to match that of the metal part or alloy with which the glass/metal weld is to be achieved, which makes it possible to satisfactorily produce said weld which results in a strong glass/metal join, that is free from tensile stresses and that is durable over time and may be used, inter alia, to obtain parts that form part of solar collectors.Type: GrantFiled: August 12, 2010Date of Patent: January 20, 2015Assignee: Abengoa Solar New Technologies, S.A.Inventors: Noelia Martí´nez Sanz, José Luis Oteo Mazo, Jaun Rubio Alonso, Fausto Rubio Alonso, Alejandra Mazo Fernández
-
Patent number: 8937027Abstract: A glass composition and its use for producing glass tubes is provided. The glass tubes having the provided composition are particularly suitable for the outer tubes of fluorescent lamps in the case of which a phosphor layer is baked at temperatures of up to 700° C. The tubes composed of the glass of the provided composition have a lower tendency to deform or stick together when processed at high temperatures. To obtain the observed effects, the molar ratio of Na2O/(Na2O+K2O), inter alia, is greater than 0.4 and not more than 0.72.Type: GrantFiled: August 27, 2012Date of Patent: January 20, 2015Assignee: Schott AGInventors: Erhard Dick, Joerg Hinrich Fechner
-
Patent number: 8937028Abstract: The invention relates to a glass sheet, the composition of which is of the soda-lime-silica type and comprises the following constituents in contents varying within the weight limits defined below: Fe2O3 (total iron) ??0 to 0.02%; and K2O 1.5 to 10%.Type: GrantFiled: September 19, 2008Date of Patent: January 20, 2015Assignee: Saint-Gobain Glass FranceInventors: Dominique Sachot, Octavio Cintora
-
Patent number: 8937029Abstract: Disclosed is a boron carbide-based ceramics material which has a high density and a high specific rigidity, but additionally with excellent processability, and a production method for the boron carbide-based ceramics material. Specifically, the high-rigidity ceramics material contains boron carbide in an amount of 90 to 99.5 mass %, wherein at least silicon, aluminum, oxygen and nitrogen coexist in a grain boundary phase between crystal grains of the boron carbide. This high-rigidity ceramics material can be produced by a method comprising: preparing a boron carbide powder, and, as a sintering aid, one or more selected from the group consisting of an oxide, a nitride and an oxynitride of silicon, an oxide, a nitride and an oxynitride of aluminum, and a composite oxide, a composite nitride and a composite oxynitride of aluminum and silicon, in such a manner as to contain all of Si, Al, O and N; and subjecting the boron carbide powder and the sintering aid to mixing, forming and sintering.Type: GrantFiled: November 4, 2011Date of Patent: January 20, 2015Assignee: Krosakiharima CorporationInventors: Yutaka Sato, Hiroto Unno
-
Patent number: 8937030Abstract: The present invention is directed to perovskite nanostructures of Formula ABO3, wherein A and B represent one or more metals with A having a valence lower than B, to methods of making the perovskite nanostructures of Formula ABO3 comprising their synthesis within and precipitation from reverse micelles, and the use of the perovskite nanostructures of Formula ABO3 as capacitors, and their use in dynamic random access memory, electromechanics, and non-linear optics.Type: GrantFiled: October 2, 2007Date of Patent: January 20, 2015Assignee: Research Foundation of the City University of New YorkInventors: Kai Su, Nan-Loh Yang
-
Patent number: 8937031Abstract: A catalyst for the epoxidation of an olefin comprising a carrier and, deposited thereon, silver, a rhenium promoter, a first co-promoter, and a second co-promoter; wherein the quantity of the rhenium promoter deposited on the carrier is greater than 1 mmole/kg, relative to the weight of the catalyst; the first co-promoter is selected from sulfur, phosphorus, boron, and mixtures thereof; the second co-promoter is selected from tungsten, molybdenum, chromium, and mixtures thereof; the total quantity of the first co-promoter and the second co-promoter deposited on the carrier is at most 5.0 mmole/kg, relative to the weight of the catalyst; and wherein the carrier has a monomodal, bimodal or multimodal pore size distribution, a pore diameter of 0.01-200 ?m, a specific surface area of 0.03-10 m2/g, a pore volume of 0.2-0.7 cm3/g, wherein the median pore diameter is 0.1-100 ?m, and a water absorption of 10-80%.Type: GrantFiled: February 24, 2011Date of Patent: January 20, 2015Assignee: Shell Oil CompanyInventors: John Robert Lockemeyer, Marek Matusz, Randall Clayton Yeates
-
Patent number: 8937032Abstract: A method for producing an adsorbent, having the steps of combining a first sludge and a second material to form a mixture, thermally drying the mixture, and pyrolizing the mixture using at least four temperature zones wherein each temperature zone is set between about 600° C. and 1,100° C. The first sludge is a municipal sludge or an industrial sludge, and the second material is a compost material or one of municipal sludge or industrial sludge differing from the first sludge. The compost material is at least one of tobacco waste, waste paper and wood char, or a combination thereof. Further, the drying can happen in two stages. Each stage can include two separate temperatures.Type: GrantFiled: May 8, 2012Date of Patent: January 20, 2015Assignee: Research Foundation of the City University of New YorkInventor: Teresa J. Bandosz
-
Patent number: 8937033Abstract: The present invention relates to the use of phosphated 2-propylheptanol, phosphated 2-proyplheptanol alkoxylate and/or mixtures thereof in agricultural formulations. The invention also relates to agricultural formulations comprising the aforementioned adjuvants, and to methods of treating a plant with the agricultural formulations of the invention.Type: GrantFiled: July 13, 2005Date of Patent: January 20, 2015Assignee: Akzo Nobel N.V.Inventor: Mark Alexander
-
Patent number: 8937034Abstract: A wellbore fluid that includes an aqueous based fluid; an amphoteric, viscoelastic surfactant; and a modified starch is disclosed. Methods of drilling subterranean wells, methods of reducing the loss of fluid out of subterranean wells, and methods of completing wellbores using aqueous-based fluids having an ampoteric, viscoelastic surfactant and a modified starch are also disclosed.Type: GrantFiled: January 7, 2009Date of Patent: January 20, 2015Assignee: M-I L.L.C.Inventors: Charles Svoboda, LaTosha Moore, Frank E. Evans
-
Patent number: 8937035Abstract: The present invention relates to a lubricating composition containing an oil of lubricating viscosity and a star polymer that has at least two inner blocks, at least one of which is in turn bonded to one or more outer blocks. The invention further relates to methods of lubricating a mechanical device with the lubricating composition.Type: GrantFiled: February 2, 2012Date of Patent: January 20, 2015Assignee: The Lubrizol CorporationInventors: Haihu Qin, Marina Baum, John R. Johnson
-
Patent number: 8937036Abstract: A dental appliance disinfecting composition which includes a chloramine bleaching agent and an amino acid.Type: GrantFiled: March 14, 2014Date of Patent: January 20, 2015Assignee: LMA Solutions Inc.Inventors: Nicholas Conley, Lynn Muzik
-
Patent number: 8937037Abstract: A device for in-situ production of caustic and increasing alkalinity of a detergent and methods for increasing alkalinity of a detergent are disclosed. In particular, in situ electrochemical conversion of bicarbonate, sesquicarbonate or carbonate sources into caustic provides a safe means for increasing alkalinity of a detergent for a variety of cleaning applications. The invention further discloses methods for cleaning using the electrochemically enhanced detergent according to the invention.Type: GrantFiled: March 2, 2011Date of Patent: January 20, 2015Assignee: Ecolab USA Inc.Inventors: Kim R. Smith, Erik C. Olson
-
Patent number: 8937038Abstract: A therapeutic agent for treating an infectious or inflammatory disease, a pharmaceutical composition for treating an infectious or inflammatory disease, and a method of using a pharmaceutical composition are provided. The pharmaceutical composition includes a peptide ligand that binds with CXCR2 as an active component. The active component can be useful in preventing and treating infectious and/or inflammatory diseases, including sepsis and septic shock by promoting the removal of bacteria by phagocytosis, suppressing an inflammatory response, and suppressing the apoptosis of immune cells.Type: GrantFiled: October 19, 2011Date of Patent: January 20, 2015Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Yoe Sik Bae, Sang Doo Kim
-
Patent number: 8937039Abstract: The present invention provides peptide-based peroxidase inhibitors having the formula AA1-AA2-AA3, wherein AA1 is a positively charged, negatively charged or neutral amino acid, AA2 is a redox active amino acid, and AA3 is an amino acid possessing a reducing potential such that AA3 is capable of undergoing a redox reaction with a radical of amino acid AA2 or a retro or retro-inverso analog thereof. The result of such a combination is a highly effective inhibitor of peroxidase activity that has potent anti-inflammatory properties in widely diverse models of vascular disease and injury. Exemplary tripeptides effectively inhibit peroxidase mediated LDL oxidation, increase vasodilation in SCD mice, inhibit eosinophil infiltration and collagen deposition in asthma mice, inhibit acute lung injury, and decrease ischemic injury of the heart.Type: GrantFiled: November 15, 2013Date of Patent: January 20, 2015Assignee: The Medical College of Wisconsin, Inc.Inventors: Hao Zhang, Yang Shi, Hao Xu, Kirkwood A. Pritchard, Jr.
-
Patent number: 8937040Abstract: Provided herein is an antibacterial compound of the following formula: or a pharmaceutically acceptable salt thereof. The antibacterial compound has antibacterial properties against a diverse range of gram negative bacteria and reduced toxicity compared to polymyxins such as polymyxin B. Also provided are antibacterial pharmaceutical compositions containing the antibacterial compound, as well as methods for preparing the antibacterial compound.Type: GrantFiled: December 21, 2012Date of Patent: January 20, 2015Assignee: BioSource Pharm, Inc.Inventor: Richard A. Leese
-
Patent number: 8937041Abstract: The present invention relates to novel fluorinated macrocyclic compounds and methods of treating a hepatitis C infection in a subject in need of such therapy with said macrocyclic compounds. The present invention further relates to pharmaceutical compositions comprising the compounds of the present invention, or pharmaceutically acceptable salts, esters, or prodrugs thereof, in combination with a pharmaceutically acceptable carrier or excipient.Type: GrantFiled: December 29, 2011Date of Patent: January 20, 2015Assignee: AbbVie, Inc.Inventors: Keith F. McDaniel, Hui-Ju Chen, Ming Yeung, Timothy Middleton, Liangjun Lu, Kevin Kurtz
-
Patent number: 8937042Abstract: Pharmaceutical composition for parenteral administration comprising a basal insulin peptide and an insulinotropic GLP-1 peptide comprising at least 6 zinc atoms per 6 insulin molecules.Type: GrantFiled: November 14, 2008Date of Patent: January 20, 2015Assignee: Novo Nordisk A/SInventors: Anne Plum, Dorte Bjerre Steensgaard, Jens Kaalby Thomsen, Morten Schlein, Anne Sofie Kajær Markussen, Christian Poulsen
-
Patent number: 8937043Abstract: The invention concerns a method for obtaining a highly enriched TGF-beta protein fraction in activated form, from a liquid solution rich in proteins said to be soluble in the aqueous phase of milk and/or of whey, said method comprising the following steps; a) adjusting soluble proteins purified at a concentration between 5 and 30 g/liter of solution; b) precipitating part of the whey proteins by acidic treatment of the solution thus obtained to a pH ranging between 4 and 5.5 and at a temperature ranging between 55° C. and 68° C.; c) carrying out a microfiltration of the treated solution by diafiltration, so as to obtain respectively a microfiltration retentate and a microfiltrate; d) recuperating the microfiltration retentate containing the protein fraction highly enriched in TGF-beta; e) drying the microfiltration retentate which has been subjected to diafiltration to obtain a powder highly enriched in TGF-beta.Type: GrantFiled: July 13, 2005Date of Patent: January 20, 2015Assignee: Piere Jouan Biotechnologies S.A.Inventors: Jean-Louis Maubois, Jacques Fauquant, Pierre Jouan, Michel Bourtourault