Abstract: Systems, processes, and manufactures are provided that employ a casing associated with an electrical component to provide some, most, substantially all or all electrical insulative protection necessary for the electrical component. This casing may be further employed with potting or other materials to supplement and add additional or different protections for the component. These additional protections can include additional insulative resistance, thermal protection, moisture protection and other buffers to and from the environment.

Abstract: An electronic device includes a wiring board including a first electrode and a second electrode, a semiconductor device mounted on the wiring board and including a first terminal and a second terminal, an interposer provided between the wiring board and the semiconductor device, the interposer including a conductive pad and a sheet supporting the conductive pad, the conductive pad having a first surface on a side of the wiring board and a second surface on a side of the semiconductor device, a first solder connecting the first electrode positioned outside of an area in which the interposer is disposed with the first terminal positioned outside of the area, a second solder connecting the second electrode positioned inside of the area with the first surface of the conductive pad, and a third solder connecting the second terminal positioned inside of the area with the second surface of the conductive pad.

Abstract: There is provided a wiring board including a multilayer substrate and a reinforcing member. The multilayer substrate has a first main substrate surface formed with a chip mounting area to which an electronic chip is mounted and a second main substrate surface opposed to the first main substrate surface. The reinforcing member is fixed to either an area of the first main substrate surface other than the chip mounting area or the second main substrate surface and has a body predominantly formed of ceramic material and incorporating therein at least one capacitor.

Abstract: An align fixture for aligning an electronic component having a receptacle adapted to receive the electronic component and having a first abutting section and a second abutting section, the first abutting section being mounted via an elastic unit, the first abutting section and the second abutting section delimit an electronic component receiving volume in which the electronic component is to be received in the receptacle, the elastic unit extends below a bottom side of the electronic component receiving volume, and the elastic unit is adapted to provide a clamping force for clamping the electronic component between the first abutting section and the second abutting section.

Abstract: A personal electronic device (PED) sanitization device comprises a compartment configured to receive a PED and a sanitization module configured to emit electro-optical (EO) radiation into the interior of the compartment. The compartment may comprise a support member configured to maintain the PED at a particular position and/or orientation. The support member may be transparent to the EO radiation, such that the entire surface of the PED can be irradiated. The device may further comprise an acoustic conduit to allow sounds generated by the PED to be transmitted outside of the compartment. The conduit may be configured to prevent EO radiation from leaking into the environment.

Abstract: A battery backup unit (BBU) system and apparatus is provided for securing and communicating with a BBU for use with optical network terminals (ONTs) and/or residential gateways. In various aspects, the BBU system is configured to eliminate the possibility for reversing the polarity of the backup battery. The BBU system also provides an integrated communication circuit for receiving a variety of connectors.

Abstract: A substrate with built-in electronic component includes: a core layer that includes a core material and a cavity formed in the core material and containing an insulating material; an insulating layer that includes a ground wiring and a signal wiring and is formed on the core layer; and a plurality of electronic components that each include a first terminal and a second terminal and are stored in the cavity, the plurality of electronic components each having one end portion and the other end portion, the first terminal being formed at the one end portion and connected to the ground wiring, the second terminal being formed at the other end portion and connected to the signal wiring, the plurality of electronic components having at least one of arrangements in which the first terminals face each other and in which the second terminals face each other.

Abstract: An electromagnetic interference (EMI) absorber includes an EMI conductive sheet having first and second portions, the first portion absorbing EMI from an EMI absorption target and the second portion for conducting EMI to an EMI discharge target, and an elastic member covered by the first portion.

Abstract: An electronic module with EMI protection is disclosed. The electronic module comprises a component (1) with contact terminals (2) and conducting lines (4) in a first wiring layer (3). There is also a dielectric (5) between the component (1) and the first wiring layer (3) such that the component (1) is embedded in the dielectric (5). Contact elements (6) provide electrical connection between at least some of the contact terminals (2) and at least some of the conducting lines (4). The electronic module also comprises a second wiring layer (7) inside the dielectric (5). The second wiring layer (7) comprises a conducting pattern (8) that is at least partly located between the component (1) and the first wiring layer (3) and provides EMI protection between the component (1) and the conducting lines (4).

Abstract: A transformer has two magnetic cores, at least one primary winding unit mounted in the magnetic cores, at least one secondary winding unit mounted in the magnetic cores and two rectifying circuit boards externally mounted beside the magnetic cores. An AC voltage output from the secondary winding unit is transmitted to and rectified by the rectifying circuit board. Therefore, the size of the transformer is compact, and heat energy generated by electronic elements mounted on the rectifying circuit board is effectively dissipated to maintain normal operation of the transformer. Further, since the transmission path from the secondary winding unit to the rectifying circuit board is short, energy loss is reasonably reduced when the transformer is operated under a high frequency situation or a larger current mode.

Abstract: The converter comprises an inverter powered by a DC current source. The inverter powers a conversion unit operating on the basis of controlled magnetic switching obtained by means of power diodes and saturable inductors. A regulator can be used to produce a control voltage that is a function of the output voltage which is regulated with the injection of the control voltage into the circuit comprising the smoothing inductors. According to the invention, during each operating cycle, one of the power diodes is locked when the other power diode switches to conduction mode, such as to create a phase displacement between the input voltage of the conversion unit and the input current of same. The phase displacement angle is a function of the control voltage.

Abstract: Apparatus and methods for filtering the transients of an input signal of an integrated circuit while maintaining a constant voltage at an input terminal of the integrated circuit are disclosed. In one example, the integrated circuit can be a controller of a switched-mode power supply. The controller can include a line sensing circuit coupled to receive an input signal representative of the line voltage and operable produce an output signal that can be used by other circuits within the controller. The input signal may include a current through a sense resistor coupled between the input of the power supply and the line sensing circuit. The output signal may include a scaled and filtered version of this current. The line sensing circuit can be coupled to the input terminal of the controller to receive the input signal or can directly receive the input signal.

Abstract: A resonant converter comprising: a controllable current source; a resonant tank circuit coupled to the current source; and an isolated buck-type converter coupled to the resonant tank circuit, the isolated buck-type converter having an output, wherein the resonant tank circuit enables switches in the isolated buck-type converter to switch under soft-switching conditions. In some embodiments, the controllable current source is a switch-mode-type current source. In some embodiments, the isolated buck-type converter comprises a half-bridge converter. In some embodiments, the isolated buck-type converter comprises a full-bridge converter. In some embodiments, the isolated buck-type converter comprises a push-pull converter.

Abstract: A DC power supply including a resonant circuit on a secondary side of a transformer suppresses a surge voltage during power recovery of diodes constituting a rectifier circuit, correctly estimates a load current from a secondary current of the transformer, and adjusts supplied power when a load is light. The DC power supply includes a DC voltage source, a converter, a transformer, a rectifier circuit, a resonant circuit composed of a resonant switch and a resonant capacitor, a filter reactor, a filter capacitor, a snubber diode, a snubber capacitor, a load, first and second voltage sensors, a current sensor, and a controller for controlling gate pulses of semiconductor devices constituting a converter and the resonant switch and a signal for adjusting operation timings of A/D converters converting the signals of these sensors.

Abstract: A switching mode power supply (SMPS) includes a rectifying device configured for converting a periodically varying input AC (alternating current) voltage into a DC (direct current) voltage, and a transformer including a primary winding, a secondary winding, and an auxiliary winding. The primary winding is coupled to the rectifying device. An input capacitor is coupled to the rectifying device and the primary winding of the transformer. A first power switch is coupled to the input capacitor. A control circuit is coupled to the first power switch and is configured to control the first power switch based on a phase or amplitude of the input AC voltage. By controlling the charging and discharging of the input capacitor, power is provided to the primary winding during a longer portion of the AC input voltage cycle, allowing the rectifier device to have a larger conduction angle to increase a power factor (PF).

Abstract: A power supply and method for reliable turn-on of a switched mode power supply (SMPS) in which the same transformer is used for providing power from the primary side to both the main output of the SMPS and a secondary side voltage regulator a train of voltage pulses are transmitted, from the primary side to the secondary side. The voltage regulator generates a feedback signal indicating when it has turned on and is operating, and the transmission of pulses within the train is controlled based on the detection of feedback signal. In this way, only the required amount of power to switch on the voltage regulator is transferred to the secondary side during a start-up operation and excess power at the main output is prevented, thereby avoiding distortion of the desired start-up ramp figure.

Abstract: The disclosure provides a power controller and related control method for a switch mode power supply operating in a quasi-resonant mode. The switched mode power supply has a power switch and an auxiliary winding. The power controller has a feedback pin connected to the auxiliary winding. A clamp circuit is connected to the feedback pin and configured for clamping a voltage at the feedback pin by providing a clamp current. A peak hold circuit is connected to the clamp circuit for generating a peak record substantially corresponding to a peak value of the clamp current. A valley detector is configured for providing an entry signal indicating a start of a voltage valley. A delay circuit provides a trigger signal a delay time after the entry signal is provided. The delay time varies in response to the peak record, and the trigger signal is capable of turning on the power switch.

Abstract: An AC to DC converter system is disclosed in which a conversion circuit for converting an AC input signal to a DC output signal is operably coupled with a communication circuit designed for sensing output indicative of the presence or absence of a load at the DC output. The system is designed so that the conversion circuit operates in an inactive standby state when there is no load, and in an active state for supplying DC power when a load is present. The system is configured to operate using ultra-low power.

Abstract: An active voltage drop control-type pulse power generator includes power stages, a power inverter, a power loop, a control inverter, a control loop, and a compensation unit. The power stages include power cells connected in series. Each power cell includes a switch and a capacitor connected in series, a driver for driving the switch, a bypass diode connected to both ends of the switch, and a rectifying diode connected to both ends of the capacitor. The power inverter charges the capacitor via the power loop and the rectifying diode inside each power cell. The control inverter provides a control signal for the switch via the control loop and the driver inside each power cell. The compensation unit is connected to one of the power cells and generates a compensation voltage for compensating for a voltage drop at a load according to a voltage detected in real-time from the power cell.

Abstract: The disclosed embodiments provide a system that operates a flyback converter. During operation, the system senses an input voltage for the flyback converter. Next, the system uses the input voltage to determine a negative peak current that enables zero voltage switching for a primary switch in the flyback converter. Finally, the system uses the negative peak current to perform the zero voltage switching for the primary switch based on the input voltage, wherein the negative peak current reduces a power loss of the flyback converter.

Abstract: The embodiments herein describe a switched mode power converter. In particular, the embodiments herein disclose a method for powering a synchronous rectifier controller that enables synchronous rectification in the switched mode power converter. The synchronous rectifier controller may be enabled by a regulator circuit or directly from the output voltage.

Abstract: A controller of a switching power converter sets an actual turn-on time of a switch in the switching power converter in each switching cycle by selecting one of a plurality of valley points of the output voltage of the switching power converter occurring subsequent to the desired turn-on time of the switch. The desired turn-on time of the switch may be calculated according to the regulation scheme employed by the switching power converter. The controller selects one of the plurality of valley points randomly from switching cycle to switching cycle. The controller generates a control signal to turn on the switching power converter at the selected one of the plurality of valley points of the output voltage occurring subsequent to the desired turn-on time.

Abstract: A power conversion system eliminates output transformers and replaces them with a zig-zag transformer and a filter that provides a 3-phase 5-wire system with significantly reduced weight and size as compared with conventional systems. The zig-zag transformer may have a low zero sequence impedance. The power conversion system also ensures operational safety by detecting various types of ground faults.

Abstract: A voltage control rate of an inverter has a DC component and an AC component. This AC component has a frequency which is six times a fundamental frequency of an AC voltage outputted by the inverter. Even when there are not only a fifth-order harmonic component but also a seventh-order harmonic component of a load current, a ratio between the magnitude of the AC component and the DC component can be appropriately set.

Abstract: A power converter including a rectifier stage connected to plural phases of a network delivering an input current at a determined fundamental frequency, a DC power supply bus and a bus capacitor connected to the DC power supply bus. The converter includes a controlled current source situated on the DC power supply bus, the current source making it possible to control a rectifier current, flowing on the DC power supply bus, and a controller for the controlled current source to control a rectifier current, flowing on the DC power supply bus. The controller is configured to implement a regulation loop into which are injected a first harmonic and a second harmonic synchronized respectively at six times and twelve times the fundamental frequency of the input current delivered by the network, the amplitude and phase of these harmonics being determined to limit the THDi and the PWHD.

Abstract: A switched-mode power supply (SMPS) and a method of control thereof is described, wherein the SMPS is operable to apply a spread spectrum modulation to a switching driver signal to reduce EMI in the SMPS. The SMPS is operable to perform voltage and current monitoring in parallel to the spread spectrum modulation to provide variable limit threshold detection and shutdown capabilities for circuit protection.

Abstract: A phase angle detector with a PLL, a power converter, and a method for reducing offsets in an input signal, in which an adaptive offset processor selectively removes a DC offset component from the input signal to generate a modified signal including a fundamental frequency component and higher order harmonics of the input signal with the DC offset component removed, and the PLL provides a phase angle signal at least partially according to the modified signal.

Abstract: A power conversion device according to embodiments includes a plurality of switch groups, a plurality of inductors, and a snubber circuit. The switch groups are respectively provided for input phases and each of the switch groups has a plurality of one-way switches that connects the corresponding input phase and output phases. The plurality of inductors are respectively connected between the input phases and the switch groups, and are coupled to one another so that current flowing through the one-way switch of one switch group moves to and continues to flow through the turned-on one-way switch of the other switch group when the one-way switch of the one switch group is turned off. The snubber circuit clamps a voltage based on the maximum voltage occurring on the plurality of inductors to a predetermined value.

Abstract: An inverter device includes: an inverter circuit configured to perform ON/OFF operations with a preset duty cycle to convert a DC power into an AC power and output the AC power to an AC motor; and a controller configured to change a duty cycle of the ON/OFF operations.

Abstract: An active snubber circuit for a switching power supply, in which a main switching element repeatedly operates an on-off operation so that current intermittently flows in a primary coil, has a capacitor for surge voltage absorption, a sub-switching element and a sub-control circuit controlling the sub-switching element. A circuit in which the capacitor for surge voltage absorption and the sub-switching element are connected in series is connected in parallel with the primary coil, and the sub-control circuit turns on the sub-switching element for a predetermined time period just after the main switching element is off.

Abstract: A power conversion system includes n (n being an integer of 2 or more) power conversion devices (P1 to P4) connected in parallel to a load (4); and a communication line (2) connected to the n power conversion devices (P1 to P4). Each of power conversion devices includes a communication circuit (10) which transmits a load current value detected by a current sensor (37) to each of other (n?1) power conversion devices through the communication line (2), and receives (n?1) load current values transmitted through the communication line (2) from other (n?1) power conversion devices; and an operation circuit (11) calculating a shared current and a cross current of the corresponding power conversion device based on the n load current values. Accordingly, a wiring line is prevented from becoming complicated even when the number of power conversion devices is increased.

Abstract: A power conversion system is disclosed that provides multiphase power, including phase voltages for each phase of the multiphase power. The system comprises a plurality of inverters that generate PWM output voltages based on PWM control signals. A plurality of inductive components is configured to receive the PWM output voltages to generate the phase voltages. The PWM output voltages cause circulating current flows through the inductive components. A voltage controller is employed that is responsive to the phase voltages to generate voltage modulation signals corresponding to the phase voltages. A plurality of current sharing channels are respectively associated with each of the plurality of inductive components and are configured generate current sharing modulation signals in response to the circulating current flows. The PWM control signals are generated based on modulation signals obtained by combining the current sharing modulation signals and voltage modulation signals.

Abstract: A power scavenging device attaches to an overhead power cable and a support pole. The power scavenging device includes a non-conducting outer body and a first capacitor and a second capacitor that are connected in series forming a voltage divider. A voltage source converter is electrically connected to the output of the power scavenging device. The voltage source converter outputs a regulated power.

Abstract: A rectification circuit includes a first input terminal, a first switch, an energy storage circuit, a first diode, a filtering circuit connected in series and in order to ground, a second diode, and a controller. Two opposite terminals of the second diode are connected to a first node between the first diode and the filtering circuit and a second node between the first switch and the energy storage circuit. The controller transmits control signals to the first switch and the second switch to control conductivities of the first switch and the second switch.

Abstract: A power conversion system for providing power to an electrical grid is described. The power conversion system includes a power converter coupled to a photovoltaic (PV) array and configured to control a PV array voltage. The power conversion system also includes a system controller communicatively coupled to the power converter and configured to select from a first reduced power operating point and a second reduced power operating point when a power available from the PV array is greater than a rated output power of the power conversion system.

Abstract: A transistor-based full-wave bridge rectifier is suitable for low A.C. input voltages such as received by a Radio-Frequency Identification (RFID) device. Voltage drops due to bridge diodes are avoided. Four p-channel transistors are arranged in a bridge across the A.C. inputs to produce an internal power voltage. A comparator receives the A.C. input and controls timing of voltage boost drivers that alternately drive gates of the four p-channel transistors with voltages boosted higher than the peak A.C. voltage. Four diode-connected transistors are connected in parallel with the four p-channel bridge transistors to conduct during initial start-up before the comparator and boost drivers operate. Substrates are connected to the power voltage on the power-voltage half of the bridge and to the A.C. inputs on the ground half of the bridge to fully shut off transistors, preventing reverse current flow. The transistor bridge can be integrated onto system chips.

Abstract: An energy dissipating device configured to connect to a power supply and to dissipate excess energy from a direct current (DC) rail in response to a change in power supply settings or operating characteristics. The energy dissipating device is connected to the DC rail, which conducts current generated by an AC/DC converter to at least one DC/DC converter. When power demand to the DC/DC converter is reduced, the DC/DC converter generates a supplemental current surge on the DC rail. A rail current monitor monitors the current level on the DC rail and generates the DC rail power signal indicative of the supplemental current surge level generated by the at least one DC/DC converter. The supplemental surge current is used to control dissipative elements connected across the DC rail to modulate a current sink path across the DC rail to dissipate the excess energy from the DC rail.

Abstract: A power converter providing required hold up for a primary converter, particularly a cycloconverter, without the required hold up capacity by an auxiliary converter including storage capacitors having the requisite capacity. The auxiliary converter may be isolated from the primary converter during normal operation and switched in during power supply discontinuities. The storage capacitors may be charged via a voltage step up circuit to achieve improved charge utilization. The storage capacitors may be charged via a charge path independent of the auxiliary converter output path so that the storage capacitor charging rate may be set independently.

Abstract: A semiconductor device comprises first and second global bit lines, a sense amplifier amplifying a voltage difference of the first and second global bit lines, first and second local bit lines corresponding to the first and second global bit lines, and first and second hierarchical switches controlling electrical connections between the first and second global bit lines and the first and second local bit line. In a precharge operation prior to accessing a selected memory cell belong to the first local bit lines, a pair of the first and second hierarchical switches, which is not in an access path, is kept ON, and remaining ones thereof are kept OFF. Subsequently, in an access to the selected memory cell, a first hierarchical switch of the pair is switched from ON to OFF, and simultaneously a first hierarchical switches in the access path is switched from OFF to ON.

Abstract: A stack that includes non-volatile memory devices is disclosed. One of the non-volatile memory devices in the stack is a master device, and the remaining memory device or devices is a slave device(s).

Abstract: A semiconductor memory device includes a plurality of first regions formed in a line-type and extending in a first direction, and a plurality of second regions and a plurality of third regions arranged between adjacent first regions in a zigzag manner.

Abstract: A 3D phase change memory device can store multiple bits per cell represented by a plurality of non-overlapping ranges of resistance all of which are established by different resistance ranges corresponding to respective amorphous phase thickness of the phase change memory material. An array of access devices can underlie a plurality of conductive layers, separated from each other and from the array of access devices by insulating layers. An array of pillars extending through the plurality of conductive layers contact corresponding access devices. The phase memory material is between the pillars and conductive layers. Circuitry is configured to program data in the memory cells using programming pulses having shapes that depend on the resistance range of the cell before programming and the data values to be stored.

Abstract: Apparatus and methods of increasing the data rate and bandwidth of system memory including stacked memory device dice. The system memory includes a memory device having a plurality of memory device dice in a stacked configuration, a memory controller coupled to the stacked memory device dice, and a partitioned data bus. The memory device dice each include one, two, or more groups of memory banks. By configuring each memory device die to deliver all of its bandwidth over a different single partition of the data channel, the system memory can achieve an increased data rate and bandwidth without significantly increasing costs over typical system memory configurations that include stacked memory device dice.

Abstract: A one-time programmable memory includes a first one-time programmable memory cell including a fuse core having an input terminal for receiving a trim signal, an output terminal for providing a sense signal, and a fuse. The fuse core conducts current through the fuse in response to the trim signal. The one-time programmable memory cell also includes a sense circuit having an input terminal coupled to the output terminal of the fuse core, and an output terminal for providing a termination signal, and a logic circuit having a first input terminal for receiving a program enable signal, a second input terminal for receiving a data signal, a third input terminal coupled to the output terminal of the sense circuit for receiving the termination signal, and an output terminal coupled to the input terminal of the fuse core for providing the trim signal.

Abstract: In an embodiment of the invention, a method is provided for isolating a ferroelectric memory from a power supply during a write-back cycle or a write cycle of the ferroelectric memory. After it is determined that a write-back cycle or a write cycle will occur in the ferroelectric memory, the power supply is electrically disconnected from the ferroelectric memory before a write-back cycle or a write cycle occurs. Energy during the write-back cycle or the write cycle is provided to the ferroelectric memory by one or more capacitors in this embodiment. After the write-back cycle or the write cycle has ended, the power supply is electrically connected to the ferroelectric memory and the capacitors.

Abstract: A ferroelectric memory having a plurality of ferroelectric memory cells, each ferroelectric memory cell including a ferroelectric capacitor is disclosed. The ferroelectric memory includes read and write lines and a plurality of ferroelectric memory cell select buses, one select bus corresponding to each of the ferroelectric memory cells. Each of the ferroelectric memory cells includes first and second gates for connecting the ferroelectric memory cell to the read line and the write line, respectively, in response to signals on the ferroelectric memory cell select bus corresponding to that ferroelectric memory cell. A write circuit causes a charge to be stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the write line, the charge having a value determined by a data value having at least three states.

Abstract: A nonvolatile semiconductor memory device comprises a cell array including a plurality of first lines, a plurality of second lines intersecting the plurality of first lines, and a plurality of memory cells arranged in matrix and connected at intersections of the first and second lines between both lines, each memory cell containing a serial circuit of an electrically erasable programmable variable resistive element of which resistance is nonvolatilely stored as data and a non-ohmic element; and a plurality of access circuits operative to simultaneously access the memory cells physically separated from each other in the cell array.

Abstract: Resistance variable memory cells having a plurality of resistance variable materials and methods of operating and forming the same are described herein. As an example, a resistance variable memory cell can include a plurality of resistance variable materials located between a plug material and an electrode material. The resistance variable memory cell also includes a first conductive material that contacts the plug material and each of the plurality of resistance variable materials and a second conductive material that contacts the electrode material and each of the plurality of resistance variable materials.

Abstract: A semiconductor memory device selects one of a plurality of memory cells as a dummy memory cell. The dummy memory cell is connected to a bit line that is complementary to a bit line connected to a selected memory cell. This technique advantageously compensates capacitance of the bit line. The semiconductor memory device comprises a selected memory cell connected to a first bit line and a first word line, a dummy memory cell connected to a second bit line complementary to the first bit line and a second word line, and a sense amplifier connected to the first and second bit lines and configured to read data stored in the selected memory cell by simultaneously enablement of the first and second word lines.

Abstract: A memory device which can keep a stored logic state even when the power is off is provided. A signal processing circuit including the memory device, which achieves low power consumption by stopping supply of power, is provided. The memory device includes a logic circuit including a first node, a second node, a third node, and a fourth node; a first control circuit connected to the first node, the second node, and the third node; a second control circuit connected to the first node, the second node, and the fourth node; a first memory circuit connected to the first node, the first control circuit, and the second control circuit; and a second memory circuit connected to the second node, the first control circuit, and the second control circuit.