Abstract: A system and method for producing Syngas from the CO2 in a gaseous stream, such as an exhaust stream, from a power plant or industrial plant, like a cement kiln, is disclosed. A preferred embodiment includes providing the gaseous stream to pyrolysis reactor along with a carbon source such as coke. The CO2 and carbon are heated to about 1330° C. and at about one atmosphere with reactants such as steam such that a reaction takes place that produces Syngas, carbon dioxide (CO2) and hydrogen (H2). The Syngas is then cleaned and provided to a Fischer-Tropsch synthesis reactor to produce Ethanol or Bio-catalytic synthesis reactor.

Abstract: The present invention relates to novel expression cassettes and vectors for efficiently producing authentic recombinant human proteins from stable cultures of novel human cell lines, the authentic recombinant proteins produced therefrom, and antibodies raised against those authentic recombinant proteins.

Abstract: Targeting constructs and methods of using them are provided for differentiation-dependent modification of nucleic acid sequences in cells and in non-human animals. Targeting constructs comprising a promoter operably linked to a recombinase are provided, wherein the promoter drives transcription of the recombinase in an differentiated cell but not an undifferentiated cell. Promoters include Blimp1, Prm1, Gata6, Gata4, Igf2, Lhx2, Lhx5, and Pax3. Targeting constructs with a cassette flanked on both sides by recombinase sites can be removed using a recombinase gene operably linked to a 3?-UTR that comprises a recognition site for an miRNA that is transcribed in undifferentiated cells but not in differentiated cells. The constructs may be included in targeting vectors, and can be used to automatically modify or excise a selection cassette from an ES cell, a non-human embryo, or a non-human animal.

Abstract: A chimeric protein is made from the combination of (i) a pathogen recognition module derived from a scavenger receptor and (ii) an anchor domain from a different scavenger receptor. The chimeric protein binds to specific pathogens and is useful in various treatments.

Abstract: The present invention relates to antibodies capable of binding to the coagulation Factor XI and/or its activated form factor XIa and methods of use thereof, particularly methods of use as agents inhibiting platelet aggregation and by this inhibits thrombus formation.

Abstract: The present invention provides compositions and methods for treating cancer in a human. The invention includes relates to administering a genetically modified T cell to express a CAR wherein the CAR comprises an antigen binding domain, a transmembrane domain, a costimulatory signaling region, and a CD3 zeta signaling domain.

Abstract: Methods and compositions for directing adipose-derived stromal cells cultivated in vitro to differentiate into cells of the chondrocyte lineage are disclosed. The invention further provides a variety of chondroinductive agents which can be used singly or in combination with other nutrient components to induce chondrogenesis in adipose-derived stromal cells either in cultivating monolayers or in a biocompatible lattice or matrix in a three-dimensional configuration. Use of the differentiated chondrocytes for the therapeutic treatment of a number of human conditions and diseases including repair of cartilage in vivo is disclosed.

Abstract: The present invention relates to a cell culture medium and more particularly, to a safe, stable, and effective cell culture medium for cell therapy products.

Abstract: The present invention provides recombinant proteins comprising the amino acid sequence of an intracellular segment of CD40 and an amino acid sequence mediating the association of the recombinant protein with the constant region of an immunoglobulin heavy chain. The recombinant proteins according to the present invention are useful for inducing clonal expansion of a B cell having a predetermined antigen-specificity without the need for T cell or CD40L mediated co-stimulation. Thus, the present invention provides tools for clonal expansion of B cells specific for an antigen of interest and the production of B cells secreting antibodies specific for an antigen of interest. The recombinant proteins of the present invention may also be used for generating fully human monoclonal antibodies with a predetermined antigen-specificity from the B cell repertoire of a human subject.

Abstract: A colorimetric wet chemistry analyzer for determining a concentration of an analyte of interest in a sample is provided. The analyzer comprising includes a reaction chamber configured to receive the sample and facilitate a reaction that changes a color of the sample based on the concentration of the analyte of interest. A photometric cell is operably coupled to the reaction chamber to receive the sample and direct illumination therethrough. The photometric cell has a first illumination source configured to provide illumination at a first wavelength through the photometric cell and a second illumination source configured to provide illumination at a second wavelength through the photometric cell. The second wavelength is different than the first wavelength. A photo detector is configured to detect illumination passing through the photometric cell.

Abstract: An online colorimetric analyzer that generates an indication of a material in a sample is provided. The analyzer includes a peristaltic pump configured to convey. A photometric cell is operably coupled to the peristaltic pump to receive the sample. An illumination source is disposed to direct illumination through the sample in the photometric cell along an angle of incidence. A photodetector disposed to receive illumination passing through the photometric cell along the angle of incidence and provide a signal indicative of a color of the sample. A controller is coupled to the illumination source, the photodetector and the peristaltic pump. The photometric cell is tilted relative to vertical such that a surface of liquid present when the photometric cell is partially filled substantially reflects the illumination away from the angle of incidence.

Abstract: Methods and assays for detecting S-sulfhydration of amino acids in proteins, polypeptides and peptides are provided. The method is a two-step “tag-switch” method employing two reagents consecutively to specifically label, with a detectable label, persulfide (—S—SH) linkages in proteins, polypeptides and peptides.

Abstract: A reading device for reading and analyzing a test cassette having an identification code includes a reading unit, used for reading the identification code marked by the test cassette and carrying out interpretation on a plurality of test lines of the test cassette; an operating unit, used for operating the reading device; a processing unit, used for interpreting a test result with the identification code and the test lines; and a display unit, used for displaying the test result of the test cassette.

Abstract: A method of authenticating includes providing a glucose test strip having a top surface with a reagent thereon that has a structure which chemically reacts with glucose and an anti-counterfeiting identification feature (identification feature) including at least one ink. The glucose test strip is inserted into a glucose meter. The glucose meter includes a light source positioned to shine light on the ink after the inserting, a photodetector positioned to detect a reflected or transmitted signal after interaction with the ink, and stored information that identifies the identification feature. A processor implementing an algorithm automatically analyzes the reflected or transmitted signal by reference to the stored information to determine whether the glucose test strip is authentic.

Abstract: Nanoporous polymorphic crystals of CaCO3 were used as sorbent and were applied in the dispersive micro-solid-phase extraction of selected polycyclic aromatic hydrocarbons as target analytes. After separation of the analytes on gas chromatography, they were successfully quantified with external calibration using flame ionization detection. Performance of the dispersive micro-solid-phase extraction was compared with a previously optimized solid-phase extraction technique.

Abstract: Disclosed is a multi-channel light measurement system adapted to illuminate and measure a test sample in a vessel. The multi-channel light measurement system has at least one photodetector per channel and a variable integrate and hold circuit coupled to each photodetector, the variable integrate and hold circuit allows adjustment of a sampling factor selected from a group of an integration time, a value of capacitance, an area of a discrete photodetector array, or any combination thereof. The system may readily equilibrate reference intensity output for multiple channels. Methods and apparatus are disclosed, as are other aspects.

Abstract: A sample port system/device associated with a fluid collection device is provided and is configured to receive fluid-containing devices of varying diameters. A method of improving the work flow and safety involved in acquiring and/or testing fluid samples using such sample port system/device is also provided.

Abstract: This invention is in the field of medical devices. Specifically, the present invention provides portable medical devices that allow real-time detection of analytes from a biological fluid. The methods and devices are particularly useful for providing point-of-care testing for a variety of medical applications.

Abstract: Process for normalizing the concentration of at least one analyte in a urine sample, comprising the following steps: a) determining the concentration of at least one analyte; b) determining the concentration of at least one collagen or collagen fragment; c) normalizing the concentration of said at least one analyte relative to the concentration of said at least one collagen or collagen fragment.

Abstract: A method for producing a plurality of optoelectronic components may include measuring at least one measurement parameter for a first optoelectronic component and a second optoelectronic component, and processing the first optoelectronic component and the second optoelectronic component taking account of the measured measurement parameter value of the first optoelectronic component and the measured measurement parameter value of the second optoelectronic component, such that the optoelectronic properties of the first optoelectronic component and the optoelectronic properties of the second optoelectronic component are changed in a different way toward at least one common predefined optoelectronic target property. The processing of at least one value of a measurement parameter of the optoelectronic properties of the first optoelectronic component or of the optoelectronic properties of the second optoelectronic component toward the optoelectronic target property is formed by means of a compensation element.

Abstract: Etch rate distribution non-uniformities are predicted for a succession of hardware tilt angles of the RF source applicator relative to the workpiece, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.

Abstract: Embodiments of mechanisms of monitoring metal impurity in a high-k dielectric film are provided. The method includes forming an interfacial layer over a substrate. The method also includes forming a high-k dielectric film on the interfacial layer, and the interfacial layer and the high-k dielectric film form a stacked structure over the substrate. The method further includes conducting the first thickness measurement on the stacked structure. In addition, the method includes performing a treatment to the stacked structure after the first thickness measurement, and the treatment includes an annealing process. The method also includes conducting the second thickness measurement on the stacked structure after the treatment.

Abstract: A method of forming a metal bonding layer includes forming first and second bonding metal layers on one surfaces of first and second bonding objects, respectively. The second bonding object is disposed on the first bonding object such that the first bonding metal layer and the second bonding metal layer face each other. A eutectic metal bonding layer is formed through a reaction between the first and second bonding metal layers. At least one of the first bonding metal layer and the second bonding metal layer includes an oxidation prevention layer formed on an upper surface thereof. The oxidation prevention layer is formed of a metal having an oxidation reactivity lower than an oxidation reactivity of the bonding metal layer on the upper surface which the oxidation prevention layer is disposed.

Abstract: A surface emitting semiconductor laser includes a substrate, a first conductivity-type first semiconductor multilayer reflector, an active layer, a semiconductor layer, a second conductivity-type second semiconductor multilayer reflector that includes a current confinement layer, and a heat dissipating metal member. At least the first semiconductor multilayer reflector, the active layer, the semiconductor layer, and the second semiconductor multilayer reflector are stacked in this order on the substrate. A columnar structure having a top portion, a side surface, and a bottom portion is formed from the second semiconductor multilayer reflector to the semiconductor layer. The heat dissipating metal member is connected to the semiconductor layer exposed at the bottom portion of the columnar structure.

Abstract: A method for fabricating a photonic composite device for splitting functionality across materials comprises providing a composite device having a platform and a chip bonded in the platform. The chip is processed comprising patterning, etching, deposition, and/or other processing steps while the chip is bonded to the platform. The chip is used as a gain medium and the platform is at least partially made of silicon.

Abstract: A method for forming LED package comprises providing a substrate with a first conductive type through-hole and a second conductive type through-hole through the substrate. A reflective layer is formed on an upper surface of the substrate. A LED die is provided with a first conductive type pad and a second conductive type pad formed on a lower surface and an upper surface of the LED die, respectively. The LED die is adhered on the substrate. A slanting structure of dielectric layer is formed adjacent at least one side of the LED die for carrying conductive traces. A re-distribution layer conductive trace is formed on upper surface of the slanting structure to offer path between the second conductive type pad and the conductive type through-hole.

Abstract: Disclosed embodiments include a manufacturing method for an LED assembly. Providing a first carrier, wherein several LED chips are formed on the first carrier, and providing a second carrier. Attaching the second carrier to the LED chips and detaching the first carrier from the LED chips but leaving the LED chips on the second carrier.

Abstract: A method for fabricating a microstructure to generate surface plasmon waves comprises steps of: preparing a substrate, and using a carrier material to carry a plurality of metallic nanoparticles and letting the metallic nanoparticles undertake self-assembly to form a microstructure on the substrate, wherein the metallic nanoparticles are separated from each other or partially agglomerated to allow the microstructure to be formed with a discontinuous surface. The present invention fabricates the microstructure having the discontinuous surface by a self-assembly method to generate the surface plasmon waves, thus exempts from using the expensive chemical vapor deposition (CVD) technology and is able to reduce the time and cost of fabrication. The present invention also breaks the structural limitation on generation of surface plasmon waves to enhance the effect of generating the surface plasmon waves.

Abstract: An organic light emitting display device includes a substrate and a plurality of pixels defined in the substrate. A pixel includes red subpixel, green subpixel, blue subpixel, and white subpixel. The organic light emitting display device includes an anode electrode formed on the substrate, a cathode electrode opposing the anode electrode, and a red common emission layer, a green common emission layer, and a blue common emission layer formed across each of the red, green, blue and white subpixel areas. The blue common emission layer is disposed above and adjacent to the anode electrode, the green common emission layer is disposed above the blue common emission layer, and the red common emission layer is disposed above the green common emission layer and adjacent to the cathode electrode.

Abstract: A stack is obtained by stacking a glass plate, a first transparent resin sheet, a solar cell, a second transparent resin sheet, a colored resin sheet, and a first resin sheet. The stack is pressed under heat to fabricate a module including the glass plate, a first transparent bonding layer placed between the glass plate and the solar cell and formed of the first transparent resin sheet, a second transparent bonding layer placed between the first resin sheet and the solar cell and formed of the second transparent resin sheet, a colored bonding layer placed between the second transparent bonding layer and the first resin sheet and formed of the colored resin sheet, and the first resin sheet. A loss modulus of the colored resin sheet at a temperature of the pressing is higher than a loss modulus of the first transparent resin sheet at the temperature of the pressing.

Abstract: A method of fabricating on a semiconductor substrate bifacial tandem solar cells with semiconductor subcells having a lower bandgap than the substrate bandgap on one side of the substrate and with subcells having a higher bandgap than the substrate on the other including, first, growing a lower bandgap subcell on one substrate side that uses only the same periodic table group V material in the dislocation-reducing grading layers and bottom subcells as is present in the substrate and after the initial growth is complete and then flipping the substrate and growing the higher bandgap subcells on the opposite substrate side which can be of different group V material.

Abstract: The present invention relates to a method for enhancing the conductivity of an undoped transparent metal oxide to obtain a transparent conductive oxide (TCO) electrode. More in particular it relates to such a method comprising the steps of providing a transparent metal oxide, applying a UV transparent barrier layer on the transparent metal oxide, and irradiating the transparent metal oxide with UV radiation after applying the barrier layer.

Abstract: A method for manufacturing a solar cell, comprising the steps of: a) providing a semiconductor substrate having a light-receiving side and a back side, wherein a passivation layer is formed on the back side; b) forming a silver conductor pattern comprising a metal resinate on the back side of the semiconductor substrate; c) forming an aluminum conductor pattern on the back side of the semiconductor substrate, at least part of the aluminum conductor pattern being superimposed on at least part of the silver conductor pattern; and d) firing the silver conductor pattern and the aluminum conductor pattern at the same time, thereby forming an electric contact between the semiconductor substrate and the aluminum conductor pattern by way of fire through in a region where the silver conductor pattern and the aluminum conductor pattern are superimposed.

Abstract: An etching solution includes: phosphoric acid having concentration of 30% by weight to 80% by weight; nitric acid having concentration of 10% by weight or less; and surfactant having concentration of 0.0005% by weight to 0.0050% by weight, wherein the etching solution is used for etching an aluminum oxide film having film density of 2.80 g/cm3 to 3.25 g/cm3.

Abstract: A method includes attaching a partially processed CMOS wafer to a second wafer to produce a combined wafer. The second wafer comprises a first region including a material different from silicon. The method also includes forming devices in the first region or in a second region of the combined wafer having a material different from silicon.

Abstract: Fabricating a packaged semiconductor device provides first planar leadframe with first leads and pads having attached electronic components. The first leadframe has a set of elongated leads bent at an angle away from the plane of the first leadframe. A second planar leadframe has second leads having attached electronic components. The bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes.

Abstract: The present disclosure is directed to the use of glass wafers as carriers, interposers, or in other selected applications in which electronic circuitry or operative elements, such as transistors, are formed in the creation of electronic devices. The glass wafers generally include a glass having a coefficient of thermal expansion equal to or substantially equal to a coefficient of thermal expansion of semiconductor silicon, an indexing feature, and a coating on at least a portion of one face of the glass.

Abstract: Even when a stiffener is omitted, the semiconductor device which can prevent the generation of twist and distortion of a wiring substrate is obtained. As for a semiconductor device which has a wiring substrate, a semiconductor chip by which the flip chip bond was made to the wiring substrate, and a heat spreader adhered to the back surface of the semiconductor chip, and which omitted the stiffener for reinforcing a wiring substrate and maintaining the surface smoothness of a heat spreader, a wiring substrate has a plurality of insulating substrates in which a through hole whose diameter differs, respectively was formed, and each insulating substrate contains a glass cloth.

Abstract: Provided are a resin composition and a substrate that are capable of being used for producing an electronic device including thin-film transistors having an excellent switching property. The resin composition contains an aromatic polyamide and a solvent dissolving the aromatic polyamide. The resin composition is used to form a layer, and a total light transmittance of the layer in a wavelength of 355 nm is 10% or less. Further, a method of manufacturing the electronic device using such a substrate is also provided.

Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.

Abstract: A method for forming a complementary metal oxide semiconductor (CMOS) semiconductor device includes providing a stressed silicon-on-insulator (sSOI) wafer comprising a stressed semiconductor layer having first and second laterally adjacent stressed semiconductor portions. The first stressed semiconductor portion defines a first active region. The second stressed semiconductor portion is replaced with an unstressed semiconductor portion. The unstressed semiconductor portion includes a first semiconductor material. The method further includes driving a second semiconductor material into the first semiconductor material of the unstressed semiconductor portion defining a second active region.

Abstract: A method for forming a complementary metal oxide semiconductor (CMOS) semiconductor device includes forming laterally adjacent first and second active regions in a semiconductor layer of a silicon-on-insulator (SOI) wafer. A stress inducing layer is formed above the first active region to impart stress thereto. Trench isolation regions are formed bounding the first active region and adjacent portions of the stress inducing layer. The stress inducing layer is removed leaving the trench isolation regions to maintain stress imparted to the first active region.

Abstract: Methods of manufacturing semiconductor integrated circuits having FinFET structures with epitaxially formed source and drain regions are disclosed. A method of fabricating an integrated circuit includes forming a plurality of silicon fin structures on a semiconductor substrate, epitaxially growing a silicon material on the fin structures, wherein a merged source/drain region is formed on the fin structures, and anisotropically etching at least one of the merged source drain regions to form an un-merged source/drain region.

Abstract: A nonvolatile memory device includes a substrate; a channel layer projecting from a surface of the substrate, in a direction perpendicular to the surface; a tunnel dielectric layer surrounding the channel layer; a plurality of interlayer dielectric layers and a plurality of control gate electrodes alternately formed along the channel layer; floating gate electrodes interposed between the tunnel dielectric layer and the plurality of control gate electrodes, the floating gate electrodes comprising a metal-semiconductor compound; and a charge blocking layer interposed between each of the plurality of control gate electrodes and each of the plurality of floating gate electrodes.

Abstract: A non-volatile memory device includes first and second vertical channel layers generally protruding upwardly from a semiconductor substrate substantially in parallel; a first gate group configured to include a plurality of memory cell gates which are stacked substantially along the first vertical channel layer and are isolated from each other with an interlayer insulating layer interposed substantially between the memory cell gates; a second gate group configured to include a plurality of memory cell gates which are stacked substantially along the second vertical channel layer and are isolated from each other with the interlayer insulating layer interposed substantially between the memory cell gates; a pipe channel layer configured to couple the first and the second vertical channel layers; and a channel layer extension part generally extended from the pipe channel layer to the semiconductor substrate and configured to couple the pipe channel layer and the semiconductor substrate.

Abstract: A non-volatile memory device includes a channel layer vertically extending from a substrate, a plurality of inter-layer dielectric layers and a plurality of gate electrodes that are alternately stacked along the channel layer, and an air gap interposed between the channel layer and each of the plurality of gate electrodes. The non-volatile memory device may improve erase operation characteristics by suppressing back tunneling of electrons by substituting a charge blocking layer interposed between a gate electrode and a charge storage layer with an air gap, and a method for fabricating the non-volatile memory device.

Abstract: Embodiments of the present invention provide improved methods for fabricating field effect transistors such as finFETs. Stressor regions are used to increase carrier mobility. However, subsequent processes such as deposition of flowable oxide and annealing can damage the stressor regions, diminishing the amount of stress that is induced. Embodiments of the present invention provide a protective layer of silicon or silicon oxide over the stressor regions prior to the flowable oxide deposition and anneal.

Abstract: A method for producing a polysilicon resistor device may include: forming a polysilicon layer; implanting first dopant atoms into at least a portion of the polysilicon layer, wherein the first dopant atoms include deep energy level donors; implanting second dopant atoms into said at least a portion of said polysilicon layer; and annealing said at least a portion of said polysilicon layer.

Abstract: Forming a shallow trench isolation (STI) structure filled with a flowable dielectric layer involves performing an implant to generate passages in the upper portion of the flowable dielectric layer. The passages enable oxygen source in a thermal anneal to reach the flowable dielectric layer near the bottom of the STI structure during the thermal anneal to convert a SIONH network of the reflowable dielectric layer to a network of SiOH and SiO. The passages also help to provide escape paths for by-products produced during another thermal anneal to convert the network of SiOH and SiO to SiO2.

Abstract: A semiconductor memory device includes a plurality of auxiliary patterns formed over a semiconductor substrate, a plurality of gate line patterns disposed in parallel with one another over the semiconductor substrate between the plurality of auxiliary patterns, and an air gap formed between the plurality of gate line patterns and between each of the plurality of gate line patterns and each of the auxiliary patterns.