Abstract: A solar cell module comprises a solar cell soldered to a mounting element, such as a ceramic substrate. The solder bond can comprise a void. A method of reducing a solder void comprises reflowing the solder using a vacuum source and a heat source in a sealed chamber. The chamber is formed, at least in part, by a cowling into which the solar cell module is mounted. A system for reducing voids in a solder bond comprises a heat source and a vacuum source coupled to the sealed chamber into which a solar cell module is placed. The system can optionally include a control system that automates the execution of methods of reducing solder voids. The system can further include a pressure source to aid in reducing the solder void and reflowing the solder after the void is reduced.

Abstract: An optical touchscreen assembly may employ a photonic chip packaged with a chip surface at an angle inclined between horizontal and vertical orientations. An inclined paddle sawn flat no-leads (IPSFN) package may be affixed to a cover glass surface along a perimeter of a display. IPSFN packages may incorporate a photo-emitter chip and a photo-detector chip that may be inclined for a desired angle of incidence relative to the cover glass. A CMOS integrated optical transceiver package may include inclined photonic chips and a non-inclined CMOS chip having at least one of a photo-emitter driver, or a photo-detector TIA and/or ADC. A chip package lead frame may include cantilevered paddle tabs amenable to controlled deflection during package assembly. An inclined packaging assembly method may include attaching a chip to a lead frame paddle and form pressing the lead frame to incline the chip to a desired angle before encapsulation.

Abstract: Methods of fabricating solar cells are described. A porous layer may be formed on a surface of a substrate, the porous layer including a plurality of particles and a plurality of voids. A solution may be dispensed into one or more regions of the porous layer to provide a patterned composite layer. The substrate may then be heated.

Abstract: Methods are described for depositing thin films, such as those used in forming a photovoltaic cell or device. In particular embodiments, one or more layers are deposited on a substrate by plasma spraying over the substrate. A grain size of grains in each of the one or more layers is at least approximately two times greater than a thickness of the respective layer. Accordingly, large flat-grained structures are formed in each respective layer, and grain boundaries within each respective layer can be minimized.

Abstract: The present invention relates to a high-output apparatus for manufacturing a polycrystal silicon ingot for a solar cell, and more particularly, to an apparatus for manufacturing a polycrystal silicon ingot by means of heating and melting raw silicon in a vacuum chamber, and then cooling the molten silicon, wherein the apparatus comprises: a plurality of crucibles arranged so as to be horizontally separated from one another within the vacuum chamber, and in each of which raw silicon is filled for manufacturing polycrystal silicon ingots; heating means provided at the outside of each of the crucibles so as to heat each crucible and melt the raw silicon filled therein; and cooling means for cooling the crucibles, so as to enable the silicon melted by the heating means to be cooled in one direction and be formed into polycrystal ingots.

Abstract: Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a back contact solar cell includes a crystalline silicon substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region is disposed above the crystalline silicon substrate. The first polycrystalline silicon emitter region is doped with dopant impurity species of a first conductivity type and further includes ancillary impurity species different from the dopant impurity species of the first conductivity type. A second polycrystalline silicon emitter region is disposed above the crystalline silicon substrate and is adjacent to but separated from the first polycrystalline silicon emitter region. The second polycrystalline silicon emitter region is doped with dopant impurity species of a second, opposite, conductivity type.

Abstract: A material stack including an ohmic contact layer and a single crystalline semiconductor base substrate of a first conductivity type and having a surface Fermi level pinned close to a band edge (either the conduction band or valence band) is first provided. A stressor layer is then formed above the ohmic contact layer and a material portion of the single crystalline semiconductor base substrate is removed by a process referred to as spalling. A transparent conductive oxide layer is then formed on an exposed surface of the material portion of the single crystalline semiconductor base substrate that was removed by spalling.

Abstract: A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.

Abstract: A method for making a LED comprises following steps. A substrate having a surface is provided. A first semiconductor layer, an active layer and a second semiconductor pre-layer is formed on the surface of the substrate. A patterned mask layer is applied on a surface of the second semiconductor pre-layer. A number of three-dimensional nano-structures is formed on the second semiconductor pre-layer and the patterned mask layer is removed. The substrate is removed and a first electrode is formed on a surface of the first semiconductor layer away from the active layer. A second electrode is formed to electrically connect with the second semiconductor pre-layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor laminated body provided on a semiconductor substrate. The semiconductor laminated body includes a light emitting layer. The light emitting layer includes a quantum well structure made by alternately laminating n (an integer of not less than 1) well layers and (n+1) barrier layers and emits light with a peak wavelength of 650 nm to 1000 nm. Each of the well layers has a thickness of smaller than 15 nm. Each of the barrier layers has a thickness of 15 nm to 50 nm.

Abstract: There is provided an inorganic layer light-emitting device including: a light-emitting layer including an emission body made of an inorganic material; and a metal-based particle assembly layer being a layer consisting of a particle assembly including 30 or more metal-based particles separated from each other and disposed in two-dimensions, said metal-based particles having an average particle diameter in a range of from 200 to 1600 nm, an average height in a range of from 55 to 500 nm, and an aspect ratio in a range of from 1 to 8, and said metal-based particles that compose said metal-based particle assembly layer are disposed such that an average distance between adjacent metal-based particles is in a range of from 1 to 150 nm. The inorganic layer light-emitting device exhibits high luminous efficiency through emission enhancement and improvement in light extraction efficiency.

Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a p-type layer, and a light emitting unit provided between the n-type layer and the p-type layer and including barrier layers and well layers. At least one of the barrier layers includes first and second portion layers. The first portion layer is disposed on a side of the n-type layer. The second portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the first portion layer. At least one of the well layers includes third and fourth portion layers. The third portion layer is disposed on a side of the n-type layer. The fourth portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the third portion layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.

Abstract: A light-emitting diode is provided, including an active semiconductor area for the radiative recombination of electron-hole pairs having a plurality of nanowires, each made of an unintentionally doped semiconductor material, a first semiconductor area for radially injecting holes into each nanowire, the first semiconductor area being made of a doped semiconductor material having a first conductivity type and having a bandgap that is greater than the bandgap of the semiconductor material of the nanowires, and a second semiconductor area for axially injecting electrons into each nanowire, the second semiconductor area being made of a doped semiconductor material having a second conductivity type that is opposite to that of the first conductivity type.

Abstract: A method for fabrication a light emitting diode (LED) includes forming alternating material layers on an LED structure, formed on a substrate, to form a reflector on a back side opposite the substrate. A handle substrate is adhered to a stressor layer deposited on the reflector. The LED structure is separated from the substrate using a spalling process to expose a front side of the LED structure.

Abstract: A semiconductor structure includes a silicon substrate, a buffer layer, a nitride-based epitaxial structure layer and multiple discontinuous strain-releasing layers. The buffer layer is disposed on the silicon substrate. The nitride-based epitaxial structure layer is disposed on the buffer layer. The discontinuous strain-releasing layers are disposed between the silicon substrate and the nitride-based epitaxial structure layer, wherein a material of the discontinuous strain-releasing layers is silicon nitride.

Abstract: A light emitting diode (LED) for achieving an asymmetric light output includes a multilayered structure comprising a p-n junction, where at least one layer of the multilayered structure comprises a surface configured to provide a peak emission in a direction away from a normal to a mounting surface, the surface being a top or bottom surface of the layer.

Abstract: A light emitting diode (100 or 150) includes a diode structure containing a quantum well (120), an enhancement layer (142), and a barrier layer (144 or 148) between the enhancement layer (142) and the quantum well (120). The enhancement layer (142) supports plasmon oscillations at a frequency that couples to photons produced by combination of electrons and holes in the quantum well (120). The barrier layer serves to block diffusion between the enhancement layer (142) and the diode structure.

Abstract: A method is provided for preparing luminescent semiconductor nanoparticles composed of a first component X, a second component A, and a third component B, wherein X, A, and B are different, by combining B with X and A in an amount such that the molar ratio B:(A+B) is in the range of approximately 0.001 to 0.20 and the molar ratio X:(A+B) is in the range of approximately 0.5:1.0 to 2:1. The characteristics of the thus-prepared nanoparticles can be substantially similar to those of nanoparticles containing only X and B while maintaining many useful properties characteristic of nanoparticles containing only X and A. The nanoparticles so prepared can additionally exhibit emergent properties such as a peak emission energy less than that characteristic of a particle composed of XA or XB alone; this method is particularly applicable to the preparation of stable, bright nanoparticles that emit in the red to infrared regions of the electromagnetic spectrum.

Abstract: The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission output. The light-emitting device comprises an n-type contact layer on which an n-electrode is formed, a light-emitting layer, an n-type cladding layer formed between the light-emitting layer and the n-type contact layer. The n-type cladding layer has a structure of at least two layers including a first n-type cladding layer closer to the light-emitting layer and a second n-type cladding layer farther from the light-emitting layer than the first n-type cladding layer. The first n-type cladding layer has a Si concentration higher than that of the second n-type cladding layer, and the first n-type cladding layer has a thickness smaller than that of the second n-type cladding layer.

Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a p-side metal pillar, an n-side metal pillar, and an insulator. The semiconductor layer includes a first surface, a second surface opposite to the first surface, and a light emitting layer. The p-side metal pillar includes a p-side external terminal. The n-side metal pillar includes an n-side external terminal. At least one selected from an area and a planar configuration of the p-side external terminal is different from at least one selected from an area and a planar configuration of the n-side external terminal.

Abstract: An electric contact structure adopted for an LED comprises a nitride middle layer and an N-type metal electrode layer. The LED includes an N-type semiconductor layer, a light emission layer and a P-type semiconductor layer that are stacked to form a sandwich structure. The nitride middle layer is patterned and formed on the N-type semiconductor layer. The N-type metal electrode layer is formed on the nitride middle layer and prevented from being damaged by diffusion of the metal ions as the nitride middle layer serves as a blocking interface, thus electric property of the N-type semiconductor layer can be maintained stable. The nitride middle layer would not be softened and condensed due to long-term high temperature, thereby is enhanced adhesion. Moreover, the N-type metal electrode layer further can be prevented from peeling off, hence is increased the lifespan of the LED.

Abstract: A III nitride semiconductor light emitting device with improved light emission efficiency achieved without significantly increasing forward voltage by achieving both good ohmic contact between an electrode and a semiconductor layer, and sufficient functionality of a reflective electrode layer, and a method for manufacturing the same. The III nitride semiconductor light emitting device has a III nitride semiconductor laminate including an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer; an n-side electrode, a p-side electrode; and a composite layer having a reflective electrode portion and a contact portion made of AlxGa1-xN (0?x?0.05) on a second surface of the III nitride semiconductor laminate. The second surface is opposite to a first surface on the light extraction side.

Abstract: A light-emitting device includes: a light-emitting stack including a first surface and a second surface opposite to the first surface, wherein the light-emitting stack emits a light having a wavelength between 365 nm and 550 nm; and a first electrode formed on the first surface and comprising a first metal layer and a second metal layer alternating with the first metal layer, wherein the first electrode has a reflectivity larger than 95% for reflecting the light, and the second metal layer has a higher reflectivity index relative to the light than that of the first metal layer.

Abstract: A semiconductor light-emitting device having an electrode that can be manufactured by a simple method and is unlikely to deteriorate, and a method for forming the electrode are provided. The semiconductor light-emitting device according to the present invention has a semiconductor layered structure having a light-emitting layer that emits light by supplying electric power and an electrode formed on the semiconductor layered structure. The electrode has a reflection layer that reflects light exiting from the light-emitting layer, a barrier layer formed on the upper side and side surface of the reflection layer, and a pad layer formed only on the top surface of the barrier layer.

Abstract: The present invention provides a light-emitting element, a light-emitting device and an electronic device in which an optical path length through which generated light goes can be changed easily. The present invention provides a light-emitting element including a light-emitting layer between a first electrode and a second electrode, and a mixed layer in contact with the first electrode; in which the light-emitting layer includes a light-emitting substance; the mixed layer includes a hole transporting substance and a metal oxide showing an electron accepting property to the hole transporting substance, and has a thickness of 120 to 180 nm, and when a voltage is applied between the first electrode and the second electrode such that a potential of the first electrode is higher than that of the second electrode, the light-emitting substance emits light.

Abstract: Provided is a phosphor particle group of divalent europium-activated oxynitride green light emitting phosphor particles each of which is a ?-type SiAlON substantially represented by a general formula: EuaSibAlcOdNe, where 0.005?a?0.4, b+c=12, d+e=16, wherein 60% or more of the phosphor particle group is composed of the phosphor particles in which a value obtained by dividing a longer particle diameter by a shorter particle diameter is greater than 1.0 and not greater than 3.0. A high-efficiency and stable light emitting apparatus using a ?-type SiAlON, which includes a light converter using the phosphor particle group, and a phosphor particle group therefor are also provided.

Abstract: Various examples of a light emitting diode (LED) package structure and a manufacturing method thereof are described. In one aspect, a LED package structure includes a carrier, a LED chip, a first annular barricade, a second annular barricade and a fluorescent encapsulant. The LED chip is electrically connected to the carrier. The first annular barricade and the second annular barricade are disposed around the LED chip, with the second annular barricade disposed between the LED chip and the first annular barricade. The fluorescent encapsulant is disposed on the carrier and at least covers the LED chip and the second annular barricade. The fluorescent encapsulant includes at least a type of phosphor and at least a type of gel with the phosphor distributed over a surface of the LED chip.

Abstract: The present invention relates to a method of manufacturing an integrated piece comprising a convex cured product and a substrate, the method comprising a step of: depositing dropwise or dispensing a curable silicone composition onto the pre-heated substrate, the composition reaching a torque value of 1 dN·m within 60 seconds from immediately after beginning measurement as measured using a curelastometer according to JIS K 6300-2, at the temperature to which the substrate is heated, and having a viscosity at said temperature of at least 0.05 Pa·s. The method allows for the efficient manufacture of a hemispherical, hemicylindrical, dome-shaped, or similar convex cured product upon a substrate using a curable silicone composition.

Abstract: Disclosed is a layered product for fine pattern formation and a method of manufacturing the layered product for fine pattern formation, capable of easily forming a fine pattern having a thin or no remaining film in order to form a fine pattern having a high aspect ratio on a processing object. The layered product for fine pattern formation (1) of the present invention used to form a fine pattern (220) in a processing object (200) using a first mask layer (103) includes: a mold (101) having a concavo-convex structure (101a) on a surface; and a second mask layer (102) provided on the concavo-convex structure (101a), wherein in the second mask layer (102), a distance (lcc) and a height (h) of the concavo-convex structure (101a) satisfy Formula (1) 0<lcc<1.0 h, and a distance (lcv) and the height (h) satisfy Formula (2) 0?lcv?0.05 h.

Abstract: An epitaxial substrate includes: a base member; and a plurality of spaced apart light-transmissive members, each of which is formed on and tapers from an upper surface of the base member, and each of which is made of a light-transmissive material having a refractive index lower than that of the base member. A light-emitting diode having the epitaxial substrate, and methods for making the epitaxial substrate and the light-emitting diode are also disclosed.

Abstract: An LED package including a collimator body adapted to collect and/or reflect and/or focus light. An upper plane provided by the collimator body defines a mainly horizontal plane. At least one reflection surface is provided by the collimator body and is at least partially angled to the horizontal plane. The collimator body includes a recess for receiving a lighting element including a light emitting front face such that the reflection surface extends at least partially below the level of the front face in an assembled state. Due to the angle of the reflection surface with respect to the horizontal plane of the collimator body, a small light source and a high luminous flux at the same time are provided so that the luminance and the brightness of the LED package are increased.

Abstract: A semiconductor light-emitting device includes a semiconductor region having a light-emitting structure, an electrode layer formed on the semiconductor region, and a reflective protection structure extending exposing the upper surface of the electrode layer and covering the semiconductor region adjacent to the electrode layer.

Abstract: In some embodiments, a light-emissive device may include a reflector assembly, a dielectric layer, an electrode pin, a second semiconductor, and an electrode connector. The reflector assembly may define a cavity, a light opening, and an electrode pin opening. The dielectric layer may be positioned adjacent to the reflector assembly. The dielectric layer may define an electrode pin aperture and an electrode connector aperture. The electrode pin may include a head and a shaft. The head may be positioned in the cavity and coated with a first semiconductor. The shaft may be at least partially positioned in the electrode pin opening and through-mounted to the electrode pin aperture. The second semiconductor may be disposed in the cavity. The second semiconductor may surround the first semiconductor. The electrode connector may be electrically coupled to the second semiconductor and through-mounted to the electrode connector aperture.

Abstract: A LED (Light-Emitting Diode) package structure is provided. The LED package improved structure includes a base, a plurality of metallic nanoparticles and a LED unit. The base has an accommodating space, wherein the accommodating space has a bottom surface and at least one side surface surrounding the bottom surface. The metallic nanoparticles cover the bottom surface and/or the side surface. The LED unit is disposed in the accommodating spare, in which light emitted from the LED unit is reflected or scattered by the metallic nanoparticles, each of the metallic nanoparticles has a diameter smaller than 10 nm and is electrically isolated.

Abstract: An optoelectronic component has a semiconductor chip and a carrier, which is bonded to the semiconductor chip by means of a bonding layer of a metal or a metal alloy. The semiconductor chip includes electrical connection regions facing the carrier and the carrier includes electrical back contacts on its back remote from the semiconductor chip. The back contacts are connected electrically conductively to the first electrical or second connection region respectively, in each case by at least one via extending through the carrier. The first and/or second electrical back contact is connected to the first or second electrical connection region respectively by at least one further via extending through the carrier.

Abstract: A semiconductor light-emitting device having favorable optical characteristics can include a first conductor pattern having a die-bonding pad and a second conductor pattern having a wire bonding pad, which are formed on a circuit board. The semiconductor light-emitting device can also include a semiconductor light-emitting chip mounted on the die-bonding pad, a first encapsulating material, which can include a wavelength converting material to wavelength-convert light emitted from the chip and can cover the chip in a substantially fair dome shape on the circuit board, and a second encapsulating resin to cover the first encapsulating material, which can transmit light emitted from the first encapsulating material. Thus, a semiconductor light-emitting device is provided, which can emit a mixture light having various color tones and favorable optical characteristics and which can be used to illuminate goods laid out in a narrow show window, a vending machine, and the like.

Abstract: A step of forming a connecting member configured to electrically connect a first conductive line and a second conductive line includes a phase of perforating a laminate from a first semiconductor wafer to form a plurality of connection holes that reach the second conductive line and a phase of filling the plurality of penetrating connection holes with a conductive material to form conductive sections in contact with the second conductive line.

Abstract: Disclosed are a light-emitting device and a manufacturing method thereof. A light-emitting device according to an exemplary embodiment of the present invention includes a base, a lighting element disposed on the base, the lighting element including an epitaxial layer and a substrate disposed on the epitaxial layer, a contact member disposed between the lighting element and the base, the contact member electrically connecting the lighting element and the base, and a lens disposed on the substrate.

Abstract: A thermoelectric energy harvesting system may include a thermoelectric generator and an electronics module. The thermoelectric generator may produce a voltage in response to a temperature difference across the thermoelectric generator and generate power when coupled to a load. The system may include a housing mounted on top of the thermoelectric generator. The housing may include a cavity containing the electronics module. The electronics module may condition the power generated by the thermoelectric generator. The cavity may be enclosed by an inner surface of the housing. A radiation shield may cover at least a portion of the inner surface and may block radiative heating of the cavity from the housing.

Abstract: A generator includes a heat-electricity transforming device and a heat collector. The heat-electricity transforming device is configured to transform heat into electricity. The heat collector includes at least one heat absorption module. The at least one heat absorption module includes a carbon nanotube structure. The at least one heat absorption module is connected to the heat-electricity transforming device and transfers heat to the heat-electricity transforming device.

Abstract: A thermally driven power generator having a base and a heat source placed within the base. The thermally driven power generator further having a heat collector is adapted to collect the heat from the heat source through a plurality of fins and a heat sink adapted to release heat into the environment. The thermally driven power generator further having a thermal electric power generation module is sandwiched between the heat collector and a heat sink; the thermal electric power generation module is designed to convert heat collected by the heat collector to electrical power. A tray assembly for a thermally driven power generator, the tray assembly having: a transport tray; and a magnetic element integrated with the transport tray, the magnetic element designed to attract a wick keeper of a candle such that the wick is held in place.

Abstract: The present disclosure provides a thermoelectric element comprising a flexible semiconductor substrate having exposed surfaces with a metal content that is less than about 1% as measured by x-ray photoelectron spectroscopy (XPS) and a figure of merit (ZT) that is at least about 0.25, wherein the flexible semiconductor substrate has a Young's Modulus that is less than or equal to about 1×106 pounds per square inch (psi) at 25° C.

Abstract: This disclosure provides methods of fabricating a transducer array. The methods can include creating a lens shaped depression in a backing material, printing an electrode, printing a thick layer of lead zirconate titanate material, printing a ground electrode, and placing a plurality of equally spaced cuts into the depression.

Abstract: A semiconductor device, a piezoelectronic transistor (PET) device, and a method of fabricating the PET device are described. The method includes forming a first stack of dielectric layers, forming a first metal layer over the first stack, forming a piezoelectric (PE) material on the first metal layer, and forming a second metal layer on the PE material. The method also includes forming a piezoresistive (PR) element on the second metal layer through a gap in a first membrane formed a distance d above the second metal layer.

Abstract: A method of fabricating a vertical two-bits per cell STT MRAM for high density storage includes forming a bottom electrode within an interlayer dielectric (ILD) layer, forming an anti-ferromagnetic (AF) layer over the bottom electrode, and forming a fixed layer along sidewalls of the AF layer. The method further includes forming a tunnel layer along the fixed layer, forming a free layer along the tunnel layer, and forming a top electrode along the free layer and over an upper surface of the AF layer.

Abstract: A magnetic random access memory which is a memory cell array including a magnetoresistive effect element having a fixed layer whose magnetization direction is fixed, a recording layer whose magnetization direction is reversible, and a non-magnetic layer provided between the fixed layer and the recording layer, wherein all conductive layers in the memory cell array arranged below the magnetoresistive effect element are formed of materials each containing an element selected from a group including W, Mo, Ta, Ti, Zr, Nb, Cr, Hf, V, Co, and Ni.

Abstract: A method for manufacturing MTJ pillars for a MTJ memory device. The method includes depositing multiple MTJ layers on a substrate, depositing a hard mask on the substrate and coating a photoresist on the hard mask. Further, alternating steps of reactive ion etching and ion beam etching are performed to isolate MTJ pillars and expose side surfaces of the MTJ layers. An insulating layer is the applied to protect the side surfaces of the MTJ layers. A second insulating layer is deposited before the device is planarized using chemical mechanical polishing.

Abstract: The present invention relates to a magnetic tunnel junction device and a manufacturing method thereof. The magnetic tunnel junction device includes: i) a first magnetic layer including a compound having a chemical formula of (A100-xBx)100-yCy; ii) an insulating layer deposited on the first magnetic layer; and iii) a second magnetic layer deposited on the insulating layer and including a compound having a chemical formula of (A100-xBx)100-yCy. The first and second magnetic layers have perpendicular magnetic anisotropy, A and B are respectively metal elements, and C is at least one amorphizing element selected from a group consisting of boron (B), carbon (C), tantalum (Ta), and hafnium (Hf).

Abstract: A system for self-aligning diamagnetic materials includes first and second magnets contacting each other along a contact line and having a diametric magnetization perpendicular to the contact line and a diamagnetic rod positioned to levitate above the contact line of the first and second magnets.