Patents Issued in April 7, 2016
  • Publication number: 20160098274
    Abstract: Techniques are disclosed relating to suspending execution of a processor thread while monitoring for a write to a specified memory location. An execution subsystem may be configured to perform a load instruction that causes the processor to retrieve data from a specified memory location and atomically begin monitoring for a write to the specified location. The load instruction may be a load-monitor instruction. The execution subsystem may be further configured to perform a wait instruction that causes the processor to suspend execution of a processor thread during at least a portion of an interval specified by the wait instruction and to resume execution of the processor thread at the end of the interval. The wait instruction may be a monitor-wait instruction. The processor may be further configured to resume execution of the processor thread in response to detecting a write to a memory location specified by a previous monitor instruction.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Paul N. Loewenstein, Mark A. Luttrell, Paul J. Jordan
  • Publication number: 20160098275
    Abstract: Embodiments are described for a method for compiling instruction code for execution in a processor having a number of functional units by determining a thermal constraint of the processor, and defining instruction words comprising both real instructions and one or more no operation (NOP) instructions to be executed by the functional units within a single clock cycle, wherein a number of NOP instructions executed over a number of consecutive clock cycles is configured to prevent exceeding the thermal constraint during execution of the instruction code.
    Type: Application
    Filed: May 21, 2013
    Publication date: April 7, 2016
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Yuan Xie, Junli Gu
  • Publication number: 20160098276
    Abstract: Techniques are described for determining whether execution of an instruction would require reading more values from a memory cell of a general purpose register (GPR) than a read port of the memory cell would allow. In such a case, the techniques may store, prior to execution of the instruction, one or more values from the memory cell in a separate conflict queue. During execution of the instruction to implement an operation defined by the instruction, one value that is an operand of the operation would be read from the memory cell and another value that is an operand of the operation other would be read from the conflict queue.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Yun Du, Hongjiang Shang, Haikun Zhu
  • Publication number: 20160098277
    Abstract: A compressing instruction queue for a microprocessor including a queue and redirect logic. The queue includes a matrix of storage locations including N rows and M columns for storing microinstructions of the microprocessor in sequential order. The redirect logic is configured to receive and write multiple microinstructions per cycle of a clock signal into sequential storage locations of the queue without leaving unused storage locations and beginning at a first available storage location in the queue. The redirect logic performs redirection and compression to eliminate empty locations or holes in the queue and to reduce the number of write ports interfaced with each storage location of the queue.
    Type: Application
    Filed: December 12, 2014
    Publication date: April 7, 2016
    Inventors: MATTHEW DANIEL DAY, G. GLENN HENRY, TERRY PARKS
  • Publication number: 20160098278
    Abstract: Embodiments herein relate to forwarding an instruction based on predication criteria. A predicate state associated with a packet of data is to be compared to an instruction associated with the predication criteria. The instruction is to be forwarded to an execution unit if the predication criteria includes or matches the predicate state of the packet.
    Type: Application
    Filed: December 8, 2015
    Publication date: April 7, 2016
    Inventors: David A. Warren, Thomas A. Keaveny
  • Publication number: 20160098279
    Abstract: Various embodiments are described relating to processors, hierarchical processors, branch predictors, branch prediction systems, and computing systems. Some or all of a hierarchical instruction scheduler, hierarchical register file, or a hierarchical store buffer may be included in a hierarchical microprocessor. Some or all aspects of the hierarchical microprocessor may be implemented, partially or fully, using a method for sequential data storage.
    Type: Application
    Filed: October 22, 2015
    Publication date: April 7, 2016
    Inventor: Andrew F. Glew
  • Publication number: 20160098280
    Abstract: A semiconductor device includes a boot-up signal generator suitable for generating a boot-up signal based on an external reset signal and a specific mode signal; and an internal circuit suitable for performing a boot-up operation based on the boot-up signals
    Type: Application
    Filed: March 10, 2015
    Publication date: April 7, 2016
    Inventor: Hyun-Su YOON
  • Publication number: 20160098281
    Abstract: Examples of methods and apparatus are provided for comparing and provisioning configurations for a local client having a windows-based embedded image. The apparatus may include a retrieval module of the local client configured to facilitate locating a remote repository server containing a new configuration file, to facilitate obtaining the new configuration file from the remote repository server, and to facilitate obtaining a previous configuration file associated with a previous configuration change successfully applied to the embedded image. The apparatus may include a configuration comparison module of the local client configured to compare the new configuration file with the previous configuration file. The apparatus may include an apply settings module of the local client configured to apply, to the embedded image, one of a new configuration change and the previous configuration change based on the comparison. The new configuration change may be based on the new configuration file.
    Type: Application
    Filed: October 6, 2015
    Publication date: April 7, 2016
    Inventors: Sanmati Bahubali Tukol, Mohan Prabhala
  • Publication number: 20160098282
    Abstract: A method of utilizing a startup wizard is disclosed. The startup wizard guides a user through the installation of a food freshness barcode printer, enabling a non-technical user to complete the installation in minimal time. Specifically, the startup wizard detects first power on or is accessible from a system menu. Then, when the printer is installed, the startup wizard is entered which prompts the user for some or all of the following items: language, date format, product database, network configuration, or other specific elements required for implementation. The user is then guided through the installation process which enables a non-technical user to complete the installation of the food freshness barcode printer in minimal time.
    Type: Application
    Filed: October 2, 2015
    Publication date: April 7, 2016
    Inventors: Jeanne F. Duckett, Mark S. Morrow, Gary E. McMullen
  • Publication number: 20160098283
    Abstract: Methods and systems for platform configuration management may use a platform configuration register (PCR) stored on a trusted platform module (TPM) included with an information handling system. A basic input/output system (BIOS) may include instructions to generate a first PCR value based on BIOS settings while a user is operating the BIOS. When the first PCR value indicates a change from a previous PCR value stored in the PCR, an alert may be displayed to the user and sent to a network administrator. The BIOS may display an indication of a mapping of BIOS settings to the first PCR value.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: Ricardo Luis Martinez, Anand Prakash Joshi
  • Publication number: 20160098284
    Abstract: A method includes receiving a driver model for a device. The driver model includes a list of variables associated with the device and one or more characteristics of the variables. The method includes determining whether the driver model is format-compliant and validating syntax of the driver model based at least partially on a driver template that is accessible to a third party. In response to the driver model being format-compliant and the syntax being valid, the method includes generating a verified file that is representative of the driver model. The verified file is formatted to dynamically load into a device application module during operation and to dynamically support the device. The method includes communicating the verified file to a user apparatus and adding an integrity check value thereto. In response to the driver model being format-noncompliant or the syntax being invalid, the method includes communicating an error message.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: Ulrich HERBERG, Mohammad-Mahdi MOAZZAMI
  • Publication number: 20160098285
    Abstract: A virtualized computing system supports the execution of a plurality of virtual machines, where each virtual machine supports the execution of applications therein. Each application executes within a container that isolates the application executing therein from other processes executing on the computing system. A hierarchy of virtual machine templates is created by instantiating a parent virtual machine template, the parent virtual machine template having a. guest operating system and a container. An application to be run in a container is determined, and, in response, the parent virtual machine template is forked to create a child virtual machine template, where the child virtual machine template includes a replica of the container, and where the guest operating system of the parent virtual machine template overlaps in memory with a guest operating system of the child virtual machine template. The application is then installed in the replica of the container.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 7, 2016
    Inventors: Scott Howard DAVIS, Aaron SWEEMER, Clint GREENWOOD, Benjamin J. CORRIE, George HICKEN, Zhenhua YANG
  • Publication number: 20160098286
    Abstract: Implementations of the present invention allow software resources to be duplicated efficiently and effectively while offline. In one implementation, a preparation program receives an identification of a software resource, such as a virtual machine installed on a different volume, an offline operating system, or an application program. The preparation program also receives an indication of customized indicia that are to be removed from the software resource. These indicia can include personalized information as well as the level of software updates, security settings, user settings or the like. Upon execution, the preparation program redirects the function calls of the preparation program to the software resource at the different volume (or even the same volume) while the software resource is not running. The preparation program thus can thus creates a template of the software resource in a safe manner without necessarily affecting the volume at which the preparation program runs.
    Type: Application
    Filed: December 11, 2015
    Publication date: April 7, 2016
    Inventors: Nelson S. Araujo, Steven P. Robertson
  • Publication number: 20160098287
    Abstract: The invention relates to a method and system for data centre infrastructure management and, more particularly, to analyze and deploy interrelated objects in a virtual data centre at virtual deployment level. The present system monitors and identifies different elements of source virtual deployment such as configuration data, settings and so on which are scattered at different levels. Further, the system performs analysis based on various parameters such as virtual deployment performance data, past history data, future requirement and policy based data in order to identify best suitable target virtual data centre. After identifying best suited target virtual data centre, system triggers a redeployment request. Finally, system performs the redeployment of source virtual deployment to identified target virtual data centre.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Applicant: HCL Technologies Limited
    Inventors: Dhanyamraju S U M Prasad, Hareendran M
  • Publication number: 20160098288
    Abstract: An example method to build a virtual appliance for deployment in a virtualized computing environment may include obtaining a base virtual appliance that is application-independent. The base virtual appliance includes a virtual machine, a virtual disk associated with the virtual machine and a guest operating system (OS) installed on the virtual disk. The method may further comprise obtaining an application package associated with an application; and building the virtual appliance by assembling the base virtual appliance with the application package. During the assembly, the application package is installed on the virtual disk of the base virtual appliance such that the virtual machine supports both the guest OS and the application.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 7, 2016
    Inventor: Andrey Todorov PETROV
  • Publication number: 20160098289
    Abstract: An interrupt controller, a system and a method for handling an interrupt under a virtualization environment are provided. The system for handling an interrupt, includes: an interrupt controller, a virtual machine, and a hypervisor which controls activation of the virtual machine, the interrupt controller may receive a physical interrupt from the outside and transmit the physical interrupt to the hypervisor or the virtual machine based on a characteristic of the physical interrupt, the hypervisor may convert the physical interrupt into a virtual interrupt to transmit the virtual interrupt to the virtual machine, and the virtual machine may handle the physical interrupt or the virtual interrupt using a first interrupt handler which is included in the virtual machine.
    Type: Application
    Filed: November 12, 2014
    Publication date: April 7, 2016
    Inventors: Dong Hyouk LIM, Tae Ho KIM, Chae Deok LIM
  • Publication number: 20160098290
    Abstract: A non-transitory computer-readable storage medium storing therein an information sharing program for causing a computer to execute a process includes storing, in a storage, conversion information including first processing request information for issuing a processing request to a first processing processor that operates on a first physical machine, first operating environment information relating to an operating environment of the first physical machine and corresponding to the first processing request information, and second operating environment information relating to an operating environment of a second physical machine and corresponding to second processing request information for issuing a processing request to a second processing processor that operates on the second physical machine, and when a virtual machine that operates on the first physical machine transfers to the second physical machine, causing the second physical machine to hold the conversion information.
    Type: Application
    Filed: August 31, 2015
    Publication date: April 7, 2016
    Inventor: Taketoshi Yoshida
  • Publication number: 20160098291
    Abstract: Virtual machine capacity planning techniques are disclosed. In various embodiments, a set of time series data is constructed based at least in part on virtual machine related metric values observed with respect to a virtual machine during a training period. The constructed time series data is used to build a forecast model for the virtual machine. The forecast model is used to forecast future values for one or more of the virtual machine related metrics. The forecasted future values are used to determine whether an alert condition is predicted to be met.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Anirudh Kondaveeti, Derek Lin
  • Publication number: 20160098292
    Abstract: A job scheduler that schedules ready tasks amongst a cluster of servers. Each job might be managed by one scheduler. In that case, there are multiple job schedulers which conduct scheduling for different jobs concurrently. To identify a suitable server for a given task, the job scheduler uses expected server performance information received from multiple servers. For instance, the server performance information might include expected performance parameters for tasks of particular categories if assigned to the server. The job management component then identifies a particular task category for a given task, determines which of the servers can perform the task by a suitable estimated completion time, and then assigns based on the estimated completion time. The job management component also uses cluster-level information in order to determine which server to assign a task to.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Eric Boutin, Jaliya Ekanayake, Wei Lin, Bin Shi, Jingren Zhou
  • Publication number: 20160098293
    Abstract: This disclosure provides various embodiments of software, systems, and techniques for controlled interruption of batch job processing. In one instance, a tangible computer readable medium stores instructions for managing batch jobs, where the instructions are operable when executed by a processor to identify an interruption event associated with a batch job queue. The instructions trigger an interruption of an executing batch job within the job queue such that the executed portion of the job is marked by a restart point embedded within the executable code. The instructions then restart the interrupted batch job at the restart point.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Olaf Schmidt, Martin P. Fischer
  • Publication number: 20160098294
    Abstract: Systems and methods are disclosed for executing a clustered method at a cluster of nodes. An example method includes identifying an annotated class included in an application that is deployed on the cluster of nodes. An annotation of the class indicates that a clustered method associated with the annotated class is executed at each node in the cluster. The method also includes creating an instance of the annotated class and coordinating execution of the clustered method with one or more other nodes in the cluster. The method further includes executing, based on the coordinating, the clustered method using the respective node's instance of the annotated class.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: Lenka Vaskova, Martin Vecera
  • Publication number: 20160098295
    Abstract: Exemplary method, system, and computer program product embodiments for increased cache performance using multi-level queues by a processor device. The method includes distributing to each one of a plurality of central processing units (CPUs) workload operations for creating complete tracks from partial tracks, creating sub-queues of the complete tracks for distributing to each one of the CPUs, and creating demote scan tasks based on workload of the CPUs. Additional system and computer program product embodiments are disclosed and provide related advantages.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. ASH, Lokesh M. GUPTA, David B. WHITWORTH, Boyan ZHAO
  • Publication number: 20160098296
    Abstract: Mechanisms for improving computing system performance by a processor device. System resources are organized into a plurality of groups. Each of the plurality of groups is assigned one of a plurality of predetermined task pools. Each of the predetermined task pools has a plurality of tasks. Each of the plurality of groups corresponds to at least one physical boundary of the system resources such that a speed of an execution of those of the plurality of tasks for a particular one of the plurality of predetermined task pools is optimized by a placement of an association with the at least one physical boundary and the plurality of groups.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 7, 2016
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin J. ASH, Seamus J. BURKE, Lokesh M. GUPTA, Clint A. HARDY, Matthew J. KALOS, Trung N. NGUYEN, Karl A. NIELSEN, Louis A. RASOR, David B. WHITWORTH
  • Publication number: 20160098297
    Abstract: A system and method are provided for determining aggregate available capacity for an infrastructure group with existing workloads in computer environment. The method comprises determining one or more workload placements of one or more workload demand entities on one or more capacity entities in the infrastructure group; computing an available capacity and a stranded capacity for each resource for each capacity entity in the infrastructure group, according to the workload placements; and using the available capacity and the stranded capacity for each resource for each capacity entity to determine an aggregate available capacity and a stranded capacity by resource for the infrastructure group.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Tom YUYITUNG, Giampiero DE CIANTIS, Mikhail KOUZNETSOV
  • Publication number: 20160098298
    Abstract: Described herein are techniques for integrated work management. An integrated work management server processes one or more datum of one or more source systems. The datum relates to at least one work item representing at least one assignment to be processed by a resource. An integrator is coupled to the integrated work management server. The integrator uses the one or more datum to create, store and/or update a combined work queue for the resource. The combined work queue comprises any of at least one work item and at least one assignment. One or more prioritization rules specify one or more criteria. The integrator prioritizes the combined work queue by evaluating the criteria in accord with the one or more datum.
    Type: Application
    Filed: January 14, 2015
    Publication date: April 7, 2016
    Inventors: Alan Trefler, Mark Replogle
  • Publication number: 20160098299
    Abstract: A method for lock acquisition includes adding a current contention state of a lock to a contention history. The lock includes a memory location for storing information used for excluding accessing a resource by one or more threads while another thread accesses the resource. The method includes combining the contention history with a lock address for the lock to form a predictor table index, and using the predictor table index to determine a lock prediction for the lock. The prediction includes a determination of an amount of contention.
    Type: Application
    Filed: June 10, 2015
    Publication date: April 7, 2016
    Inventors: Ganesh Balakrishnan, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Publication number: 20160098300
    Abstract: A multi-core processor system and a method for assigning tasks are provided. The multi-core processor system includes a plurality of processor cores, configured to perform a plurality of tasks, and each of the tasks is in a respective one of a plurality of scheduling classes. The multi-core processor system further includes a task scheduler, configured to obtain first task assignment information about tasks in a first scheduling class assigned to the processor cores, obtain second task assignment information about tasks in one or more other scheduling classes assigned to the processor cores, and refer to the first task assignment information and the second task assignment information to assign a runnable task in the first scheduling class to one of the processor cores.
    Type: Application
    Filed: July 15, 2015
    Publication date: April 7, 2016
    Inventors: Ya-Ting CHANG, Yu-Ting CHEN, Yu-Ming LIN, Jia-Ming CHEN, Hung-Lin CHOU, Tzu-Jen LO
  • Publication number: 20160098301
    Abstract: A system and method for transforming a legacy device into a virtualized environment, comprising includes analyzing the profiling data for at least one application to determine usage frequency and resource requirements of the at least one application. Captured user events are benchmarked to simulate a user workload for the at least one application to determine how resource utilization and execution times scale from a legacy environment to a virtualized environment. The legacy device is transformed into the virtualized environment in accordance with a provisioning plan.
    Type: Application
    Filed: December 15, 2015
    Publication date: April 7, 2016
    Inventors: Kirk A. Beaty, Rajdeep Bhowmik, Andrzej Kochut, Junghwan Rhee, Hidayatullah H. Shaikh
  • Publication number: 20160098302
    Abstract: A method includes, in a computing system that includes at least first and second compute nodes, running on the first compute node a workload that uses memory pages. The memory pages used by the workload are classified into at least active pages and inactive pages, and the inactive memory pages are evicted to shared storage that is accessible at least to the first and second compute nodes. In response to migration of the workload from the first compute node to the second compute node, the active pages are transferred from the first compute node to the second compute node for use by the migrated workload, and the migrated workload is provided with access to the inactive pages on the shared storage.
    Type: Application
    Filed: January 1, 2015
    Publication date: April 7, 2016
    Inventors: Muli Ben-Yehuda, Rom Frieman, Abel Gordon, Benoit Hudzia, Maor Vanmak
  • Publication number: 20160098303
    Abstract: An apparatus for lock acquisition is disclosed. A method and a computer program product also perform the functions of the apparatus. The apparatus includes a lock history module that adds a current contention state of a lock to a contention history. The lock includes a memory location for storing information used for excluding access to a resource by one or more threads while another thread accesses the resource. The apparatus, in some embodiments, includes a combination module that combines the contention history with a lock address for the lock to form a predictor table index, and a prediction module that uses the predictor table index to determine a lock prediction for the lock. The prediction includes a determination of an amount of contention.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Ganesh Balakrishnan, Srinivasan Ramani, Brian M. Rogers, Ken V. Vu
  • Publication number: 20160098304
    Abstract: A system may be able classify events that occur during the runtime of applications (e.g., exceptions). The system may receive an indication of the event and may classify the event based on a comparison with elements of a classification data structure. The classification data structure may be a hierarchical data structure, and child elements may inherit characteristics from parent elements. Based on the classification, the system may perform one or more actions, which may be specified by the elements of the data structure. For example, the system may provide notifications to administrators and/or user, may attempt to recover from the event, and/or the like. Each event may be associated with a unique identifier so the user can more easily identify the event to support personnel. The system may include analysis tools to assist administrators in tracking events and identifying which events are most important.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventor: Michael Rosier
  • Publication number: 20160098305
    Abstract: A method and system architecture for automation and alarm systems is provided. According to exemplary embodiments, relatively simple processing tasks are performed at the sensor level, with more complex processing being shifted to the gateway entity or a networked processing device. The gateway entity dynamically allocates processing resources for sensors. If a sensor detects than an event is occurring, or predicts that an event is about to occur, the sensor submits a resources allocation request and a power balancer running on the gateway entity processes the request. In response to the resources allocation request, the gateway entity allocates some processing resources to the requesting sensor and the data is processed in real-time or near-real-time by the gateway entity.
    Type: Application
    Filed: September 18, 2015
    Publication date: April 7, 2016
    Applicant: TYCO SAFETY PRODUCTS CANADA LTD.
    Inventors: Andrei Bucsa, Greg Hill
  • Publication number: 20160098306
    Abstract: In general, techniques are described for performing hardware-based queue automation for hardware engines. An apparatus comprising a hardware engine and a hardware event queue manager may be configured to perform the techniques. The hardware event queue manager may be configured to receive, from a processing unit separate from the hardware event queue manager, an event to be processed by the hardware engine, and perform queue management with respect to an event queue to schedule processing of the event by the hardware engine.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: Dar-Der Chang, Hsing H. Hsieh, Charles D. Potter
  • Publication number: 20160098307
    Abstract: Systems, methods, and other embodiments associated with an integration application building tool are described. In one embodiment, a method includes providing data files including an adapter data file, a flow data file, and an environment data file. The adapter data file stores adapter data corresponding to a plurality of adapters for respective enterprise applications. An adapter for a given enterprise application enables the given enterprise application to exchange messages with a messaging system. The flow data file describes to a plurality of flows of messages, through the messaging system, between enterprise applications. The environment data file is configured to be populated with location data. The method includes, receiving an instance of location data and populating the environment data file. An adapter application comprising computer code is generated that, when executed, allows the enterprise application to exchange messages with the messaging system.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 7, 2016
    Inventors: Prantor BORA, David BURCH
  • Publication number: 20160098308
    Abstract: Novel tools and techniques for tracing application execution and performance. Some of the tools provide a framework for monitoring the execution and/or performance of applications in an execution chain. In some cases, the framework can accomplish this monitoring with a few simple calls to an application programming interface on an application server. In other cases, the framework can provide for the passing of traceability data in protocol-specific headers of existing inter-application (and/or intra-application) communication protocols.
    Type: Application
    Filed: December 16, 2015
    Publication date: April 7, 2016
    Inventors: Igor I. Malkiman, Chauncey G. Powis, Tyson Matthew Bunch
  • Publication number: 20160098309
    Abstract: Embodiments relate to systems and methods for detecting failure-risk events at devices and facilitating local and/or remote data back-up and/or device operations. In some instances, a device characterizes a stimulus sensed at the device or an operation of a component of the device. A determination is made that a failure-risk condition is satisfied based on the characterization. In response to determining that the failure-risk condition is satisfied, the device initiates a data backing up of data in a non-volatile reserved memory or facilitates transmission of an alert communication from the device to another device.
    Type: Application
    Filed: October 7, 2014
    Publication date: April 7, 2016
    Applicant: Belkin International, Inc.
    Inventor: Ryan Yong Kim
  • Publication number: 20160098310
    Abstract: Fault isolation for a computer system having multiple FRUs in an FSI chain uses logic embedded in a device driver to determine first failure data and a logical error identifier. The logical error identifier represents a hardware logical area of the fault. The fault is then mapped to a segment of the system based on a self-describing system model which includes FRU boundary relationships for the devices. Operation of the device driver is carried out by a flexible service processor. The device driver uses the first failure data to identify a link at a failure point corresponding to the fault and determine a failure type at the link, then maps the link and the failure type to the logical error identifier. After identifying the segment, the device driver can generate a list of callouts of the field replaceable units associated with the segment which require replacement.
    Type: Application
    Filed: October 7, 2014
    Publication date: April 7, 2016
    Inventors: Douglas M. Boecker, Christopher L. Bostic, Gaurav Kakkar
  • Publication number: 20160098311
    Abstract: Fault isolation for a computer system having multiple FRUs in an FSI chain uses logic embedded in a device driver to determine first failure data and a logical error identifier. The logical error identifier represents a hardware logical area of the fault. The fault is then mapped to a segment of the system based on a self-describing system model which includes FRU boundary relationships for the devices. Operation of the device driver is carried out by a flexible service processor. The device driver uses the first failure data to identify a link at a failure point corresponding to the fault and determine a failure type at the link, then maps the link and the failure type to the logical error identifier. After identifying the segment, the device driver can generate a list of callouts of the field replaceable units associated with the segment which require replacement.
    Type: Application
    Filed: June 2, 2015
    Publication date: April 7, 2016
    Inventors: Douglas M. Boecker, Christopher L. Bostic, Gaurav Kakkar
  • Publication number: 20160098312
    Abstract: A non-transitory computer-readable recording medium having stored therein a log management program that causes a computer to execute a process includes obtaining a log item group included in each log and having a periodicity, for each of a plurality of logs outputted from a plurality of monitoring targets, detecting a first log item group from a first log, the first log item group being different from the log item group included in the first log, specifying a second log item group outputted in a same period as that of the first log item group, from a second log related to the first log, extracting the first log item group from the first log, and outputting the first log item group, and extracting the specified second log item group from the second log, and outputting the second log item group.
    Type: Application
    Filed: August 24, 2015
    Publication date: April 7, 2016
    Inventors: KAZUAKI KOZAWA, Kenichi Narita, Yuji Aoki, Norio Inoue
  • Publication number: 20160098313
    Abstract: Each task assigned to a core can be considered an “active” task. Sequential strobe signals of a watchdog signal can be spaced apart in time by a certain duration. The duration between strobe signals is longer than the expected duration of an active task. By knowing that all tasks being monitored are expected to execute within an expected amount of time, the duration between the strobe signals can be set to be longer than that expected amount of time. If a task has not transitioned to inactive by a next strobe, a watchdog error has occurred.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 7, 2016
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: William C. Moyer
  • Publication number: 20160098314
    Abstract: A method for operation of a reusable fault processing database in conjunction with a complex system is provided. The method stores a set of logical rules into one or more logic entities of the reusable fault processing database, the set comprising one or more executable instructions applicable to fault detection and fault isolation in the complex system; stores at least one defined variable for each of the received set of logical rules, the at least one defined variable being stored into one or more variable entities of the reusable fault processing database; and stores a configuration of at least one external interface of the reusable fault processing database, the configuration being stored in one or more input/output (I/O) entities of the reusable fault processing database, the external interface comprising a defined set of input to the reusable fault processing database and a defined set of output from the reusable fault processing database.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventor: Martin Talafa
  • Publication number: 20160098315
    Abstract: A device manages the storage of data in at least one storage device of a first type and in a storage device of a second type, the at least one storage device of the first type being physically distinct from the storage device of the second type. The device partitions data to be stored into blocks of data, determines redundancies generated by an error detection code for each block of data, stores blocks of data in the at least one storage device of the first type, the storage device(s) of the first type being compliant with an avionic quality assurance level of a given quality level, and stores redundancies in the storage device of the second type, the storage device of the second type being compliant with an avionic quality assurance level that is higher than the avionic quality assurance level of the storage device(s) of first type.
    Type: Application
    Filed: October 6, 2015
    Publication date: April 7, 2016
    Inventor: Stéphane GAUTHIER
  • Publication number: 20160098316
    Abstract: An error processing method for a rewritable non-volatile memory module, a memory storage device and a memory controlling circuit unit are provided. The rewritable non-volatile memory module includes a plurality of memory cells. The error processing method includes: sending a first read command sequence for reading a plurality of bits from the memory cells; performing a first decoding on the bits; determining whether each error belongs to a first type error or a second type error if the bits have at least one error; recording related information of a first error in the at least one error if the first error belongs to the first type error; and not recording the related information of the first error if the first error belongs to the second type error. Accordingly, errors with particular type may be processed suitably.
    Type: Application
    Filed: December 10, 2014
    Publication date: April 7, 2016
    Inventors: Wei Lin, Yu-Cheng Hsu, Shao-Wei Yen, Tien-Ching Wang, Yu-Hsiang Lin, Kuo-Hsin Lai, Li-Chun Liang
  • Publication number: 20160098317
    Abstract: An apparatus having mapping and interface circuits. The mapping circuit (i) generates a coded item by mapping write unit bits using a modulation or recursion of past-seen bits, and (ii) calculates a particular state to program into a nonvolatile memory cell. The interface circuit programs the cell at the particular state. Two normal cell states are treated as at least four refined states. The particular state is one of the refined states. A mapping to the refined states mitigates programming write misplacement that shifts an analog voltage of the cell from the particular state to an erroneous state. The erroneous state corresponds to a readily observable illegal or atypical write sequence, and results in a modified soft decision from that calculated based on the normal states only. A voltage swing between the particular state and the erroneous state is less than between the normal states.
    Type: Application
    Filed: December 9, 2015
    Publication date: April 7, 2016
    Inventors: AbdelHakim S. Alhussien, Erich F. Haratsch, Earl T. Cohen, Yunxiang Wu
  • Publication number: 20160098318
    Abstract: An apparatus includes one or more error-correction decoders, a buffer, and at least one processor. The buffer may be configured to store data to be decoded by the one or more error-correction decoders. The at least one processor is generally enabled to send messages to the one or more error-correction decoders. The messages may contain datapath control information corresponding to data in the buffer to be decoded by the one or more error-correction decoders. The one or more error-correction decoders are generally enabled to decode the data read from the buffer according to the corresponding datapath control information.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Earl T. Cohen, Yunxiang Wu, Alexander Hubris, Christopher Brewer
  • Publication number: 20160098319
    Abstract: A method and system for reducing data transfers between memory controller and multi-level cell (MLC) non-volatile memory during programming passes of a word line (WL) in the non-volatile memory. The system includes a controller and non-volatile memory having multiple WLs, each WL having a plurality of MLC memory cells. The controller stores received data in volatile memory until a target WL amount of data is received. The controller pre-encodes the received data into direct WL programming data for each programming pass necessary to program a target MLC WL. All direct WL programming data for all programming passes are stored in the volatile memory before programming. Different portions of direct WL programming data are transmitted from the controller to the non-volatile memory each pass. The received data may be deleted from the volatile memory before transmitting at least a portion of the direct WL programming data to the non-volatile memory.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 7, 2016
    Inventor: Sergey Anatolievich Gorobets
  • Publication number: 20160098320
    Abstract: A method includes determining that one or more data blocks of a permanently stored data blocks are to be deleted. In response, the method further includes obtaining a group of partial redundancy data for the permanently stored data blocks. The method further includes identifying a temporarily stored plurality of data blocks for which partial redundancy data does not yet exist. The method further includes creating a new plurality of data blocks from data blocks of the permanently stored plurality of data blocks that are to remain permanently stored and data blocks from the temporarily stored plurality of data blocks that are to be permanently stored. The method further includes permanently storing the new plurality of data blocks. The method further includes generating a new group of partial redundancy data. The method further includes sending the new group of partial redundancy data and the group of partial redundancy data.
    Type: Application
    Filed: November 30, 2015
    Publication date: April 7, 2016
    Applicant: International Business Machines Corporation
    Inventors: Gary W. Grube, Timothy W. Markison
  • Publication number: 20160098321
    Abstract: A low density parity check (LDPC) decoder integrated on a single semiconductor substrate may comprise one or more arrays of first-type memory cells and one or more arrays of second-type memory cells. The LDPC decoder may be configured to store intrinsic messages in the array of first-type cells and to store extrinsic messages in the array of second-type cells. The first-type cells may be a first one of: static random access memory (SRAM) cells, refreshed dynamic random access memory (DRAM) cells, non-refreshed DRAM cells configured as a FIFO, and non-refreshed DRAM cells not configured as a FIFO. The second-type cells may be a second one of: static random access memory (SRAM) cells, refreshed dynamic random access memory (DRAM) cells, non-refreshed DRAM cells configured as a FIFO, and non-refreshed DRAM cells not configured as a FIFO.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Curtis Ling, Timothy Gallagher
  • Publication number: 20160098322
    Abstract: Technology is disclosed for performing background initialization on protection information enabled storage volumes or drives. In some embodiments, a storage controller generates multiple I/O requests for stripe segments of each drive (e.g., disk) of multiple drives of a RAID-based system (e.g., RAID-based disk array). The I/O requests are then sorted for each of the drives according to a pre-determined arrangement and initiated in parallel to the disks while enforcing the pre-determined arrangement. Sorting and issuing the I/O requests in the manner described herein can, for example, reduce drive head movement resulting in faster storage subsystem initialization.
    Type: Application
    Filed: December 14, 2015
    Publication date: April 7, 2016
    Inventors: Wei Sun, Donald Humlicek, Theresa Segura
  • Publication number: 20160098323
    Abstract: A system according to certain aspects improves the process of creating secondary copies of data (e.g., creating backup copies). The system can compute the score of the data (e.g., a computer file storing information) to be backed up, and determine whether the score satisfies one or more threshold criteria before backing up the data. In one example, a change in score indicates a change in the content of the data. The threshold criteria may be that the score be different from the score of the most recently backed up copy of the data.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Manas Bhikchand MUTHA, Amit MAHAJAN, Yan LIU, Jun H. AHN